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58dbd541 YQ |
1 | /* Target dependent code for GDB on TI C6x systems. |
2 | ||
b811d2c2 | 3 | Copyright (C) 2010-2020 Free Software Foundation, Inc. |
58dbd541 YQ |
4 | Contributed by Andrew Jenner <andrew@codesourcery.com> |
5 | Contributed by Yao Qi <yao@codesourcery.com> | |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | #include "server.h" | |
23 | #include "linux-low.h" | |
506fe5f4 YQ |
24 | #include "arch/tic6x.h" |
25 | #include "tdesc.h" | |
58dbd541 | 26 | |
5826e159 | 27 | #include "nat/gdb_ptrace.h" |
58dbd541 YQ |
28 | #include <endian.h> |
29 | ||
30 | #include "gdb_proc_service.h" | |
31 | ||
32 | #ifndef PTRACE_GET_THREAD_AREA | |
33 | #define PTRACE_GET_THREAD_AREA 25 | |
34 | #endif | |
35 | ||
36 | /* There are at most 69 registers accessible in ptrace. */ | |
37 | #define TIC6X_NUM_REGS 69 | |
38 | ||
39 | #include <asm/ptrace.h> | |
40 | ||
ef0478f6 TBA |
41 | /* Linux target op definitions for the TI C6x architecture. */ |
42 | ||
43 | class tic6x_target : public linux_process_target | |
44 | { | |
45 | public: | |
46 | ||
aa8d21c9 TBA |
47 | const regs_info *get_regs_info () override; |
48 | ||
797bcff5 TBA |
49 | protected: |
50 | ||
51 | void low_arch_setup () override; | |
daca57a7 TBA |
52 | |
53 | bool low_cannot_fetch_register (int regno) override; | |
54 | ||
55 | bool low_cannot_store_register (int regno) override; | |
ef0478f6 TBA |
56 | }; |
57 | ||
58 | /* The singleton target ops object. */ | |
59 | ||
60 | static tic6x_target the_tic6x_target; | |
61 | ||
58dbd541 YQ |
62 | /* Defined in auto-generated file tic6x-c64xp-linux.c. */ |
63 | void init_registers_tic6x_c64xp_linux (void); | |
3aee8918 PA |
64 | extern const struct target_desc *tdesc_tic6x_c64xp_linux; |
65 | ||
58dbd541 YQ |
66 | /* Defined in auto-generated file tic6x-c64x-linux.c. */ |
67 | void init_registers_tic6x_c64x_linux (void); | |
3aee8918 PA |
68 | extern const struct target_desc *tdesc_tic6x_c64x_linux; |
69 | ||
58dbd541 YQ |
70 | /* Defined in auto-generated file tic62x-c6xp-linux.c. */ |
71 | void init_registers_tic6x_c62x_linux (void); | |
3aee8918 | 72 | extern const struct target_desc *tdesc_tic6x_c62x_linux; |
58dbd541 YQ |
73 | |
74 | union tic6x_register | |
75 | { | |
76 | unsigned char buf[4]; | |
77 | ||
78 | int reg32; | |
79 | }; | |
80 | ||
81 | /* Return the ptrace ``address'' of register REGNO. */ | |
82 | ||
83 | #if __BYTE_ORDER == __BIG_ENDIAN | |
84 | static int tic6x_regmap_c64xp[] = { | |
85 | /* A0 - A15 */ | |
86 | 53, 52, 55, 54, 57, 56, 59, 58, | |
87 | 61, 60, 63, 62, 65, 64, 67, 66, | |
88 | /* B0 - B15 */ | |
89 | 23, 22, 25, 24, 27, 26, 29, 28, | |
90 | 31, 30, 33, 32, 35, 34, 69, 68, | |
91 | /* CSR PC */ | |
92 | 5, 4, | |
93 | /* A16 - A31 */ | |
94 | 37, 36, 39, 38, 41, 40, 43, 42, | |
95 | 45, 44, 47, 46, 49, 48, 51, 50, | |
96 | /* B16 - B31 */ | |
97 | 7, 6, 9, 8, 11, 10, 13, 12, | |
98 | 15, 14, 17, 16, 19, 18, 21, 20, | |
99 | /* TSR, ILC, RILC */ | |
100 | 1, 2, 3 | |
101 | }; | |
102 | ||
103 | static int tic6x_regmap_c64x[] = { | |
104 | /* A0 - A15 */ | |
105 | 51, 50, 53, 52, 55, 54, 57, 56, | |
106 | 59, 58, 61, 60, 63, 62, 65, 64, | |
107 | /* B0 - B15 */ | |
108 | 21, 20, 23, 22, 25, 24, 27, 26, | |
109 | 29, 28, 31, 30, 33, 32, 67, 66, | |
110 | /* CSR PC */ | |
111 | 3, 2, | |
112 | /* A16 - A31 */ | |
113 | 35, 34, 37, 36, 39, 38, 41, 40, | |
114 | 43, 42, 45, 44, 47, 46, 49, 48, | |
115 | /* B16 - B31 */ | |
116 | 5, 4, 7, 6, 9, 8, 11, 10, | |
117 | 13, 12, 15, 14, 17, 16, 19, 18, | |
118 | -1, -1, -1 | |
119 | }; | |
120 | ||
121 | static int tic6x_regmap_c62x[] = { | |
122 | /* A0 - A15 */ | |
123 | 19, 18, 21, 20, 23, 22, 25, 24, | |
124 | 27, 26, 29, 28, 31, 30, 33, 32, | |
125 | /* B0 - B15 */ | |
126 | 5, 4, 7, 6, 9, 8, 11, 10, | |
127 | 13, 12, 15, 14, 17, 16, 35, 34, | |
128 | /* CSR, PC */ | |
129 | 3, 2, | |
130 | -1, -1, -1, -1, -1, -1, -1, -1, | |
131 | -1, -1, -1, -1, -1, -1, -1, -1, | |
132 | -1, -1, -1, -1, -1, -1, -1, -1, | |
133 | -1, -1, -1, -1, -1, -1, -1, -1, | |
134 | -1, -1, -1 | |
135 | }; | |
136 | ||
137 | #else | |
138 | static int tic6x_regmap_c64xp[] = { | |
139 | /* A0 - A15 */ | |
140 | 52, 53, 54, 55, 56, 57, 58, 59, | |
141 | 60, 61, 62, 63, 64, 65, 66, 67, | |
142 | /* B0 - B15 */ | |
143 | 22, 23, 24, 25, 26, 27, 28, 29, | |
144 | 30, 31, 32, 33, 34, 35, 68, 69, | |
145 | /* CSR PC */ | |
146 | 4, 5, | |
147 | /* A16 - A31 */ | |
148 | 36, 37, 38, 39, 40, 41, 42, 43, | |
149 | 44, 45, 46, 47, 48, 49, 50, 51, | |
150 | /* B16 -B31 */ | |
151 | 6, 7, 8, 9, 10, 11, 12, 13, | |
152 | 14, 15, 16, 17, 18, 19, 20, 31, | |
153 | /* TSR, ILC, RILC */ | |
154 | 0, 3, 2 | |
155 | }; | |
156 | ||
157 | static int tic6x_regmap_c64x[] = { | |
158 | /* A0 - A15 */ | |
159 | 50, 51, 52, 53, 54, 55, 56, 57, | |
160 | 58, 59, 60, 61, 62, 63, 64, 65, | |
161 | /* B0 - B15 */ | |
162 | 20, 21, 22, 23, 24, 25, 26, 27, | |
163 | 28, 29, 30, 31, 32, 33, 66, 67, | |
164 | /* CSR PC */ | |
165 | 2, 3, | |
166 | /* A16 - A31 */ | |
167 | 34, 35, 36, 37, 38, 39, 40, 41, | |
168 | 42, 43, 44, 45, 46, 47, 48, 49, | |
169 | /* B16 - B31 */ | |
170 | 4, 5, 6, 7, 8, 9, 10, 11, | |
171 | 12, 13, 14, 15, 16, 17, 18, 19, | |
172 | -1, -1, -1 | |
173 | }; | |
174 | ||
175 | static int tic6x_regmap_c62x[] = { | |
176 | /* A0 - A15 */ | |
177 | 18, 19, 20, 21, 22, 23, 24, 25, | |
178 | 26, 27, 28, 29, 30, 31, 32, 33, | |
179 | /* B0 - B15 */ | |
180 | 4, 5, 6, 7, 8, 9, 10, 11, | |
181 | 12, 13, 14, 15, 16, 17, 34, 35, | |
182 | /* CSR PC */ | |
183 | 2, 3, | |
184 | -1, -1, -1, -1, -1, -1, -1, -1, | |
185 | -1, -1, -1, -1, -1, -1, -1, -1, | |
186 | -1, -1, -1, -1, -1, -1, -1, -1, | |
187 | -1, -1, -1, -1, -1, -1, -1, -1, | |
188 | -1, -1, -1 | |
189 | }; | |
190 | ||
191 | #endif | |
192 | ||
193 | extern struct linux_target_ops the_low_target; | |
194 | ||
195 | static int *tic6x_regmap; | |
196 | static unsigned int tic6x_breakpoint; | |
dd373349 AT |
197 | #define tic6x_breakpoint_len 4 |
198 | ||
199 | /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ | |
200 | ||
201 | static const gdb_byte * | |
202 | tic6x_sw_breakpoint_from_kind (int kind, int *size) | |
203 | { | |
204 | *size = tic6x_breakpoint_len; | |
205 | return (const gdb_byte *) &tic6x_breakpoint; | |
206 | } | |
58dbd541 | 207 | |
3491a34c YQ |
208 | static struct usrregs_info tic6x_usrregs_info = |
209 | { | |
210 | TIC6X_NUM_REGS, | |
211 | NULL, /* Set in tic6x_read_description. */ | |
212 | }; | |
3aee8918 PA |
213 | |
214 | static const struct target_desc * | |
506fe5f4 | 215 | tic6x_read_description (enum c6x_feature feature) |
58dbd541 | 216 | { |
506fe5f4 YQ |
217 | static target_desc *tdescs[C6X_LAST] = { }; |
218 | struct target_desc **tdesc = &tdescs[feature]; | |
58dbd541 | 219 | |
506fe5f4 | 220 | if (*tdesc == NULL) |
58dbd541 | 221 | { |
506fe5f4 | 222 | *tdesc = tic6x_create_target_description (feature); |
506fe5f4 | 223 | static const char *expedite_regs[] = { "A15", "PC", NULL }; |
190852c8 | 224 | init_target_desc (*tdesc, expedite_regs); |
58dbd541 | 225 | } |
506fe5f4 YQ |
226 | |
227 | return *tdesc; | |
58dbd541 YQ |
228 | } |
229 | ||
daca57a7 TBA |
230 | bool |
231 | tic6x_target::low_cannot_fetch_register (int regno) | |
58dbd541 YQ |
232 | { |
233 | return (tic6x_regmap[regno] == -1); | |
234 | } | |
235 | ||
daca57a7 TBA |
236 | bool |
237 | tic6x_target::low_cannot_store_register (int regno) | |
58dbd541 YQ |
238 | { |
239 | return (tic6x_regmap[regno] == -1); | |
240 | } | |
241 | ||
242 | static CORE_ADDR | |
243 | tic6x_get_pc (struct regcache *regcache) | |
244 | { | |
245 | union tic6x_register pc; | |
246 | ||
247 | collect_register_by_name (regcache, "PC", pc.buf); | |
248 | return pc.reg32; | |
249 | } | |
250 | ||
251 | static void | |
252 | tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc) | |
253 | { | |
254 | union tic6x_register newpc; | |
255 | ||
256 | newpc.reg32 = pc; | |
257 | supply_register_by_name (regcache, "PC", newpc.buf); | |
258 | } | |
259 | ||
58dbd541 YQ |
260 | static int |
261 | tic6x_breakpoint_at (CORE_ADDR where) | |
262 | { | |
263 | unsigned int insn; | |
264 | ||
52405d85 | 265 | the_target->read_memory (where, (unsigned char *) &insn, 4); |
58dbd541 YQ |
266 | if (insn == tic6x_breakpoint) |
267 | return 1; | |
268 | ||
269 | /* If necessary, recognize more trap instructions here. GDB only uses the | |
270 | one. */ | |
271 | return 0; | |
272 | } | |
273 | ||
274 | /* Fetch the thread-local storage pointer for libthread_db. */ | |
275 | ||
276 | ps_err_e | |
754653a7 | 277 | ps_get_thread_area (struct ps_prochandle *ph, |
58dbd541 YQ |
278 | lwpid_t lwpid, int idx, void **base) |
279 | { | |
280 | if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) | |
281 | return PS_ERR; | |
282 | ||
283 | /* IDX is the bias from the thread pointer to the beginning of the | |
284 | thread descriptor. It has to be subtracted due to implementation | |
285 | quirks in libthread_db. */ | |
286 | *base = (void *) ((char *) *base - idx); | |
287 | ||
288 | return PS_OK; | |
289 | } | |
290 | ||
291 | static void | |
292 | tic6x_collect_register (struct regcache *regcache, int regno, | |
293 | union tic6x_register *reg) | |
294 | { | |
295 | union tic6x_register tmp_reg; | |
296 | ||
297 | collect_register (regcache, regno, &tmp_reg.reg32); | |
298 | reg->reg32 = tmp_reg.reg32; | |
299 | } | |
300 | ||
301 | static void | |
302 | tic6x_supply_register (struct regcache *regcache, int regno, | |
303 | const union tic6x_register *reg) | |
304 | { | |
305 | int offset = 0; | |
306 | ||
307 | supply_register (regcache, regno, reg->buf + offset); | |
308 | } | |
309 | ||
310 | static void | |
311 | tic6x_fill_gregset (struct regcache *regcache, void *buf) | |
312 | { | |
3491a34c | 313 | auto regset = static_cast<union tic6x_register *> (buf); |
58dbd541 YQ |
314 | int i; |
315 | ||
316 | for (i = 0; i < TIC6X_NUM_REGS; i++) | |
317 | if (tic6x_regmap[i] != -1) | |
318 | tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]); | |
319 | } | |
320 | ||
321 | static void | |
322 | tic6x_store_gregset (struct regcache *regcache, const void *buf) | |
323 | { | |
3491a34c | 324 | const auto regset = static_cast<const union tic6x_register *> (buf); |
58dbd541 YQ |
325 | int i; |
326 | ||
327 | for (i = 0; i < TIC6X_NUM_REGS; i++) | |
328 | if (tic6x_regmap[i] != -1) | |
329 | tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]); | |
330 | } | |
331 | ||
3aee8918 | 332 | static struct regset_info tic6x_regsets[] = { |
58dbd541 YQ |
333 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS, |
334 | tic6x_fill_gregset, tic6x_store_gregset }, | |
50bc912a | 335 | NULL_REGSET |
58dbd541 YQ |
336 | }; |
337 | ||
797bcff5 TBA |
338 | void |
339 | tic6x_target::low_arch_setup () | |
3aee8918 | 340 | { |
506fe5f4 YQ |
341 | register unsigned int csr asm ("B2"); |
342 | unsigned int cpuid; | |
343 | enum c6x_feature feature = C6X_CORE; | |
344 | ||
345 | /* Determine the CPU we're running on to find the register order. */ | |
346 | __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :); | |
347 | cpuid = csr >> 24; | |
348 | switch (cpuid) | |
349 | { | |
350 | case 0x00: /* C62x */ | |
351 | case 0x02: /* C67x */ | |
352 | tic6x_regmap = tic6x_regmap_c62x; | |
353 | tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ | |
354 | feature = C6X_CORE; | |
355 | break; | |
356 | case 0x03: /* C67x+ */ | |
357 | tic6x_regmap = tic6x_regmap_c64x; | |
358 | tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ | |
359 | feature = C6X_GP; | |
360 | break; | |
361 | case 0x0c: /* C64x */ | |
362 | tic6x_regmap = tic6x_regmap_c64x; | |
363 | tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */ | |
364 | feature = C6X_GP; | |
365 | break; | |
366 | case 0x10: /* C64x+ */ | |
367 | case 0x14: /* C674x */ | |
368 | case 0x15: /* C66x */ | |
369 | tic6x_regmap = tic6x_regmap_c64xp; | |
370 | tic6x_breakpoint = 0x56454314; /* illegal opcode */ | |
371 | feature = C6X_C6XP; | |
372 | break; | |
373 | default: | |
374 | error ("Unknown CPU ID 0x%02x", cpuid); | |
375 | } | |
376 | tic6x_usrregs_info.regmap = tic6x_regmap; | |
377 | ||
378 | current_process ()->tdesc = tic6x_read_description (feature); | |
3aee8918 PA |
379 | } |
380 | ||
7d00775e AT |
381 | /* Support for hardware single step. */ |
382 | ||
383 | static int | |
384 | tic6x_supports_hardware_single_step (void) | |
385 | { | |
386 | return 1; | |
387 | } | |
388 | ||
3aee8918 PA |
389 | static struct regsets_info tic6x_regsets_info = |
390 | { | |
391 | tic6x_regsets, /* regsets */ | |
392 | 0, /* num_regsets */ | |
393 | NULL, /* disabled_regsets */ | |
394 | }; | |
395 | ||
aa8d21c9 | 396 | static struct regs_info myregs_info = |
3aee8918 PA |
397 | { |
398 | NULL, /* regset_bitmap */ | |
399 | &tic6x_usrregs_info, | |
400 | &tic6x_regsets_info | |
401 | }; | |
402 | ||
aa8d21c9 TBA |
403 | const regs_info * |
404 | tic6x_target::get_regs_info () | |
3aee8918 | 405 | { |
aa8d21c9 | 406 | return &myregs_info; |
3aee8918 PA |
407 | } |
408 | ||
58dbd541 | 409 | struct linux_target_ops the_low_target = { |
58dbd541 YQ |
410 | tic6x_get_pc, |
411 | tic6x_set_pc, | |
dd373349 AT |
412 | NULL, /* breakpoint_kind_from_pc */ |
413 | tic6x_sw_breakpoint_from_kind, | |
58dbd541 YQ |
414 | NULL, |
415 | 0, | |
416 | tic6x_breakpoint_at, | |
7d00775e AT |
417 | NULL, /* supports_z_point_type */ |
418 | NULL, /* insert_point */ | |
419 | NULL, /* remove_point */ | |
420 | NULL, /* stopped_by_watchpoint */ | |
421 | NULL, /* stopped_data_address */ | |
422 | NULL, /* collect_ptrace_register */ | |
423 | NULL, /* supply_ptrace_register */ | |
424 | NULL, /* siginfo_fixup */ | |
425 | NULL, /* new_process */ | |
04ec7890 | 426 | NULL, /* delete_process */ |
7d00775e | 427 | NULL, /* new_thread */ |
466eecee | 428 | NULL, /* delete_thread */ |
7d00775e AT |
429 | NULL, /* new_fork */ |
430 | NULL, /* prepare_to_resume */ | |
431 | NULL, /* process_qsupported */ | |
432 | NULL, /* supports_tracepoints */ | |
433 | NULL, /* get_thread_area */ | |
434 | NULL, /* install_fast_tracepoint_jump_pad */ | |
435 | NULL, /* emit_ops */ | |
436 | NULL, /* get_min_fast_tracepoint_insn_len */ | |
437 | NULL, /* supports_range_stepping */ | |
438 | NULL, /* breakpoint_kind_from_current_state */ | |
439 | tic6x_supports_hardware_single_step, | |
58dbd541 | 440 | }; |
3aee8918 | 441 | |
506fe5f4 | 442 | #if GDB_SELF_TEST |
268a13a5 | 443 | #include "gdbsupport/selftest.h" |
506fe5f4 YQ |
444 | |
445 | namespace selftests { | |
446 | namespace tdesc { | |
447 | static void | |
448 | tic6x_tdesc_test () | |
449 | { | |
450 | SELF_CHECK (*tdesc_tic6x_c62x_linux == *tic6x_read_description (C6X_CORE)); | |
451 | SELF_CHECK (*tdesc_tic6x_c64x_linux == *tic6x_read_description (C6X_GP)); | |
452 | SELF_CHECK (*tdesc_tic6x_c64xp_linux == *tic6x_read_description (C6X_C6XP)); | |
453 | } | |
454 | } | |
455 | } | |
456 | #endif | |
457 | ||
ef0478f6 TBA |
458 | /* The linux target ops object. */ |
459 | ||
460 | linux_process_target *the_linux_target = &the_tic6x_target; | |
461 | ||
3aee8918 PA |
462 | void |
463 | initialize_low_arch (void) | |
464 | { | |
506fe5f4 | 465 | #if GDB_SELF_TEST |
3aee8918 PA |
466 | /* Initialize the Linux target descriptions. */ |
467 | init_registers_tic6x_c64xp_linux (); | |
468 | init_registers_tic6x_c64x_linux (); | |
469 | init_registers_tic6x_c62x_linux (); | |
470 | ||
506fe5f4 YQ |
471 | selftests::register_test ("tic6x-tdesc", selftests::tdesc::tic6x_tdesc_test); |
472 | #endif | |
473 | ||
3aee8918 PA |
474 | initialize_regsets_info (&tic6x_regsets_info); |
475 | } |