projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
i386: Remove the unused bfd pointer argument
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
0a59decb
L		 12018-12-14 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR ld/23900
4 * elf/common.h (PT_GNU_PROPERTY): New.
5 (GNU_PROPERTY_X86_UINT32_VALID): Removed.
6
69799d67
NC		 72018-12-11 Nick Clifton <nickc@redhat.com>
8
9 PR 88409
10 * demangle.h (DEMANGLE_RECURSION_LIMIT): Increase to 2048.
11
d2ef37eb
L		 122018-12-07 H.J. Lu <hongjiu.lu@intel.com>
13
14 * bfdlink.h (bfd_link_info): Add has_map_file.
15
af03af8f
NC		 162018-12-07 Nick Clifton <nickc@redhat.com>
17
18 * demangle.h (DMGL_NO_RECURSE_LIMIT): Define.
19 (DEMANGLE_RECURSION_LIMIT): Define
20
bb6bf75e
AM		 212018-12-06 Alan Modra <amodra@gmail.com>
22
23 * opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
24
884b49e3
AB		 252018-12-06 Andrew Burgess <andrew.burgess@embecosm.com>
26
27 * dis-asm.h (riscv_symbol_is_valid): Declare.
28 * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
29 (RISCV_FAKE_LABEL_CHAR): Define.
30
1080bf78
JW		 312018-12-03 Kito Cheng <kito@andestech.com>
32
33 * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
34 unsigned.
35
4765cd61
JW		 362018-11-27 Jim Wilson <jimw@sifive.com>
37
38 * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
39 (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
40
497d849d
TP		 412018-11-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
42
43 * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
44 (ARM_ARCH_V6M_ONLY): Remove.
45 (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
46 ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
47 ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
48 ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
49 ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
50 ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
51 ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
52 ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
53 ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
54 ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
55 ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
56 ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
57 FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
58 FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
59 FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
60 FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
61 FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
62 FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
63 ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
64 ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
65 ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
66 ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
67 ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
68 ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
69 ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
70 ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
71 ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
72 ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
73 ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
74 ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
75 ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
76 FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
77 FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
78 FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
79 FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
80 FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
81 FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
82 FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
83 FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
84 FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
85 FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
86 FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
87 FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
88 FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
89 ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
90 ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
91 ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
92 ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
93 ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
94 ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
95 ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
96 ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
97 ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
98 ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
99
503ba600
SD		 1002018-11-12 Sudakshina Das <sudi.das@arm.com>
101
102 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
103 (aarch64_insn_class): Add ldstgv_indexed.
104
fb3265b3
SD		 1052018-11-12 Sudakshina Das <sudi.das@arm.com>
106
107 * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
108 and AARCH64_OPND_ADDR_SIMM13.
109 (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
110
193614f2
SD		 1112018-11-12 Sudakshina Das <sudi.das@arm.com>
112
113 * opcode/aarch64.h (aarch64_opnd): Add
114 AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
115
73b605ec
SD		 1162018-11-12 Sudakshina Das <sudi.das@arm.com>
117
118 * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
119
fc7b364a
RB		 1202018-11-07 Roman Bolshakov <r.bolshakov@yadro.com>
121 Saagar Jha <saagar@saagarjha.com>
122
123 * mach-o/external.h (mach_o_nversion_min_command_external): Rename
124 reserved to sdk.
125 (mach_o_note_command_external): New.
126 (mach_o_build_version_command_external): New.
127 * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
128 (BFD_MACH_O_LC_NOTE): Define.
129
ddea148b
NC		 1302018-11-06 Romain Margheriti <lilrom13@gmail.com>
131
132 PR 23742
133 * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
134
0632eeea
SD		 1352018-11-06 Sudakshina Das <sudi.das@arm.com>
136
137 * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
138 ARM_EXT2_SB to ...
139 (ARM_AEXT2_V8_5A): Here.
140
d7ded98f
JB		 1412018-10-26 John Baldwin <jhb@FreeBSD.org>
142
143 * elf/common.h (AT_FREEBSD_HWCAP2): Define.
144
104fefee
SD		 1452018-10-09 Sudakshina Das <sudi.das@arm.com>
146
147 * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
148 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
149
a97330e7
SD		 1502018-10-09 Sudakshina Das <sudi.das@arm.com>
151
152 * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
153 (AARCH64_FEATURE_ID_PFR2): New.
154 (AARCH64_ARCH_V8_5): Add both by default.
155
ff605452
SD		 1562018-10-09 Sudakshina Das <sudi.das@arm.com>
157
158 * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
159 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
160 (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
161 (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
162 define HINT #imm values.
163 (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
164
af4bcb4c
SD		 1652018-10-09 Sudakshina Das <sudi.das@arm.com>
166
167 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
168
3fd229a4
SD		 1692018-10-09 Sudakshina Das <sudi.das@arm.com>
170
171 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
172
2ac435d4
SD		 1732018-10-09 Sudakshina Das <sudi.das@arm.com>
174
175 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
176 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
177 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
178 (aarch64_sys_regs_sr): Declare new table.
179
68dfbb92
SD		 1802018-10-09 Sudakshina Das <sudi.das@arm.com>
181
182 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
183 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
184
13c60ad7
SD		 1852018-10-09 Sudakshina Das <sudi.das@arm.com>
186
187 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
188 (AARCH64_FEATURE_FRINTTS): New.
189 (AARCH64_ARCH_V8_5): Add both by default.
190
70d56181
SD		 1912018-10-09 Sudakshina Das <sudi.das@arm.com>
192
193 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
194 (AARCH64_ARCH_V8_5): New.
195
64029e93
AM		 1962018-10-08 Alan Modra <amodra@gmail.com>
197
198 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
199
dad0c3bf
SD		 2002018-10-05 Sudakshina Das <sudi.das@arm.com>
201
202 * opcode/arm.h (ARM_EXT2_PREDRES): New.
203 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
204
7fadb25d
SD		 2052018-10-05 Sudakshina Das <sudi.das@arm.com>
206
207 * opcode/arm.h (ARM_EXT2_SB): New.
208 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
209
23f233a5
SD		 2102018-10-05 Sudakshina Das <sudi.das@arm.com>
211
212 * opcode/arm.h (ARM_EXT2_V8_5A): New.
213 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
214
c8e98e36
SH		 2152018-10-05 Richard Henderson <rth@twiddle.net>
216
217 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
218 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
219 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
220 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
221 R_OR1K_SLO13, R_OR1K_PLTA26.
222
1c4f3780
RH		 2232018-10-05 Richard Henderson <rth@twiddle.net>
224
225 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
226 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
227 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
228
a68f4cd2
TC		 2292018-10-03 Tamar Christina <tamar.christina@arm.com>
230
231 * opcode/aarch64.h (aarch64_inst): Remove.
232 (enum err_type): Add ERR_VFI.
233 (aarch64_is_destructive_by_operands): New.
234 (init_insn_sequence): New.
235 (aarch64_decode_insn): Remove param name.
236
755b748f
TC		 2372018-10-03 Tamar Christina <tamar.christina@arm.com>
238
239 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
240 more arguments.
241
1d482394
TC		 2422018-10-03 Tamar Christina <tamar.christina@arm.com>
243
244 * opcode/aarch64.h (enum err_type): New.
245 (aarch64_decode_insn): Use it.
246
7e84b55d
TC		 2472018-10-03 Tamar Christina <tamar.christina@arm.com>
248
249 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
250 (aarch64_opcode_encode): Use it.
251
eae424ae
TC		 2522018-10-03 Tamar Christina <tamar.christina@arm.com>
253
254 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
255 extend flags field size.
256 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
257
007d2fe4
JD		 2582018-10-03 John Darrington <john@darrington.wattle.id.au>
259
260 * dis-asm.h (print_insn_s12z): New declaration.
261
64a336ac
PD		 2622018-10-02 Palmer Dabbelt <palmer@sifive.com>
263
264 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
265 (MASK_FENCE_TSO): Likewise.
266
eb528ad1
CM		 2672018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
268
269 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
270
95475e5d
L		 2712018-09-21 H.J. Lu <hongjiu.lu@intel.com>
272
273 PR binutils/23694
274 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
275 include zero size sections at start of PT_NOTE segment.
276
fbaf61ad
NC		 2772018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
278
279 * elf/nds32.h: Remove the unused target features.
280 * dis-asm.h (disassemble_init_nds32): Declared.
281 * elf/nds32.h (E_NDS32_NULL): Removed.
282 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
283 * opcode/nds32.h: Ident.
284 (N32_SUB6, INSN_LW): New macros.
285 (enum n32_opcodes): Updated.
286 * elf/nds32.h: Doc fixes.
287 * elf/nds32.h: Add R_NDS32_LSI.
288 * elf/nds32.h: Add new relocations for TLS.
289
3d282ac3
RO		 2902018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
291
292 * elf/common.h (AT_SUN_HWCAP): Rename to ...
293 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
294 compatibility.
295 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
296 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
297
af39b1c2
SM		 2982018-09-05 Simon Marchi <simon.marchi@ericsson.com>
299
300 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
301
4a969973
AM		 3022018-08-31 Alan Modra <amodra@gmail.com>
303
304 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
305 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
306 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
307 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
308
43135d3b
JW		 3092018-08-30 Kito Cheng <kito@andestech.com>
310
311 * opcode/riscv.h (MAX_SUBSET_NUM): New.
312 (riscv_opcode): Add xlen_requirement field and change type of
313 subset.
314
bd782c07
CX		 3152018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
316
9108bc33
CX		 317 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
318 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
319
3202018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
bd782c07
CX		 321
322 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
323 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
324
ac8cb70f
CX		 3252018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
326
327 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
328 E_MIPS_MACH_GS464.
329 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
330 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
331 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
332 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
333
a693765e
CX		 3342018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
335
336 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
337 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
338 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
339
bdc6c06e
CX		 3402018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
341
342 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
343 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
344 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
345
716c08de
CX		 3462018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
347
348 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
349 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
350 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
351
a9eafb08
L		 3522018-08-24 H.J. Lu <hongjiu.lu@intel.com>
353
354 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
355 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
356 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
357 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
358 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
359 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
360 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
361 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
362 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
363 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
364 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
365 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
366 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
367 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
368 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
369 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
370 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
371 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
372 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
373 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
374 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
375 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
376 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
377 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
378 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
379 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
380 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
381 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
382 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
383 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
384 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
385 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
386 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
387 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
388 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
389 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
390 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
391 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
392 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
393 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
394 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
395 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
396 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
397 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
398 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
399 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
400 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
401 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
402 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
403 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
404 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
405 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
406 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
407 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
408 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
409 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
410
aa7bca9b
L		 4112018-08-24 H.J. Lu <hongjiu.lu@intel.com>
412
413 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
414
ebf983a4 4152018-08-21 John Darrington <john@darrington.wattle.id.au>
4e57b456
JD		 416
417 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
418
9cf7e568
AM		 4192018-08-21 Alan Modra <amodra@gmail.com>
420
421 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
422 Mention use of "extract" function to provide default value.
423 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
424 (ppc_optional_operand_value): Rewrite to use extract function.
425
08a8fe2f 4262018-08-18 John Darrington <john@darrington.wattle.id.au>
7ba3ba91 427
d203b41a 428 * opcode/s12z.h: New file.
7ba3ba91 429
57285ade
RE		 4302018-08-09 Richard Earnshaw <rearnsha@arm.com>
431
432 * elf/arm.h: Updated comments for e_flags definitions.
433
db1e1b45 4342018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
435
436 * elf/arc.h (Tag_ARC_ATR_version): New tag.
437
b6523c37 4382018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
439
440 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
441
50320b1d 4422018-08-01 Richard Earnshaw <rearnsha@arm.com>
443
444 Copy over from GCC
445 2018-07-26 Martin Liska <mliska@suse.cz>
446
d203b41a 447 PR lto/86548
50320b1d 448 * libiberty.h (make_temp_file_with_prefix): New function.
449
eb41b248
JW		 4502018-07-30 Jim Wilson <jimw@sifive.com>
451
452 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
453 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
454 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
455
b8891f8d
AJ		 4562018-07-30 Andrew Jenner <andrew@codesourcery.com>
457
458 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
459 * elf/csky.h: New file.
460
2bb9bbe2
CX		 4612018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
462 Maciej W. Rozycki <macro@linux-mips.org>
463
464 * elf/mips.h (AFL_ASE_MASK): Correct typo.
465
fa758a70
AC		 4662018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
467
468 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
469
33cb30a1
AM		 4702018-07-26 Alan Modra <amodra@gmail.com>
471
472 * elf/ppc64.h: Specify byte offset to local entry for values
473 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
474 value for such functions when entering via global entry point.
475 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
476
67ce483b
AM		 4772018-07-24 Alan Modra <amodra@gmail.com>
478
479 PR 23430
480 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
481
8095d2f7
CX		 4822018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
483 Maciej W. Rozycki <macro@mips.com>
484
485 * elf/mips.h (AFL_ASE_MMI): New macro.
486 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
487 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
488
d5c928c0
MR		 4892018-07-17 Maciej W. Rozycki <macro@mips.com>
490
491 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
492
fe75810f
AM		 4932018-07-06 Alan Modra <amodra@gmail.com>
494
495 * diagnostics.h: Comment on macro usage.
496
6821842f
SM		 4972018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
498
499 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
500 Define for clang.
501
471b9d15
MR		 5022018-07-02 Maciej W. Rozycki <macro@mips.com>
503
504 PR tdep/8282
505 * dis-asm.h (disasm_option_arg_t): New typedef.
506 (disasm_options_and_args_t): Likewise.
507 (disasm_options_t): Add `arg' member, document members.
508 (disassembler_options_mips): New prototype.
509 (disassembler_options_arm, disassembler_options_powerpc)
510 (disassembler_options_s390): Update prototypes.
511
369c9167
TC		 5122018-06-29 Tamar Christina <tamar.christina@arm.com>
513
514 PR binutils/23192
515 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
516
2393a7e3
AM		 5172018-06-26 Alan Modra <amodra@gmail.com>
518
519 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
520
719d8288
NC		 5212018-06-24 Nick Clifton <nickc@redhat.com>
522
523 2.31 branch created.
524
57c0d77c
AH		 5252018-06-21 Alan Hayward <alan.hayward@arm.com>
526
527 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
528 for non SHT_NOBITS.
529
d856f9a8
SM		 5302018-06-19 Simon Marchi <simon.marchi@ericsson.com>
531
532 Sync with GCC
533
534 2018-05-24 Tom Rix <trix@juniper.net>
535
536 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
537
538 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
539
540 * longlong.h [__riscv] (__umulsidi3): Define.
541 [__riscv] (umul_ppmm): Likewise.
542 [__riscv] (__muluw3): Likewise.
543
6f20c942
FS		 5442018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
545
546 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
547 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
548 * opcode/mips.h: Document "+\" operand format.
549 (ASE_GINV): New macro.
550
730c3174
SE		 5512018-06-13 Scott Egerton <scott.egerton@imgtec.com>
552 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
553
554 * elf/mips.h (AFL_ASE_CRC): New macro.
555 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
556 * opcode/mips.h (ASE_CRC): New macro.
557 * opcode/mips.h (ASE_CRC64): Likewise.
558
4b8e28c7
MF		 5592018-06-04 Max Filippov <jcmvbkbc@gmail.com>
560
561 * elf/xtensa.h (xtensa_read_table_entries)
562 (xtensa_compute_fill_extra_space): New declarations.
563
95da9854
L		 5642018-06-04 H.J. Lu <hongjiu.lu@intel.com>
565
566 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
567 define for GCC.
568
23081219
L		 5692018-06-04 H.J. Lu <hongjiu.lu@intel.com>
570
571 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
572 (DIAGNOSTIC_STRINGIFY): Likewise.
573 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
574 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
575 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
576 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
577 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
578 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
579
e9cb46ab
L		 5802018-06-01 H.J. Lu <hongjiu.lu@intel.com>
581
582 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
583
22467434 5842018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
585
586 * splay-tree.h (splay_tree_compare_strings,
587 splay_tree_delete_pointers): Declare new utility functions.
588
98553ad3
PB		 5892018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
590
591 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
592
7f999549
JW		 5932018-05-18 Kito Cheng <kito.cheng@gmail.com>
594
595 * elf/riscv.h (EF_RISCV_RVE): New define.
596
7b4ae824
JD		 5972018-05-18 John Darrington <john@darrington.wattle.id.au>
598
599 * elf/s12z.h: New header.
600
f9830ec1
TC		 6012018-05-15 Tamar Christina <tamar.christina@arm.com>
602
603 PR binutils/21446
604 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
605
7d02540a
TC		 6062018-05-15 Tamar Christina <tamar.christina@arm.com>
607
608 PR binutils/21446
609 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
610 (aarch64_print_operand): Support notes.
611
561a72d4
TC		 6122018-05-15 Tamar Christina <tamar.christina@arm.com>
613
614 PR binutils/21446
615 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
616 (aarch64_decode_insn): Accept error struct.
617
1678bd35
FT		 6182018-05-15 Francois H. Theron <francois.theron@netronome.com>
619
620 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
621
637b1970
JD		 6222018-05-10 John Darrington <john@darrington.wattle.id.au>
623
624 * elf/common.h (EM_S12Z): New macro.
625
84f9f8c3
AM		 6262018-05-09 Sebastian Rasmussen <sebras@gmail.com>
627
628 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
629 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
630 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
631 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
632
e6f372ba
JW		 6332018-05-08 Jim Wilson <jimw@sifive.com>
634
635 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
636 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
637 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
638
2ceb7719
PB		 6392018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
640
641 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
642 (vle_num_opcodes): Likewise.
643 (spe2_num_opcodes): Likewise.
644
602f1657
AM		 6452018-05-04 Alan Modra <amodra@gmail.com>
646
647 * ansidecl.h: Import from gcc.
648 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
649 to s_name.
650 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
651
fe944acf
FT		 6522018-04-30 Francois H. Theron <francois.theron@netronome.com>
653
654 * dis-asm.h: Added print_nfp_disassembler_options prototype.
655 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
656 Generic System V Application Binary Interface.
657 * elf/nfp.h: New, for NFP support.
658 * opcode/nfp.h: New, for NFP support.
659
5c5a4843
CL		 6602018-04-25 Christophe Lyon <christophe.lyon@st.com>
661 Mickaël Guêné <mickael.guene@st.com>
662
663 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
664 R_ARM_TLS_IE32_FDPIC.
665
188fd7ae
CL		 6662018-04-25 Christophe Lyon <christophe.lyon@st.com>
667 Mickaël Guêné <mickael.guene@st.com>
668
669 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
670 (R_ARM_FUNCDESC)
671 (R_ARM_FUNCDESC_VALUE): Define new relocations.
672
18a20338
CL		 6732018-04-25 Christophe Lyon <christophe.lyon@st.com>
674 Mickaël Guêné <mickael.guene@st.com>
675
676 * elf/arm.h (EF_ARM_FDPIC): New.
677
3596d8ce
AM		 6782018-04-18 Alan Modra <amodra@gmail.com>
679
680 * coff/mipspe.h: Delete.
681
c65c21e1
AM		 6822018-04-18 Alan Modra <amodra@gmail.com>
683
684 * aout/dynix3.h: Delete.
685
884d4d8a 6862018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
3f0a5f17
ME		 687
688 Microblaze Target: PIC data text relative
689
690 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
691 * elf/microblaze.h (Add 3 new relocations):
692 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
693 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
694
f954747f
AM		 6952018-04-17 Alan Modra <amodra@gmail.com>
696
697 * elf/i370.h: Revert removal.
698 * elf/i860.h: Likewise.
699 * elf/i960.h: Likewise.
700
5452f388
AM		 7012018-04-16 Alan Modra <amodra@gmail.com>
702
703 * coff/sparc.h: Delete.
704
dc12032b
AM		 7052018-04-16 Alan Modra <amodra@gmail.com>
706
707 * aout/host.h: Remove m68k-aout and m68k-coff support.
708 * aout/hp300hpux.h: Delete.
709 * coff/apollo.h: Delete.
710 * coff/aux-coff.h: Delete.
711 * coff/m68k.h: Delete.
712
211dc24b
AM		 7132018-04-16 Alan Modra <amodra@gmail.com>
714
715 * dis-asm.h: Remove sh5 and sh64 support.
716
a9a4b302
AM		 7172018-04-16 Alan Modra <amodra@gmail.com>
718
719 * coff/internal.h: Remove w65 support.
720 * coff/w65.h: Delete.
721
04cb01fd
AM		 7222018-04-16 Alan Modra <amodra@gmail.com>
723
724 * coff/we32k.h: Delete.
725
c2bf1eec
AM		 7262018-04-16 Alan Modra <amodra@gmail.com>
727
728 * coff/internal.h: Remove m88k support.
729 * coff/m88k.h: Delete.
730 * opcode/m88k.h: Delete.
731
6793974d
AM		 7322018-04-16 Alan Modra <amodra@gmail.com>
733
734 * elf/i370.h: Delete.
735 * opcode/i370.h: Delete.
736
e82aa794
AM		 7372018-04-16 Alan Modra <amodra@gmail.com>
738
739 * coff/h8500.h: Delete.
740 * coff/internal.h: Remove h8500 support.
741
fe0bf0fd
AM		 7422018-04-16 Alan Modra <amodra@gmail.com>
743
744 * coff/h8300.h: Delete.
745
fdef3943
AM		 7462018-04-16 Alan Modra <amodra@gmail.com>
747
748 * ieee.h: Delete.
749
5972ac73
AM		 7502018-04-16 Alan Modra <amodra@gmail.com>
751
752 * aout/host.h: Remove newsos3 support.
753
b4b594e3
AM		 7542018-04-16 Alan Modra <amodra@gmail.com>
755
756 * nlm/ChangeLog-9315: Delete.
757 * nlm/alpha-ext.h: Delete.
758 * nlm/common.h: Delete.
759 * nlm/external.h: Delete.
760 * nlm/i386-ext.h: Delete.
761 * nlm/internal.h: Delete.
762 * nlm/ppc-ext.h: Delete.
763 * nlm/sparc32-ext.h: Delete.
764
fceadf09
AM		 7652018-04-16 Alan Modra <amodra@gmail.com>
766
767 * opcode/tahoe.h: Delete.
768
a8eb42a8
AM		 7692018-04-11 Alan Modra <amodra@gmail.com>
770
771 * aout/adobe.h: Delete.
772 * aout/reloc.h: Delete.
773 * coff/i860.h: Delete.
774 * coff/i960.h: Delete.
775 * elf/i860.h: Delete.
776 * elf/i960.h: Delete.
777 * opcode/i860.h: Delete.
778 * opcode/i960.h: Delete.
779 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
780 * aout/ar.h (ARMAGB): Remove.
781 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
782 union internal_auxent): Remove i960 support.
783
23cedd1d
AM		 7842018-04-09 Alan Modra <amodra@gmail.com>
785
786 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
787 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
788
84f1b9fb
RL		 7892018-03-28 Renlin Li <renlin.li@arm.com>
790
791 PR ld/22970
792 * elf/aarch64.h: Add relocation number for
793 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
794 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
795 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
796 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
797 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
798 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
799 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
800 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
801
c8d59609
NC		 8022018-03-28 Nick Clifton <nickc@redhat.com>
803
804 PR 22988
805 * opcode/aarch64.h (enum aarch64_opnd): Add
806 AARCH64_OPND_SVE_ADDR_R.
807
b1202ffa
L		 8082018-03-21 H.J. Lu <hongjiu.lu@intel.com>
809
810 * elf/common.h (DF_1_KMOD): New.
811 (DF_1_WEAKFILTER): Likewise.
812 (DF_1_NOCOMMON): Likewise.
813
0e35537d
JW		 8142018-03-14 Kito Cheng <kito.cheng@gmail.com>
815
816 * opcode/riscv.h (OP_MASK_FUNCT3): New.
817 (OP_SH_FUNCT3): Likewise.
818 (OP_MASK_FUNCT7): Likewise.
819 (OP_SH_FUNCT7): Likewise.
820 (OP_MASK_OP2): Likewise.
821 (OP_SH_OP2): Likewise.
822 (OP_MASK_CFUNCT4): Likewise.
823 (OP_SH_CFUNCT4): Likewise.
824 (OP_MASK_CFUNCT3): Likewise.
825 (OP_SH_CFUNCT3): Likewise.
826 (riscv_insn_types): Likewise.
827
3e33b239
NC		 8282018-03-13 Nick Clifton <nickc@redhat.com>
829
830 PR 22113
831 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
832 field.
833
bd5dea88
L		 8342018-03-08 H.J. Lu <hongjiu.lu@intel.com>
835
836 * opcode/i386 (OLDGCC_COMPAT): Removed.
837
5b616bef
TP		 8382018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
839
840 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
841
75f31665
MR		 8422018-02-20 Maciej W. Rozycki <macro@mips.com>
843
844 * opcode/mips.h: Remove `M' operand code.
845
830db048
ZF		 8462018-02-12 Zebediah Figura <z.figura12@gmail.com>
847
848 * coff/msdos.h: New header.
849 * coff/pe.h: Move common defines to msdos.h.
850 * coff/powerpc.h: Likewise.
851
faf766e3
NC		 8522018-01-13 Nick Clifton <nickc@redhat.com>
853
854 2.30 branch created.
855
47acac12
L		 8562018-01-11 H.J. Lu <hongjiu.lu@intel.com>
857
858 PR ld/22393
859 * bfdlink.h (bfd_link_info): Add separate_code.
860
645a2c5b
JW		 8612018-01-04 Jim Wilson <jimw@sifive.com>
862
863 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
864 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
865 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
866 Add alias to map mbadaddr to CSR_MTVAL.
867
219d1afa
AM		 8682018-01-03 Alan Modra <amodra@gmail.com>
869
870 Update year range in copyright notice of all files.
871
1e563868 872For older changes see ChangeLog-2017
3499769a 873\f
1e563868 874Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 875
876Copying and distribution of this file, with or without modification,
877are permitted in any medium without royalty provided the copyright
878notice and this notice are preserved.
879
880Local Variables:
881mode: change-log
882left-margin: 8
883fill-column: 74
884version-control: never
885End:
GDB Binutils - Deliverables
This page took 0.188773 seconds and 4 git commands to generate.