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Sync config, include and libiberty with GCC
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
727b7b18
L		 12020-06-24 H.J. Lu <hongjiu.lu@intel.com>
2
3 Sync with GCC
4 2020-06-23 Nick Alcock <nick.alcock@oracle.com>
5
6 * libiberty.h (bsearch_r): New.
7
8 2020-04-17 Martin Liska <mliska@suse.cz>
9 Jonathan Yong <10walls@gmail.com>
10
11 PR gcov-profile/94570
12 * filenames.h (defined): Do not define HAVE_DOS_BASED_FILE_SYSTEM
13 for CYGWIN.
14
359157df
AC		 152020-06-22 Alex Coplan <alex.coplan@arm.com>
16
17 * opcode/aarch64.h (AARCH64_FEATURE_SHA2): Normalize.
18 (AARCH64_FEATURE_AES): Likewise.
19 (AARCH64_FEATURE_V8_4): Likewise.
20 (AARCH64_FEATURE_SM4): Likewise.
21 (AARCH64_FEATURE_SHA3): Likewise.
22 (AARCH64_FEATURE_V8): Likewise.
23 (AARCH64_FEATURE_V8_2): Likewise.
24 (AARCH64_FEATURE_V8_3): Likewise.
25 (AARCH64_FEATURE_FP): Likewise.
26 (AARCH64_FEATURE_SIMD): Likewise.
27 (AARCH64_FEATURE_CRC): Likewise.
28 (AARCH64_FEATURE_LSE): Likewise.
29 (AARCH64_FEATURE_PAN): Likewise.
30 (AARCH64_FEATURE_LOR): Likewise.
31 (AARCH64_FEATURE_RDMA): Likewise.
32 (AARCH64_FEATURE_V8_1): Likewise.
33 (AARCH64_FEATURE_F16): Likewise.
34 (AARCH64_FEATURE_RAS): Likewise.
35 (AARCH64_FEATURE_PROFILE): Likewise.
36 (AARCH64_FEATURE_SVE): Likewise.
37 (AARCH64_FEATURE_RCPC): Likewise.
38 (AARCH64_FEATURE_COMPNUM): Likewise.
39 (AARCH64_FEATURE_DOTPROD): Likewise.
40 (AARCH64_FEATURE_F16_FML): Likewise.
41 (AARCH64_FEATURE_V8_5): Likewise.
42 (AARCH64_FEATURE_V8_6): Likewise.
43 (AARCH64_FEATURE_BFLOAT16): Likewise.
44 (AARCH64_FEATURE_FLAGMANIP): Likewise.
45 (AARCH64_FEATURE_FRINTTS): Likewise.
46 (AARCH64_FEATURE_SB): Likewise.
47 (AARCH64_FEATURE_PREDRES): Likewise.
48 (AARCH64_FEATURE_CVADP): Likewise.
49 (AARCH64_FEATURE_RNG): Likewise.
50 (AARCH64_FEATURE_BTI): Likewise.
51 (AARCH64_FEATURE_SCXTNUM): Likewise.
52 (AARCH64_FEATURE_ID_PFR2): Likewise.
53 (AARCH64_FEATURE_SSBS): Likewise.
54 (AARCH64_FEATURE_MEMTAG): Likewise.
55 (AARCH64_FEATURE_TME): Likewise.
56 (AARCH64_FEATURE_I8MM): Likewise.
57 (AARCH64_FEATURE_F32MM): Likewise.
58 (AARCH64_FEATURE_F64MM): Likewise.
59 (AARCH64_FEATURE_SVE2): Likewise.
60 (AARCH64_FEATURE_SVE2_AES): Likewise.
61 (AARCH64_FEATURE_SVE2_BITPERM): Likewise.
62 (AARCH64_FEATURE_SVE2_SM4): Likewise.
63 (AARCH64_FEATURE_SVE2_SHA3): Likewise.
64
d768f160
SJ		 652020-06-22 Saagar Jha <saagar@saagarjha.com>
66
67 * mach-o/loader.h: Add declarations of two new Mach-O load
68 commands.
69
39ff0b81
NC		 702020-06-22 Nelson Chu <nelson.chu@sifive.com>
71
72 * opcode/riscv.h (riscv_get_priv_spec_class): Move the function
73 forward declarations to bfd/elfxx-riscv.h.
74 (riscv_get_priv_spec_name): Likewise.
75
7a77f1ac
MF		 762020-06-15 Max Filippov <jcmvbkbc@gmail.com>
77
78 * elf/xtensa.h (xtensa_abi_choice): New declaration.
79
cae64165
RM		 802020-06-12 Roland McGrath <mcgrathr@google.com>
81
82 * bfdlink.h (struct bfd_link_info): New field start_stop_visibility.
83
d8af286f
NC		 842020-06-12 Nelson Chu <nelson.chu@sifive.com>
85
86 * opcode/riscv-opc.h: Update the defined versions of CSR from
87 PRIV_SPEC_CLASS_1P9 to PRIV_SPEC_CLASS_1P9P1. Also, drop the
88 MISA DECLARE_CSR_ALIAS since it's aborted version is v1.9.
89 * opcode/riscv.h (enum riscv_priv_spec_class): Remove
90 PRIV_SPEC_CLASS_1P9.
91
14962256
AC		 922020-06-11 Alex Coplan <alex.coplan@arm.com>
93
94 * opcode/aarch64.h (aarch64_sys_reg): Add required features to struct
95 describing system registers.
96
d0c4e780
AM		 972020-06-11 Alan Modra <amodra@gmail.com>
98
99 * elf/mips.h (Elf32_RegInfo): Use fixed width integer types.
100 (Elf64_Internal_RegInfo, Elf_Internal_Options): Likewise.
101
87c69f97
AM		 1022020-06-06 Alan Modra <amodra@gmail.com>
103
104 * elf/ppc64.h (elf_ppc64_reloc_type): Rename
105 R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
106 R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
107 R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
108 R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
109
e9bffec9
JM		 1102020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
111
112 * opcode/cgen.h: Get an `endian' argument in both
113 cgen_get_insn_value and cgen_put_insn_value.
114
b3db6d07
JM		 1152020-06-04 Jose E. Marchesi <jemarch@gnu.org>
116
117 * opcode/cgen.h (enum cgen_cpu_open_arg): New value
118 CGEN_CPU_OPEN_INSN_ENDIAN.
119
44730156
NC		 1202020-06-03 Nelson Chu <nelson.chu@sifive.com>
121
122 * opcode/riscv.h: Remove #include "bfd.h". And change the return
123 types of riscv_get_isa_spec_class and riscv_get_priv_spec_class
124 from bfd_boolean to int.
125
8eff95bc
AM		 1262020-05-28 Alan Modra <amodra@gmail.com>
127
128 PR 26044
129 * opcode/tilepro.h (TILEPRO_NUM_PIPELINE_ENCODINGS): Move to
130 tilepro_pipeline enum.
131
a6dbf402
L		 1322020-05-27 H.J. Lu <hongjiu.lu@intel.com>
133
134 PR ld/22909
135 * bfdlink.h (textrel_check_method): New enum.
136 (bfd_link_textrel_check): New.
137 (bfd_link_info): Replace warn_shared_textrel and error_textrel
138 with textrel_check.
139
68dc60e6
L		 1402020-05-25 H.J. Lu <hongjiu.lu@intel.com>
141
142 * elf/common.h: Update comments for ET_EXEC and ET_DYN.
143
8f595e9b
NC		 1442020-05-20 Nelson Chu <nelson.chu@sifive.com>
145
146 * opcode/riscv.h: Include "bfd.h" to support bfd_boolean.
147 (enum riscv_isa_spec_class): New enum class. All supported ISA spec
148 belong to one of the class
149 (struct riscv_ext_version): New structure holds version information
150 for the specific ISA.
151 * opcode/riscv-opc.h (DECLARE_CSR): There are two version information,
152 define_version and abort_version. The define_version means which
153 privilege spec is started to define the CSR, and the abort_version
154 means which privilege spec is started to abort the CSR. If the CSR is
155 valid for the newest spec, then the abort_version should be
156 PRIV_SPEC_CLASS_DRAFT.
157 (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
158 * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define
159 the current supported privilege spec versions.
160 (struct riscv_csr_extra): Add new fields to store more information
161 about the CSR. We use these information to find the suitable CSR
162 address when user choosing a specific privilege spec.
163
164446e0
AF		 1642020-05-19 Alexander Fedotov <alfedotov@gmail.com>
165
166 PR 25992
167 * opcode/arm.h (ARM_EXT2_V8R): Define. Modified ARM_AEXT2_V8R.
168
aa3c112f
AM		 1692020-05-11 Alan Modra <amodra@gmail.com>
170
171 * opcode/ppc.h (PPC_OPERAND_ACC): Define. Renumber following
172 PPC_OPERAND defines.
173
7c1f4227
AM		 1742020-05-11 Alan Modra <amodra@gmail.com>
175
176 * elf/ppc64.h: Update comment.
177 * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
178
09c1e68a
AC		 1792020-04-30 Alex Coplan <alex.coplan@arm.com>
180
181 * opcode/aarch64.h (enum aarch64_opnd): Add
182 AARCH64_OPND_UNDEFINED.
183
27456742
AK		 1842020-04-23 Anton Kolesov <anton.kolesov@synopsys.com>
185
186 * elf/common.h (NT_ARC_V2): New macro definitions.
187
30ce8e47
MF		 1882020-04-22 Max Filippov <jcmvbkbc@gmail.com>
189
190 PR ld/25861
191 * elf/xtensa.h (elf_xtensa_reloc_type): New entries for
192 R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
193
fad3d2c1
AM		 1942020-04-21 Alan Modra <amodra@gmail.com>
195
196 * elf/sh.h (STO_SH5_ISA32, SHF_SH5_ISA32, SHF_SH5_ISA32_MIXED),
197 (SHT_SH5_CR_SORTED, STT_DATALABEL): Delete.
198
95a51568
FS		 1992020-04-10 Fangrui Song <maskray@google.com>
200
201 PR binutils/24613
202 * bfdlink.h (enum report_method): Delete RM_GENERATE_WARNING and
203 RM_GENERATE_ERROR. Add RM_DIAGNOSE.
204 (struct bfd_link_info): Add warn_unresolved_syms.
205
fa1477dc
SC		 2062020-04-14 Stephen Casner <casner@acm.org>
207
208 PR ld/25677
209 * aout/aout64.h (N_DATADDR): Add IMAGIC case.
210
4d095f5b
JJ		 2112020-04-02 Jan W. Jagersma <jwjagersma@gmail.com>
212
213 * coff/go32exe.h: Remove file.
214 * coff/internal.h (struct internal_filehdr): Remove field
215 go32stub. Remove flag F_GO32STUB.
216
40bd13ce
ML		 2172020-04-01 Martin Liska <mliska@suse.cz>
218 Maciej W. Rozycki <macro@linux-mips.org>
219
220 PR lto/94249
221 * plugin-api.h: Fix a typo.
222
d1a89da5
NC		 2232020-03-30 Nelson Chu <nelson.chu@sifive.com>
224
225 * opcode/riscv-opc.h: Update CSR to 1.11.
226
a879b4d5
JB		 2272020-03-26 John Baldwin <jhb@FreeBSD.org>
228
229 * elf/common.h (AT_FREEBSD_BSDFLAGS): Define.
230
dfb68cc3
ML		 2312020-03-24 Martin Liska <mliska@suse.cz>
232
233 PR lto/94249
234 * plugin-api.h: Add more robust endianess detection.
235
e3b1fa32
ML		 2362020-03-21 Martin Liska <mliska@suse.cz>
237
238 * plugin-api.h (enum ld_plugin_symbol_type): Remove
239 comma after last value of an enum.
240 * lto-symtab.h (enum gcc_plugin_symbol_type): Likewise.
241
3734bec8
ML		 2422020-03-19 Martin Liska <mliska@suse.cz>
243
244 * lto-symtab.h (enum gcc_plugin_symbol_type): New.
245 (enum gcc_plugin_symbol_section_kind): Likewise.
246
2472020-03-19 Martin Liska <mliska@suse.cz>
248
249 * plugin-api.h (struct ld_plugin_symbol): Split
250 int def into 4 char fields.
251 (enum ld_plugin_symbol_type): New.
252 (enum ld_plugin_symbol_section_kind): New.
253 (enum ld_plugin_tag): Add LDPT_ADD_SYMBOLS_V2.
254
06d949ec
KR		 2552020-03-13 Kamil Rytarowski <n54@gmx.com>
256
257 * elf/common.h (NT_NETBSDCORE_LWPSTATUS): New define.
258
2592020-03-13 Kamil Rytarowski <n54@gmx.com>
9fcbd8a9
KR		 260
261 * elf/common.h (NT_NETBSDCORE_AUXV): New define.
262
abf874aa
CL		 2632020-03-13 Christophe Lyon <christophe.lyon@linaro.org>
264
265 * bfdlink.h (bfd_link_info): Add non_contiguous_regions and
266 non_contiguous_regions_warnings fields.
267
66631823
CE		 2682020-03-13 Christian Eggers <ceggers@gmx.de>
269
270 * bfdlink.h (struct bfd_link_order): Add unit (bytes/octets) to
271 offset and size members.
272 * elf/internal.h (struct elf_internal_phdr): Likewise for
273 p_align member.
274 (struct elf_segment_map): Likewise for p_paddr and p_size
275 members
276
502794d4
CE		 2772020-03-13 Christian Eggers <ceggers@gmx.de>
278
279 * elf/internal.h (struct elf_internal_phdr): Add unit (octets)
280 to several member field comments.
281 (Elf_Internal_Shdr): likewise.
282
e10ac147
AM		 2832020-03-10 Alan Modra <amodra@gmail.com>
284
285 * som/aout.h (SOM_AUX_ID_MANDATORY, SOM_SPACE_IS_LOADABLE),
286 (SOM_SYMBOL_HIDDEN, SOM_SYMBOL_HAS_LONG_RETURN): Use 1u << 31.
287 * som/lst.h (LST_SYMBOL_HIDDEN): Likewise.
288
b5ebe8dd
LM		 2892020-03-03 Luis Machado <luis.machado@linaro.org>
290
291 * elf/common.h (AT_L1I_CACHESIZE, AT_L1I_CACHEGEOMETRY)
292 (AT_L1D_CACHESIZE, AT_L1D_CACHEGEOMETRY, AT_L2_CACHESIZE)
293 (AT_L2_CACHEGEOMETRY, AT_L3_CACHESIZE, AT_L3_CACHEGEOMETRY)
294 (AT_MINSIGSTKSZ): New defines, imported from glibc.
295
99e47410
AB		 2962020-02-25 Andrew Burgess <andrew.burgess@embecosm.com>
297
298 Import from gcc mainline:
299 2020-02-05 Andrew Burgess <andrew.burgess@embecosm.com>
300
301 * hashtab.h (htab_remove_elt): Make a parameter const.
302 (htab_remove_elt_with_hash): Likewise.
303
bd0cf5a6
NC		 3042020-02-20 Nelson Chu <nelson.chu@sifive.com>
305
306 * opcode/riscv-opc.h: Extend DECLARE_CSR and DECLARE_CSR_ALIAS to
307 record riscv_csr_class.
308
4934a27c
MM		 3092020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
310 Matthew Malcomson <matthew.malcomson@arm.com>
311
312 * opcode/arm.h (ARM_EXT2_CDE): New extension macro.
313 (ARM_EXT2_CDE0): New extension macro.
314 (ARM_EXT2_CDE1): New extension macro.
315 (ARM_EXT2_CDE2): New extension macro.
316 (ARM_EXT2_CDE3): New extension macro.
317 (ARM_EXT2_CDE4): New extension macro.
318 (ARM_EXT2_CDE5): New extension macro.
319 (ARM_EXT2_CDE6): New extension macro.
320 (ARM_EXT2_CDE7): New extension macro.
321
9fc0b501
SB		 3222020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
323
324 PR 25469
325 * coff/internal.h (R_IMM16BE): Define.
326 * elf/z80.h (EF_Z80_MACH_Z80N): Define.
327 (R_Z80_16_BE): New reloc.
328
c5d7be0c
AM		 3292020-02-04 Alan Modra <amodra@gmail.com>
330
331 * opcode/d30v.h (struct pd_reg): Make value field unsigned.
332
1957ab10
JT		 3332020-01-16 Jon Turney <jon.turney@dronecode.org.uk>
334
335 * coff/internal.h (PE_IMAGE_DEBUG_TYPE_VC_FEATURE)
336 (PE_IMAGE_DEBUG_TYPE_POGO, PE_IMAGE_DEBUG_TYPE_ILTCG)
337 (PE_IMAGE_DEBUG_TYPE_MPX, PE_IMAGE_DEBUG_TYPE_REPRO): Add.
338
ae774686
NC		 3392020-01-18 Nick Clifton <nickc@redhat.com>
340
341 Binutils 2.34 branch created.
342
533da483
NC		 3432020-01-17 Nick Clifton <nickc@redhat.com>
344
345 * Import from gcc mainline:
346 2019-06-10 Martin Liska <mliska@suse.cz>
347
348 * ansidecl.h (ATTRIBUTE_WARN_UNUSED_RESULT): New macro.
349 * libiberty.h (xmalloc): Use it.
350 (xrealloc): Likewise.
351 (xcalloc): Likewise.
352 (xstrdup): Likewise.
353 (xstrndup): Likewise.
354 (xmemdup): Likewise.
355
356 2019-06-10 Martin Liska <mliska@suse.cz>
357
358 * ansidecl.h:
359 (ATTRIBUTE_RESULT_SIZE_1): Define new macro.
360 (ATTRIBUTE_RESULT_SIZE_2): Likewise.
361 (ATTRIBUTE_RESULT_SIZE_1_2): Likewise.
362 * libiberty.h (xmalloc): Add RESULT_SIZE attribute.
363 (xrealloc): Likewise.
364 (xcalloc): Likewise.
365
366 2019-11-16 Tim Ruehsen <tim.ruehsen@gmx.de>
367
368 * demangle.h (struct demangle_component): Add member
369 d_counting.
370
371 2019-11-16 Eduard-Mihai Burtescu <eddyb@lyken.rs>
372
373 * demangle.h (rust_demangle_callback): Add.
374
375 2019-07-18 Eduard-Mihai Burtescu <eddyb@lyken.rs>
376
377 * demangle.h (rust_is_mangled): Move to libiberty/rust-demangle.h.
378 (rust_demangle_sym): Move to libiberty/rust-demangle.h.
379
2da2eaf4
AV		 3802020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
381
382 PR 25376
383 * opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to...
384 (ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space.
385 (ARM_ANY): Redefine to not include any MVE bits.
386 (ARM_FEATURE_ALL): Removed.
387
131cb553
JL		 3882020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
389
390 * opcode/msp430.h (enum msp430_expp_e): New.
391 (struct msp430_operand_s): Add expp member to struct.
392
39fe16e0
CZ		 3932020-01-13 Claudiu Zissulescu <claziss@gmail.com>
394
395 * elf/arc-cpu.def: Update ARC cpu list.
396
5496abe1
AM		 3972020-01-13 Alan Modra <amodra@gmail.com>
398
399 * opcode/tic4x.h (EXTR): Delete.
400 (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
401 extension using shifts. Do trim INSERTU value to specified bitfield.
402
8948cc69
AM		 4032020-01-10 Alan Modra <amodra@gmail.com>
404
405 * opcode/spu.h: Formatting.
406 (UNSIGNED_EXTRACT): Use 1u.
407 (SIGNED_EXTRACT): Don't sign extend with shifts.
408 (DECODE_INSN_I9a, DECODE_INSN_I9b): Avoid left shift of signed value.
409 Keep result signed.
410 (DECODE_INSN_U9a, DECODE_INSN_U9b): Delete.
411
bb82aefe
SV		 4122020-01-07 Shahab Vahedi <shahab@synopsys.com>
413
414 * opcode/arc.h (insn_class_t): Add 'LLOCK' and 'SCOND'.
415
6655dba2
SB		 4162020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
417
418 * coff/internal.h: Add defintions of Z80 reloc names.
419
d73b58f4
NC		 4202020-01-02 Christian Biesinger <cbiesinger@google.com>
421
422 * opcode/s12z.h: Undef REG_Y.
423
b14ce8bf
AM		 4242020-01-01 Alan Modra <amodra@gmail.com>
425
426 Update year range in copyright notice of all files.
427
0b114740 428For older changes see ChangeLog-2019
3499769a 429\f
0b114740 430Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 431
432Copying and distribution of this file, with or without modification,
433are permitted in any medium without royalty provided the copyright
434notice and this notice are preserved.
435
436Local Variables:
437mode: change-log
438left-margin: 8
439fill-column: 74
440version-control: never
441End:
GDB Binutils - Deliverables
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