Commit | Line | Data |
---|---|---|
fa1c0170 CZ |
1 | 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com> |
2 | ||
3 | * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation. | |
4 | ||
f0728ee3 AV |
5 | 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com> |
6 | ||
7 | * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ... | |
8 | (SHF_ARM_PURECODE): ... this. | |
9 | ||
93d8990c SN |
10 | 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com> |
11 | ||
12 | * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New. | |
13 | (AARCH64_CPU_HAS_ANY_FEATURES): New. | |
14 | (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES. | |
15 | (AARCH64_OPCODE_HAS_FEATURE): Remove. | |
16 | ||
534dbe46 MW |
17 | 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> |
18 | ||
19 | * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set | |
20 | of enabled FPU features. | |
21 | ||
042c94de TS |
22 | 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
23 | ||
24 | * opcode/sparc.h (enum sparc_opcode_arch_val): Move | |
25 | SPARC_OPCODE_ARCH_MAX into the enum. | |
26 | ||
dab26bf4 RS |
27 | 2016-06-28 Richard Sandiford <richard.sandiford@arm.com> |
28 | ||
29 | * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t. | |
30 | ||
c9775dde MR |
31 | 2016-06-28 Maciej W. Rozycki <macro@imgtec.com> |
32 | ||
33 | * elf/mips.h (R_MIPS16_PC16_S1): New relocation. | |
34 | ||
7c2c4aa1 TS |
35 | 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
36 | ||
37 | * elf/xtensa.h (xtensa_make_property_section): New prototype. | |
38 | ||
b00f86d0 JB |
39 | 2016-06-24 John Baldwin <jhb@FreeBSD.org> |
40 | ||
41 | * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY) | |
42 | (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS) | |
43 | (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN) | |
44 | (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define. | |
45 | ||
ce440d63 GM |
46 | 2016-06-23 Graham Markall <graham.markall@embecosm.com> |
47 | ||
48 | * opcode/arc.h: Make insn_class_t alphabetical again. | |
49 | ||
6b477896 TS |
50 | 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
51 | ||
52 | * elf/dlx.h: Wrap in extern C. | |
53 | * elf/xtensa.h: Likewise. | |
54 | * opcode/arc.h: Likewise. | |
55 | ||
6edaf4d7 TS |
56 | 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
57 | ||
58 | * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into | |
59 | tilegx_pipeline. | |
60 | ||
bdd582db GM |
61 | 2016-06-21 Graham Markall <graham.markall@embecosm.com> |
62 | ||
63 | * opcode/arc.h: Add nps400 extension and instruction | |
64 | subclass. | |
65 | Remove ARC_OPCODE_NPS400 | |
66 | * elf/arc.h: Remove E_ARC_MACH_NPS400 | |
67 | ||
4f26fb3a JM |
68 | 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> |
69 | ||
70 | * opcode/sparc.h (enum sparc_opcode_arch_val): Add | |
71 | SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D, | |
72 | SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and | |
73 | SPARC_OPCODE_ARCH_V9M. | |
74 | ||
99a54ef6 JB |
75 | 2016-06-14 John Baldwin <jhb@FreeBSD.org> |
76 | ||
77 | * opcode/msp430-decode.h (MSP430_Size): Remove. | |
78 | (Msp430_Opcode_Decoded): Change type of size to int. | |
79 | ||
0eaf2e1b AM |
80 | 2016-06-11 Alan Modra <amodra@gmail.com> |
81 | ||
82 | * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define. | |
83 | ||
337c570c JM |
84 | 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com> |
85 | ||
86 | * opcode/sparc.h: Add missing documentation for hyperprivileged | |
87 | registers in rd (%) and rs1 ($). | |
88 | ||
14b57c7c AM |
89 | 2016-06-07 Alan Modra <amodra@gmail.com> |
90 | ||
91 | * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL, | |
92 | PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, | |
93 | PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, | |
94 | PPC_APUINFO_VLE: Define. | |
95 | ||
4d1464f2 MW |
96 | 2016-06-07 Matthew Wahab <matthew.wahab@arm.com> |
97 | ||
98 | * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding | |
99 | entries. | |
100 | (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS. | |
101 | ||
4eb6f892 AB |
102 | 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com> |
103 | ||
104 | * opcode/arc.h (MAX_INSN_ARGS): Increase to 16. | |
105 | (struct arc_long_opcode): New structure. | |
106 | (arc_long_opcodes): Declare. | |
107 | (arc_num_long_opcodes): Declare. | |
108 | ||
1fe0971e TS |
109 | 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
110 | ||
111 | * elf/mips.h: Add extern "C". | |
112 | * elf/sh.h: Likewise. | |
113 | * opcode/d10v.h: Likewise. | |
114 | * opcode/d30v.h: Likewise. | |
115 | * opcode/ia64.h: Likewise. | |
116 | * opcode/mips.h: Likewise. | |
117 | * opcode/ppc.h: Likewise. | |
118 | * opcode/sparc.h: Likewise. | |
119 | * opcode/tic6x.h: Likewise. | |
120 | * opcode/v850.h: Likewise. | |
121 | ||
1a72702b AM |
122 | 2016-05-28 Alan Modra <amodra@gmail.com> |
123 | ||
124 | * bfdlink.h (struct bfd_link_callbacks): Update comments. | |
125 | Return void from multiple_definition, multiple_common, | |
126 | add_to_set, constructor, warning, undefined_symbol, | |
127 | reloc_overflow, reloc_dangerous and unattached_reloc. | |
128 | ||
94740f9c TS |
129 | 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
130 | ||
131 | * opcode/metag.h: wrap declarations in extern "C". | |
132 | ||
d9eca1df CZ |
133 | 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com> |
134 | ||
135 | * opcode/arc.h (insn_subclass_t): Add COND. | |
136 | (flag_class_t): Add F_CLASS_EXTEND. | |
137 | ||
c810e0b8 CZ |
138 | 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com> |
139 | ||
140 | * opcode/arc.h (struct arc_opcode): Renamed attribute class to | |
141 | insn_class. | |
142 | (struct arc_flag_class): Renamed attribute class to flag_class. | |
143 | ||
3d207518 TS |
144 | 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
145 | ||
146 | * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of | |
147 | plain symbol. | |
148 | ||
5ff087ac TT |
149 | 2016-04-29 Tom Tromey <tom@tromey.com> |
150 | ||
151 | * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust, | |
152 | DW_LANG_Rust_old>: New constants. | |
153 | ||
8f4f9071 MF |
154 | 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com> |
155 | ||
156 | * elf/mips.h (AFL_ASE_DSPR3): New macro. | |
157 | (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3. | |
158 | * opcode/mips.h (ASE_DSPR3): New macro. | |
159 | ||
39d911fc TP |
160 | 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> |
161 | Nick Clifton <nickc@redhat.com> | |
162 | ||
163 | * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE | |
164 | enumerator. | |
165 | (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro. | |
166 | (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise. | |
167 | (ARM_SYM_BRANCH_TYPE): Replace by ... | |
168 | (ARM_GET_SYM_BRANCH_TYPE): This and ... | |
169 | (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether | |
170 | BFD_ASSERT is defined or not. | |
171 | ||
15afaa63 TP |
172 | 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> |
173 | ||
174 | * elf/arm.h (Tag_DSP_extension): Define. | |
175 | ||
d942732e TP |
176 | 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> |
177 | ||
178 | * arm.h (ARM_FSET_CPU_SUBSET): Define macro. | |
179 | ||
16a1fa25 TP |
180 | 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> |
181 | ||
182 | * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit. | |
183 | (ARM_AEXT2_V8M_MAIN): New architecture extension feature set. | |
184 | (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M | |
185 | for the high core bits. | |
186 | ||
945e0f82 CZ |
187 | 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com> |
188 | ||
189 | * opcode/arc.h (ARC_SYNTAX_1OP): Declare | |
190 | (ARC_SYNTAX_NOP): Likewsie. | |
191 | (ARC_OP1_MUST_BE_IMM): Update defined value. | |
192 | (ARC_OP1_IMM_IMPLIED): Likewise. | |
193 | (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare. | |
194 | ||
4bd13cde NC |
195 | 2016-04-28 Nick Clifton <nickc@redhat.com> |
196 | ||
197 | PR target/19722 | |
198 | * opcode/aarch64.h (struct aarch64_opcode): Add verifier field. | |
199 | ||
a6a4679f AM |
200 | 2016-04-27 Alan Modra <amodra@gmail.com> |
201 | ||
202 | * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to | |
203 | undef. Formatting. | |
204 | ||
4f3b23b3 NC |
205 | 2016-04-21 Nick Clifton <nickc@redhat.com> |
206 | ||
207 | * bfdlink.h: Add prototype for bfd_link_check_relocs. | |
208 | ||
d9689752 L |
209 | 2016-04-20 H.J. Lu <hongjiu.lu@intel.com> |
210 | ||
211 | * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input. | |
212 | ||
52176c67 AB |
213 | 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com> |
214 | ||
215 | * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula. | |
216 | ||
537aefaf AB |
217 | 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com> |
218 | ||
219 | * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8. | |
220 | ||
c8f785f2 AB |
221 | 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com> |
222 | ||
223 | * opcode/arc.h (insn_class_t): Add NET and ACL class. | |
224 | ||
4b0c052e AB |
225 | 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com> |
226 | ||
227 | * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc. | |
228 | * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define. | |
229 | ||
f36e33da CZ |
230 | 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com> |
231 | ||
232 | * opcode/arc.h (flag_class_t): Update. | |
233 | (ARC_OPCODE_NONE): Define. | |
234 | (ARC_OPCODE_ARCALL): Likewise. | |
235 | (ARC_OPCODE_ARCFPX): Likewise. | |
236 | (ARC_REGISTER_READONLY): Likewise. | |
237 | (ARC_REGISTER_WRITEONLY): Likewise. | |
238 | (ARC_REGISTER_NOSHORT_CUT): Likewise. | |
239 | (arc_aux_reg): Add cpu. | |
240 | ||
b99747ae CZ |
241 | 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com> |
242 | ||
243 | * opcode/arc.h (arc_num_opcodes): Remove. | |
244 | (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM) | |
245 | (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND) | |
246 | (ARC_SUFFIX_FLAG): Define. | |
247 | (flags_none, flags_f, flags_cc, flags_ccf): Declare. | |
248 | (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc) | |
249 | (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6) | |
250 | (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm) | |
251 | (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm) | |
252 | (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12) | |
253 | (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc) | |
254 | (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm) | |
255 | (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6) | |
256 | (arg_32bit_limms12, arg_32bit_limmlimm): Likewise. | |
257 | ||
258 | 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com> | |
259 | ||
260 | * opcode/arc.h (DPA, DPX, SPX): New subclass enums. | |
261 | (ARC_FPUDA): Define. | |
262 | (arc_aux_reg): Add new field. | |
263 | ||
264 | 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com> | |
094fb063 CZ |
265 | |
266 | * opcode/arc-func.h (replace_bits24): Changed. | |
267 | (replace_bits24_be): Created. | |
268 | ||
f2dd8838 CZ |
269 | 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com> |
270 | ||
b99747ae CZ |
271 | * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass. |
272 | (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP) | |
273 | (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL) | |
274 | (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU) | |
275 | (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS) | |
276 | (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL) | |
277 | (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC) | |
278 | (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC) | |
279 | (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU) | |
280 | (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS) | |
281 | (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL) | |
282 | (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C) | |
283 | (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL) | |
284 | (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define. | |
f2dd8838 | 285 | |
b9bb4a93 TS |
286 | 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
287 | ||
288 | * opcode/i960.h: Add const qualifiers. | |
289 | * opcode/tic4x.h (struct tic4x_inst): Likewise. | |
290 | ||
e23e8ebe AB |
291 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
292 | ||
293 | * opcodes/arc.h (insn_class_t): Add BITOP type. | |
294 | ||
1ae8ab47 AB |
295 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
296 | ||
297 | * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3 | |
298 | new classes instead. | |
299 | ||
8699fc3e AB |
300 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
301 | ||
302 | * elf/arc.h (E_ARC_MACH_NPS400): Define. | |
303 | * opcode/arc.h (ARC_OPCODE_NPS400): Define. | |
304 | ||
a9522a21 AB |
305 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
306 | ||
307 | * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment. | |
308 | ||
c0334580 AB |
309 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
310 | ||
311 | * elf/arc.h (EF_ARC_MACH): Delete. | |
312 | (EF_ARC_MACH_MSK): Remove out of date comment. | |
313 | ||
24740d83 AB |
314 | 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com> |
315 | ||
316 | * opcode/arc.h (ARC_OPCODE_BASE): Delete. | |
317 | ||
4c10bbaa L |
318 | 2016-03-15 H.J. Lu <hongjiu.lu@intel.com> |
319 | ||
320 | PR ld/19807 | |
321 | * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check. | |
322 | ||
72f3b6aa CZ |
323 | 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com> |
324 | Andrew Burgess <andrew.burgess@embecosm.com> | |
325 | ||
326 | * elf/arc-reloc.def: Add a call to ME within the formula for each | |
327 | relocation that requires middle-endian correction. | |
328 | ||
f86f5863 TS |
329 | 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> |
330 | ||
331 | * opcode/dlx.h (struct dlx_opcode): Add const qualifiers. | |
332 | * opcode/h8300.h (struct h8_opcode): Likewise. | |
333 | * opcode/hppa.h (struct pa_opcode): Likewise. | |
334 | * opcode/msp430.h: Likewise. | |
335 | * opcode/spu.h (struct spu_opcode): Likewise. | |
336 | * opcode/tic30.h (struct _register): Likewise. | |
337 | * opcode/tic4x.h (struct tic4x_register): Likewise. | |
338 | (struct tic4x_cond): Likewise. | |
339 | (struct tic4x_indirect): Likewise. | |
340 | (struct tic4x_inst): Likewise. | |
341 | * opcode/visium.h (struct reg_entry): Likewise. | |
342 | ||
643afb90 MW |
343 | 2016-03-04 Matthew Wahab <matthew.wahab@arm.com> |
344 | ||
345 | * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA. | |
346 | (ARM_CPU_HAS_FEATURE): Add comment. | |
347 | ||
3f1f41f5 L |
348 | 2016-03-03 Than McIntosh <thanm@google.com> |
349 | ||
350 | * plugin-api.h: Add new hooks to the plugin transfer vector to | |
351 | to support querying section alignment and section size. | |
352 | (ld_plugin_get_input_section_alignment): New hook. | |
353 | (ld_plugin_get_input_section_size): New hook. | |
354 | (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT | |
355 | and LDPT_GET_INPUT_SECTION_SIZE. | |
356 | (ld_plugin_tv): Add tv_get_input_section_alignment and | |
357 | tv_get_input_section_size. | |
358 | ||
9b738e36 | 359 | 2016-03-03 Evgenii Stepanov <eugenis@google.com> |
95ecdfbf ES |
360 | |
361 | * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3. | |
362 | ||
11e5f1ec L |
363 | 2016-02-26 H.J. Lu <hongjiu.lu@intel.com> |
364 | ||
365 | PR ld/19645 | |
366 | * bfdlink.h (bfd_link_elf_stt_common): New enum. | |
367 | (bfd_link_info): Add elf_stt_common. | |
368 | ||
aec6b87e L |
369 | 2016-02-26 H.J. Lu <hongjiu.lu@intel.com> |
370 | ||
371 | PR ld/19636 | |
372 | PR ld/19704 | |
373 | PR ld/19719 | |
374 | * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak. | |
375 | ||
b8ec4e87 JW |
376 | 2016-02-19 Matthew Wahab <matthew.wahab@arm.com> |
377 | Jiong Wang <jiong.wang@arm.com> | |
378 | ||
379 | * opcode/arm.h (ARM_EXT2_FP16_INSN): New. | |
380 | ||
4670103e CZ |
381 | 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com> |
382 | Janek van Oirschot <jvanoirs@synopsys.com> | |
383 | ||
b99747ae CZ |
384 | * opcode/arc.h (arc_opcode arc_relax_opcodes) |
385 | (arc_num_relax_opcodes): Declare. | |
4670103e | 386 | |
609332f1 NC |
387 | 2016-02-09 Nick Clifton <nickc@redhat.com> |
388 | ||
389 | * opcode/metag.h (metag_scondtab): Mark as possibly unused. | |
390 | * opcode/nds32.h (nds32_r45map): Likewise. | |
391 | (nds32_r54map): Likewise. | |
392 | * opcode/visium.h (gen_reg_table): Likewise. | |
393 | (fp_reg_table, cc_table, opcode_table): Likewise. | |
394 | ||
24f5f69a AM |
395 | 2016-02-09 Alan Modra <amodra@gmail.com> |
396 | ||
397 | PR 16583 | |
398 | * elf/common.h (AT_SUN_HWCAP): Undef before defining. | |
399 | ||
c1d9289f NC |
400 | 2016-02-04 Nick Clifton <nickc@redhat.com> |
401 | ||
402 | PR target/19561 | |
403 | * opcode/msp430.h (IGNORE_CARRY_BIT): New define. | |
404 | (RRUX): Synthesise using case 2 rather than 7. | |
405 | ||
f4ddf30f JB |
406 | 2016-01-19 John Baldwin <jhb@FreeBSD.org> |
407 | ||
408 | * elf/common.h (NT_FREEBSD_THRMISC): Define. | |
409 | (NT_FREEBSD_PROCSTAT_PROC): Define. | |
410 | (NT_FREEBSD_PROCSTAT_FILES): Define. | |
411 | (NT_FREEBSD_PROCSTAT_VMMAP): Define. | |
412 | (NT_FREEBSD_PROCSTAT_GROUPS): Define. | |
413 | (NT_FREEBSD_PROCSTAT_UMASK): Define. | |
414 | (NT_FREEBSD_PROCSTAT_RLIMIT): Define. | |
415 | (NT_FREEBSD_PROCSTAT_OSREL): Define. | |
416 | (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define. | |
417 | (NT_FREEBSD_PROCSTAT_AUXV): Define. | |
418 | ||
34e967a5 MC |
419 | 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com> |
420 | Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com> | |
421 | ||
422 | * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT) | |
423 | (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9) | |
424 | (ARC_TLS_LE_32): Fixed formula. | |
425 | (ARC_TLS_GD_LD): Use new special function. | |
426 | * opcode/arc-func.h: Changed all the replacement | |
427 | functions to clear the patching bits before doing an or it with the value | |
428 | argument. | |
429 | ||
9ae678af NC |
430 | 2016-01-18 Nick Clifton <nickc@redhat.com> |
431 | ||
432 | PR ld/19440 | |
433 | * coff/internal.h (internal_syment): Use int to hold section | |
434 | number. | |
435 | (N_UNDEF): Cast to int not short. | |
436 | (N_ABS): Likewise. | |
437 | (N_DEBUG): Likewise. | |
438 | (N_TV): Likewise. | |
439 | (P_TV): Likewise. | |
440 | ||
4849dfd8 NC |
441 | 2016-01-11 Nick Clifton <nickc@redhat.com> |
442 | ||
443 | Import this change from GCC mainline: | |
444 | ||
445 | 2016-01-07 Mike Frysinger <vapier@gentoo.org> | |
446 | ||
447 | * longlong.h: Change !__SHMEDIA__ to | |
448 | (!defined (__SHMEDIA__) || !__SHMEDIA__). | |
449 | Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__. | |
450 | ||
b31e4803 MR |
451 | 2016-01-06 Maciej W. Rozycki <macro@imgtec.com> |
452 | ||
453 | * opcode/mips.h: Add a summary of MIPS16 operand codes. | |
454 | ||
b36c1ccb MF |
455 | 2016-01-05 Mike Frysinger <vapier@gentoo.org> |
456 | ||
457 | * libiberty.h (dupargv): Change arg to char * const *. | |
458 | (writeargv, countargv): Likewise. | |
459 | ||
6f2750fe AM |
460 | 2016-01-01 Alan Modra <amodra@gmail.com> |
461 | ||
462 | Update year range in copyright notice of all files. | |
463 | ||
3499769a AM |
464 | For older changes see ChangeLog-0415, aout/ChangeLog-9115, |
465 | cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415, | |
466 | mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415, | |
467 | som/ChangeLog-1015, and vms/ChangeLog-1015 | |
468 | \f | |
469 | Copyright (C) 2016 Free Software Foundation, Inc. | |
470 | ||
471 | Copying and distribution of this file, with or without modification, | |
472 | are permitted in any medium without royalty provided the copyright | |
473 | notice and this notice are preserved. | |
474 | ||
475 | Local Variables: | |
476 | mode: change-log | |
477 | left-margin: 8 | |
478 | fill-column: 74 | |
479 | version-control: never | |
480 | End: |