Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/include/asm-arm/arch-h720x/h7201-regs.h | |
3 | * | |
4 | * Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc. | |
5 | * (C) 2003 Thomas Gleixner <tglx@linutronix.de> | |
6 | * (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de> | |
7 | * (C) 2004 Sascha Hauer <s.hauer@pengutronix.de> | |
8 | * | |
9 | * This file contains the hardware definitions of the h720x processors | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * Do not add implementations specific defines here. This files contains | |
16 | * only defines of the onchip peripherals. Add those defines to boards.h, | |
17 | * which is included by this file. | |
18 | */ | |
19 | ||
20 | #define SERIAL2_VIRT (IO_VIRT + 0x50100) | |
21 | #define SERIAL3_VIRT (IO_VIRT + 0x50200) | |
22 | ||
23 | /* | |
24 | * PCMCIA | |
25 | */ | |
26 | #define PCMCIA0_ATT_BASE 0xe5000000 | |
27 | #define PCMCIA0_ATT_SIZE 0x00200000 | |
28 | #define PCMCIA0_ATT_START 0x20000000 | |
29 | #define PCMCIA0_MEM_BASE 0xe5200000 | |
30 | #define PCMCIA0_MEM_SIZE 0x00200000 | |
31 | #define PCMCIA0_MEM_START 0x24000000 | |
32 | #define PCMCIA0_IO_BASE 0xe5400000 | |
33 | #define PCMCIA0_IO_SIZE 0x00200000 | |
34 | #define PCMCIA0_IO_START 0x28000000 | |
35 | ||
36 | #define PCMCIA1_ATT_BASE 0xe5600000 | |
37 | #define PCMCIA1_ATT_SIZE 0x00200000 | |
38 | #define PCMCIA1_ATT_START 0x30000000 | |
39 | #define PCMCIA1_MEM_BASE 0xe5800000 | |
40 | #define PCMCIA1_MEM_SIZE 0x00200000 | |
41 | #define PCMCIA1_MEM_START 0x34000000 | |
42 | #define PCMCIA1_IO_BASE 0xe5a00000 | |
43 | #define PCMCIA1_IO_SIZE 0x00200000 | |
44 | #define PCMCIA1_IO_START 0x38000000 | |
45 | ||
46 | #define PRIME3C_BASE 0xf0050000 | |
47 | #define PRIME3C_SIZE 0x00001000 | |
48 | #define PRIME3C_START 0x10000000 | |
49 | ||
50 | /* VGA Controller */ | |
51 | #define VGA_RAMBASE 0x50 | |
52 | #define VGA_TIMING0 0x60 | |
53 | #define VGA_TIMING1 0x64 | |
54 | #define VGA_TIMING2 0x68 | |
55 | #define VGA_TIMING3 0x6c | |
56 | ||
57 | #define LCD_CTRL_VGA_ENABLE 0x00000100 | |
58 | #define LCD_CTRL_VGA_BPP_MASK 0x00000600 | |
59 | #define LCD_CTRL_VGA_4BPP 0x00000000 | |
60 | #define LCD_CTRL_VGA_8BPP 0x00000200 | |
61 | #define LCD_CTRL_VGA_16BPP 0x00000300 | |
62 | #define LCD_CTRL_SHARE_DMA 0x00000800 | |
63 | #define LCD_CTRL_VDE 0x00100000 | |
64 | #define LCD_CTRL_LPE 0x00400000 /* LCD Power enable */ | |
65 | #define LCD_CTRL_BLE 0x00800000 /* LCD backlight enable */ | |
66 | ||
67 | #define VGA_PALETTE_BASE (IO_VIRT + 0x10800) |