projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * include/asm-arm/arch-ixp4x//system.h | |
| 3 | * | |
| 4 | * Copyright (C) 2002 Intel Corporation. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | * | |
| 10 | */ | |
| 11 | ||
| 12 | #include <asm/hardware.h> | |
| 13 | ||
| 14 | static inline void arch_idle(void) | |
| 15 | { | |
| 16 | #if 0 | |
| 17 | if (!hlt_counter) | |
| 18 | cpu_do_idle(0); | |
| 19 | #endif | |
| 20 | } | |
| 21 | ||
| 22 | ||
| 23 | static inline void arch_reset(char mode) | |
| 24 | { | |
| 25 | if ( 1 && mode == 's') { | |
| 26 | /* Jump into ROM at address 0 */ | |
| 27 | cpu_reset(0); | |
| 28 | } else { | |
| 29 | /* Use on-chip reset capability */ | |
| 30 | ||
| 31 | /* set the "key" register to enable access to | |
| 32 | * "timer" and "enable" registers | |
| 33 | */ | |
| 34 | *IXP4XX_OSWK = IXP4XX_WDT_KEY; | |
| 35 | ||
| 36 | /* write 0 to the timer register for an immediate reset */ | |
| 37 | *IXP4XX_OSWT = 0; | |
| 38 | ||
| 39 | *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; | |
| 40 | } | |
| 41 | } | |
| 42 |