Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * include/asm-arm/arch-omap/entry-macro.S | |
3 | * | |
4 | * Low-level IRQ helper macros for OMAP-based platforms | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
be509729 | 10 | #include <asm/arch/hardware.h> |
cfb41bf7 | 11 | #include <asm/arch/io.h> |
78ff18a4 | 12 | #include <asm/arch/irqs.h> |
1da177e4 | 13 | |
9839c6b8 TL |
14 | #if defined(CONFIG_ARCH_OMAP1) |
15 | ||
9ad5897c TL |
16 | #if defined(CONFIG_ARCH_OMAP730) && \ |
17 | (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) | |
18 | #error "FIXME: OMAP730 doesn't support multiple-OMAP" | |
19 | #elif defined(CONFIG_ARCH_OMAP730) | |
20 | #define INT_IH2_IRQ INT_730_IH2_IRQ | |
21 | #elif defined(CONFIG_ARCH_OMAP15XX) | |
22 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | |
23 | #elif defined(CONFIG_ARCH_OMAP16XX) | |
24 | #define INT_IH2_IRQ INT_1610_IH2_IRQ | |
25 | #else | |
26 | #warning "IH2 IRQ defaulted" | |
27 | #define INT_IH2_IRQ INT_1510_IH2_IRQ | |
28 | #endif | |
29 | ||
1da177e4 LT |
30 | .macro disable_fiq |
31 | .endm | |
32 | ||
f80dff9d DW |
33 | .macro get_irqnr_preamble, base, tmp |
34 | .endm | |
35 | ||
36 | .macro arch_ret_to_user, tmp1, tmp2 | |
37 | .endm | |
38 | ||
1da177e4 LT |
39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
40 | ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) | |
41 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | |
42 | ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] | |
43 | mov \irqstat, #0xffffffff | |
44 | bic \tmp, \irqstat, \tmp | |
45 | tst \irqnr, \tmp | |
46 | beq 1510f | |
47 | ||
48 | ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] | |
49 | cmp \irqnr, #0 | |
50 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | |
51 | cmpeq \irqnr, #INT_IH2_IRQ | |
52 | ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) | |
53 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | |
54 | addeqs \irqnr, \irqnr, #32 | |
55 | 1510: | |
56 | .endm | |
57 | ||
9839c6b8 TL |
58 | #elif defined(CONFIG_ARCH_OMAP24XX) |
59 | ||
60 | #include <asm/arch/omap24xx.h> | |
61 | ||
62 | .macro disable_fiq | |
63 | .endm | |
64 | ||
1f4d1774 TL |
65 | .macro get_irqnr_preamble, base, tmp |
66 | .endm | |
67 | ||
68 | .macro arch_ret_to_user, tmp1, tmp2 | |
69 | .endm | |
70 | ||
9839c6b8 | 71 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
44595982 | 72 | ldr \base, =OMAP2_VA_IC_BASE |
9839c6b8 TL |
73 | ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ |
74 | cmp \irqnr, #0x0 | |
75 | bne 2222f | |
76 | ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ | |
77 | cmp \irqnr, #0x0 | |
78 | bne 2222f | |
79 | ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ | |
80 | cmp \irqnr, #0x0 | |
81 | 2222: | |
82 | ldrne \irqnr, [\base, #IRQ_SIR_IRQ] | |
83 | ||
84 | .endm | |
85 | ||
86 | .macro irq_prio_table | |
87 | .endm | |
88 | ||
89 | #endif |