[deliverable/linux.git] / include / asm-arm / ptrace.h

/*
 *  linux/include/asm-arm/ptrace.h
 *
 *  Copyright (C) 1996-2003 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef __ASM_ARM_PTRACE_H
#define __ASM_ARM_PTRACE_H


#define PTRACE_GETREGS		12
#define PTRACE_SETREGS		13
#define PTRACE_GETFPREGS	14
#define PTRACE_SETFPREGS	15

#define PTRACE_GETWMMXREGS	18
#define PTRACE_SETWMMXREGS	19

#define PTRACE_OLDSETOPTIONS	21

#define PTRACE_GET_THREAD_AREA	22

#define PTRACE_SET_SYSCALL	23

/*
 * PSR bits
 */
#define USR26_MODE	0x00000000
#define FIQ26_MODE	0x00000001
#define IRQ26_MODE	0x00000002
#define SVC26_MODE	0x00000003
#define USR_MODE	0x00000010
#define FIQ_MODE	0x00000011
#define IRQ_MODE	0x00000012
#define SVC_MODE	0x00000013
#define ABT_MODE	0x00000017
#define UND_MODE	0x0000001b
#define SYSTEM_MODE	0x0000001f
#define MODE32_BIT	0x00000010
#define MODE_MASK	0x0000001f
#define PSR_T_BIT	0x00000020
#define PSR_F_BIT	0x00000040
#define PSR_I_BIT	0x00000080
#define PSR_J_BIT	0x01000000
#define PSR_Q_BIT	0x08000000
#define PSR_V_BIT	0x10000000
#define PSR_C_BIT	0x20000000
#define PSR_Z_BIT	0x40000000
#define PSR_N_BIT	0x80000000
#define PCMASK		0

/*
 * Groups of PSR bits
 */
#define PSR_f		0xff000000	/* Flags		*/
#define PSR_s		0x00ff0000	/* Status		*/
#define PSR_x		0x0000ff00	/* Extension		*/
#define PSR_c		0x000000ff	/* Control		*/

#ifndef __ASSEMBLY__

/*
 * This struct defines the way the registers are stored on the
 * stack during a system call.  Note that sizeof(struct pt_regs)
 * has to be a multiple of 8.
 */
struct pt_regs {
	long uregs[18];
};

#define ARM_cpsr	uregs[16]
#define ARM_pc		uregs[15]
#define ARM_lr		uregs[14]
#define ARM_sp		uregs[13]
#define ARM_ip		uregs[12]
#define ARM_fp		uregs[11]
#define ARM_r10		uregs[10]
#define ARM_r9		uregs[9]
#define ARM_r8		uregs[8]
#define ARM_r7		uregs[7]
#define ARM_r6		uregs[6]
#define ARM_r5		uregs[5]
#define ARM_r4		uregs[4]
#define ARM_r3		uregs[3]
#define ARM_r2		uregs[2]
#define ARM_r1		uregs[1]
#define ARM_r0		uregs[0]
#define ARM_ORIG_r0	uregs[17]

#ifdef __KERNEL__

#define user_mode(regs)	\
	(((regs)->ARM_cpsr & 0xf) == 0)

#ifdef CONFIG_ARM_THUMB
#define thumb_mode(regs) \
	(((regs)->ARM_cpsr & PSR_T_BIT))
#else
#define thumb_mode(regs) (0)
#endif

#define processor_mode(regs) \
	((regs)->ARM_cpsr & MODE_MASK)

#define interrupts_enabled(regs) \
	(!((regs)->ARM_cpsr & PSR_I_BIT))

#define fast_interrupts_enabled(regs) \
	(!((regs)->ARM_cpsr & PSR_F_BIT))

#define condition_codes(regs) \
	((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
	
/* Are the current registers suitable for user mode?
 * (used to maintain security in signal handlers)
 */
static inline int valid_user_regs(struct pt_regs *regs)
{
	if (user_mode(regs) &&
	    (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
		return 1;

	/*
	 * Force CPSR to something logical...
	 */
	regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;

	return 0;
}

#endif	/* __KERNEL__ */

#define pc_pointer(v) \
	((v) & ~PCMASK)

#define instruction_pointer(regs) \
	(pc_pointer((regs)->ARM_pc))

#ifdef CONFIG_SMP
extern unsigned long profile_pc(struct pt_regs *regs);
#else
#define profile_pc(regs) instruction_pointer(regs)
#endif

#ifdef __KERNEL__
#define predicate(x)		((x) & 0xf0000000)
#define PREDICATE_ALWAYS	0xe0000000
#endif

#endif /* __ASSEMBLY__ */

#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/include/asm-arm/ptrace.h
	3	*
	4	* Copyright (C) 1996-2003 Russell King
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10	#ifndef __ASM_ARM_PTRACE_H
	11	#define __ASM_ARM_PTRACE_H
	12
1da177e4 LT	13
	14	#define PTRACE_GETREGS 12
	15	#define PTRACE_SETREGS 13
	16	#define PTRACE_GETFPREGS 14
	17	#define PTRACE_SETFPREGS 15
	18
	19	#define PTRACE_GETWMMXREGS 18
	20	#define PTRACE_SETWMMXREGS 19
	21
	22	#define PTRACE_OLDSETOPTIONS 21
	23
	24	#define PTRACE_GET_THREAD_AREA 22
3f471126 NP	25
	26	#define PTRACE_SET_SYSCALL 23
	27
1da177e4 LT	28	/*
	29	* PSR bits
	30	*/
	31	#define USR26_MODE 0x00000000
	32	#define FIQ26_MODE 0x00000001
	33	#define IRQ26_MODE 0x00000002
	34	#define SVC26_MODE 0x00000003
	35	#define USR_MODE 0x00000010
	36	#define FIQ_MODE 0x00000011
	37	#define IRQ_MODE 0x00000012
	38	#define SVC_MODE 0x00000013
	39	#define ABT_MODE 0x00000017
	40	#define UND_MODE 0x0000001b
	41	#define SYSTEM_MODE 0x0000001f
	42	#define MODE32_BIT 0x00000010
	43	#define MODE_MASK 0x0000001f
	44	#define PSR_T_BIT 0x00000020
	45	#define PSR_F_BIT 0x00000040
	46	#define PSR_I_BIT 0x00000080
	47	#define PSR_J_BIT 0x01000000
	48	#define PSR_Q_BIT 0x08000000
	49	#define PSR_V_BIT 0x10000000
	50	#define PSR_C_BIT 0x20000000
	51	#define PSR_Z_BIT 0x40000000
	52	#define PSR_N_BIT 0x80000000
	53	#define PCMASK 0
	54
	55	/*
	56	* Groups of PSR bits
	57	*/
	58	#define PSR_f 0xff000000 /* Flags */
	59	#define PSR_s 0x00ff0000 /* Status */
	60	#define PSR_x 0x0000ff00 /* Extension */
	61	#define PSR_c 0x000000ff /* Control */
	62
	63	#ifndef __ASSEMBLY__
	64
2dede2d8 NP	65	/*
	66	* This struct defines the way the registers are stored on the
	67	* stack during a system call. Note that sizeof(struct pt_regs)
	68	* has to be a multiple of 8.
	69	*/
1da177e4 LT	70	struct pt_regs {
	71	long uregs[18];
	72	};
	73
	74	#define ARM_cpsr uregs[16]
	75	#define ARM_pc uregs[15]
	76	#define ARM_lr uregs[14]
	77	#define ARM_sp uregs[13]
	78	#define ARM_ip uregs[12]
	79	#define ARM_fp uregs[11]
	80	#define ARM_r10 uregs[10]
	81	#define ARM_r9 uregs[9]
	82	#define ARM_r8 uregs[8]
	83	#define ARM_r7 uregs[7]
	84	#define ARM_r6 uregs[6]
	85	#define ARM_r5 uregs[5]
	86	#define ARM_r4 uregs[4]
	87	#define ARM_r3 uregs[3]
	88	#define ARM_r2 uregs[2]
	89	#define ARM_r1 uregs[1]
	90	#define ARM_r0 uregs[0]
	91	#define ARM_ORIG_r0 uregs[17]
	92
	93	#ifdef __KERNEL__
	94
	95	#define user_mode(regs) \
	96	(((regs)->ARM_cpsr & 0xf) == 0)
	97
	98	#ifdef CONFIG_ARM_THUMB
	99	#define thumb_mode(regs) \
	100	(((regs)->ARM_cpsr & PSR_T_BIT))
	101	#else
	102	#define thumb_mode(regs) (0)
	103	#endif
	104
	105	#define processor_mode(regs) \
	106	((regs)->ARM_cpsr & MODE_MASK)
	107
	108	#define interrupts_enabled(regs) \
	109	(!((regs)->ARM_cpsr & PSR_I_BIT))
	110
	111	#define fast_interrupts_enabled(regs) \
	112	(!((regs)->ARM_cpsr & PSR_F_BIT))
	113
	114	#define condition_codes(regs) \
	115	((regs)->ARM_cpsr & (PSR_V_BIT\|PSR_C_BIT\|PSR_Z_BIT\|PSR_N_BIT))
	116
	117	/* Are the current registers suitable for user mode?
	118	* (used to maintain security in signal handlers)
	119	*/
	120	static inline int valid_user_regs(struct pt_regs *regs)
	121	{
	122	if (user_mode(regs) &&
	123	(regs->ARM_cpsr & (PSR_F_BIT\|PSR_I_BIT)) == 0)
	124	return 1;
	125
	126	/*
	127	* Force CPSR to something logical...
	128	*/
	129	regs->ARM_cpsr &= PSR_f \| PSR_s \| PSR_x \| PSR_T_BIT \| MODE32_BIT;
	130
	131	return 0;
	132	}
	133
134	#endif /* __KERNEL__ */
135
136	#define pc_pointer(v) \
137	((v) & ~PCMASK)
138
139	#define instruction_pointer(regs) \
140	(pc_pointer((regs)->ARM_pc))
141
142	#ifdef CONFIG_SMP
143	extern unsigned long profile_pc(struct pt_regs *regs);
144	#else
145	#define profile_pc(regs) instruction_pointer(regs)
146	#endif
147
148	#ifdef __KERNEL__
652a12ef	149	#define predicate(x) ((x) & 0xf0000000)
1da177e4	150	#define PREDICATE_ALWAYS 0xe0000000
1da177e4 LT	151	#endif
	152
	153	#endif /* __ASSEMBLY__ */
	154
	155	#endif
	156