Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use...
[deliverable/linux.git] / include / asm-blackfin / entry.h
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1#ifndef __BFIN_ENTRY_H
2#define __BFIN_ENTRY_H
3
4#include <asm/setup.h>
5#include <asm/page.h>
6
7#ifdef __ASSEMBLY__
8
9#define LFLUSH_I_AND_D 0x00000808
10#define LSIGTRAP 5
11
12/* process bits for task_struct.flags */
13#define PF_TRACESYS_OFF 3
14#define PF_TRACESYS_BIT 5
15#define PF_PTRACED_OFF 3
16#define PF_PTRACED_BIT 4
17#define PF_DTRACE_OFF 1
18#define PF_DTRACE_BIT 5
19
20/* This one is used for exceptions, emulation, and NMI. It doesn't push
21 RETI and doesn't do cli. */
22#define SAVE_ALL_SYS save_context_no_interrupts
23/* This is used for all normal interrupts. It saves a minimum of registers
24 to the stack, loads the IRQ number, and jumps to common code. */
25#define INTERRUPT_ENTRY(N) \
26 [--sp] = SYSCFG; \
27 \
28 [--sp] = P0; /*orig_p0*/ \
29 [--sp] = R0; /*orig_r0*/ \
30 [--sp] = (R7:0,P5:0); \
31 R0 = (N); \
32 jump __common_int_entry;
33
34/* For timer interrupts, we need to save IPEND, since the user_mode
35 macro accesses it to determine where to account time. */
36#define TIMER_INTERRUPT_ENTRY(N) \
37 [--sp] = SYSCFG; \
38 \
39 [--sp] = P0; /*orig_p0*/ \
40 [--sp] = R0; /*orig_r0*/ \
41 [--sp] = (R7:0,P5:0); \
42 p0.l = lo(IPEND); \
43 p0.h = hi(IPEND); \
44 r1 = [p0]; \
45 R0 = (N); \
46 jump __common_int_entry;
47
48/* This one pushes RETI without using CLI. Interrupts are enabled. */
49#define SAVE_CONTEXT_SYSCALL save_context_syscall
50#define SAVE_CONTEXT save_context_with_interrupts
51
52#define RESTORE_ALL_SYS restore_context_no_interrupts
53#define RESTORE_CONTEXT restore_context_with_interrupts
54
55#endif /* __ASSEMBLY__ */
56#endif /* __BFIN_ENTRY_H */
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