projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 58d08319 JN |
1 | #ifndef __iop_sap_in_defs_asm_h |
| 2 | #define __iop_sap_in_defs_asm_h | |
| 3 | ||
| 4 | /* | |
| 5 | * This file is autogenerated from | |
| 6 | * file: iop_sap_in.r | |
| 7 | * | |
| 8 | * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sap_in_defs_asm.h iop_sap_in.r | |
| 9 | * Any changes here will be lost. | |
| 10 | * | |
| 11 | * -*- buffer-read-only: t -*- | |
| 12 | */ | |
| 13 | ||
| 14 | #ifndef REG_FIELD | |
| 15 | #define REG_FIELD( scope, reg, field, value ) \ | |
| 16 | REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb ) | |
| 17 | #define REG_FIELD_X_( value, shift ) ((value) << shift) | |
| 18 | #endif | |
| 19 | ||
| 20 | #ifndef REG_STATE | |
| 21 | #define REG_STATE( scope, reg, field, symbolic_value ) \ | |
| 22 | REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb ) | |
| 23 | #define REG_STATE_X_( k, shift ) (k << shift) | |
| 24 | #endif | |
| 25 | ||
| 26 | #ifndef REG_MASK | |
| 27 | #define REG_MASK( scope, reg, field ) \ | |
| 28 | REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb ) | |
| 29 | #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb) | |
| 30 | #endif | |
| 31 | ||
| 32 | #ifndef REG_LSB | |
| 33 | #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb | |
| 34 | #endif | |
| 35 | ||
| 36 | #ifndef REG_BIT | |
| 37 | #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit | |
| 38 | #endif | |
| 39 | ||
| 40 | #ifndef REG_ADDR | |
| 41 | #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) | |
| 42 | #define REG_ADDR_X_( inst, offs ) ((inst) + offs) | |
| 43 | #endif | |
| 44 | ||
| 45 | #ifndef REG_ADDR_VECT | |
| 46 | #define REG_ADDR_VECT( scope, inst, reg, index ) \ | |
| 47 | REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \ | |
| 48 | STRIDE_##scope##_##reg ) | |
| 49 | #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ | |
| 50 | ((inst) + offs + (index) * stride) | |
| 51 | #endif | |
| 52 | ||
| 53 | #define STRIDE_iop_sap_in_rw_bus_byte 4 | |
| 54 | /* Register rw_bus_byte, scope iop_sap_in, type rw */ | |
| 55 | #define reg_iop_sap_in_rw_bus_byte___sync_sel___lsb 0 | |
| 56 | #define reg_iop_sap_in_rw_bus_byte___sync_sel___width 2 | |
| 57 | #define reg_iop_sap_in_rw_bus_byte___sync_ext_src___lsb 2 | |
| 58 | #define reg_iop_sap_in_rw_bus_byte___sync_ext_src___width 3 | |
| 59 | #define reg_iop_sap_in_rw_bus_byte___sync_edge___lsb 5 | |
| 60 | #define reg_iop_sap_in_rw_bus_byte___sync_edge___width 2 | |
| 61 | #define reg_iop_sap_in_rw_bus_byte___delay___lsb 7 | |
| 62 | #define reg_iop_sap_in_rw_bus_byte___delay___width 2 | |
| 63 | #define reg_iop_sap_in_rw_bus_byte_offset 0 | |
| 64 | ||
| 65 | #define STRIDE_iop_sap_in_rw_gio 4 | |
| 66 | /* Register rw_gio, scope iop_sap_in, type rw */ | |
| 67 | #define reg_iop_sap_in_rw_gio___sync_sel___lsb 0 | |
| 68 | #define reg_iop_sap_in_rw_gio___sync_sel___width 2 | |
| 69 | #define reg_iop_sap_in_rw_gio___sync_ext_src___lsb 2 | |
| 70 | #define reg_iop_sap_in_rw_gio___sync_ext_src___width 3 | |
| 71 | #define reg_iop_sap_in_rw_gio___sync_edge___lsb 5 | |
| 72 | #define reg_iop_sap_in_rw_gio___sync_edge___width 2 | |
| 73 | #define reg_iop_sap_in_rw_gio___delay___lsb 7 | |
| 74 | #define reg_iop_sap_in_rw_gio___delay___width 2 | |
| 75 | #define reg_iop_sap_in_rw_gio___logic___lsb 9 | |
| 76 | #define reg_iop_sap_in_rw_gio___logic___width 2 | |
| 77 | #define reg_iop_sap_in_rw_gio_offset 16 | |
| 78 | ||
| 79 | ||
| 80 | /* Constants */ | |
| 81 | #define regk_iop_sap_in_and 0x00000002 | |
| 82 | #define regk_iop_sap_in_ext_clk200 0x00000003 | |
| 83 | #define regk_iop_sap_in_gio0 0x00000000 | |
| 84 | #define regk_iop_sap_in_gio12 0x00000003 | |
| 85 | #define regk_iop_sap_in_gio16 0x00000004 | |
| 86 | #define regk_iop_sap_in_gio20 0x00000005 | |
| 87 | #define regk_iop_sap_in_gio24 0x00000006 | |
| 88 | #define regk_iop_sap_in_gio28 0x00000007 | |
| 89 | #define regk_iop_sap_in_gio4 0x00000001 | |
| 90 | #define regk_iop_sap_in_gio8 0x00000002 | |
| 91 | #define regk_iop_sap_in_inv 0x00000001 | |
| 92 | #define regk_iop_sap_in_neg 0x00000002 | |
| 93 | #define regk_iop_sap_in_no 0x00000000 | |
| 94 | #define regk_iop_sap_in_no_del_ext_clk200 0x00000002 | |
| 95 | #define regk_iop_sap_in_none 0x00000000 | |
| 96 | #define regk_iop_sap_in_one 0x00000001 | |
| 97 | #define regk_iop_sap_in_or 0x00000003 | |
| 98 | #define regk_iop_sap_in_pos 0x00000001 | |
| 99 | #define regk_iop_sap_in_pos_neg 0x00000003 | |
| 100 | #define regk_iop_sap_in_rw_bus_byte_default 0x00000000 | |
| 101 | #define regk_iop_sap_in_rw_bus_byte_size 0x00000004 | |
| 102 | #define regk_iop_sap_in_rw_gio_default 0x00000000 | |
| 103 | #define regk_iop_sap_in_rw_gio_size 0x00000020 | |
| 104 | #define regk_iop_sap_in_timer_grp0_tmr3 0x00000000 | |
| 105 | #define regk_iop_sap_in_timer_grp1_tmr3 0x00000001 | |
| 106 | #define regk_iop_sap_in_tmr_clk200 0x00000001 | |
| 107 | #define regk_iop_sap_in_two 0x00000002 | |
| 108 | #define regk_iop_sap_in_two_clk200 0x00000000 | |
| 109 | #endif /* __iop_sap_in_defs_asm_h */ |