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1da177e4 LT |
1 | /* |
2 | * CRIS pgtable.h - macros and functions to manipulate page tables. | |
3 | */ | |
4 | ||
5 | #ifndef _CRIS_PGTABLE_H | |
6 | #define _CRIS_PGTABLE_H | |
7 | ||
5d01e6ce MS |
8 | #include <asm/page.h> |
9 | #include <asm-generic/pgtable-nopmd.h> | |
1da177e4 LT |
10 | |
11 | #ifndef __ASSEMBLY__ | |
12 | #include <linux/config.h> | |
13 | #include <linux/sched.h> | |
14 | #include <asm/mmu.h> | |
15 | #endif | |
16 | #include <asm/arch/pgtable.h> | |
17 | ||
18 | /* | |
19 | * The Linux memory management assumes a three-level page table setup. On | |
20 | * CRIS, we use that, but "fold" the mid level into the top-level page | |
21 | * table. Since the MMU TLB is software loaded through an interrupt, it | |
22 | * supports any page table structure, so we could have used a three-level | |
23 | * setup, but for the amounts of memory we normally use, a two-level is | |
24 | * probably more efficient. | |
25 | * | |
26 | * This file contains the functions and defines necessary to modify and use | |
27 | * the CRIS page table tree. | |
28 | */ | |
29 | #ifndef __ASSEMBLY__ | |
30 | extern void paging_init(void); | |
31 | #endif | |
32 | ||
33 | /* Certain architectures need to do special things when pte's | |
34 | * within a page table are directly modified. Thus, the following | |
35 | * hook is made available. | |
36 | */ | |
37 | #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) | |
38 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | |
39 | ||
40 | /* | |
41 | * (pmds are folded into pgds so this doesn't get actually called, | |
42 | * but the define is needed for a generic inline function.) | |
43 | */ | |
44 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | |
5d01e6ce | 45 | #define set_pgu(pudptr, pudval) (*(pudptr) = pudval) |
1da177e4 | 46 | |
5d01e6ce | 47 | /* PGDIR_SHIFT determines the size of the area a second-level page table can |
1da177e4 LT |
48 | * map. It is equal to the page size times the number of PTE's that fit in |
49 | * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number. | |
50 | */ | |
51 | ||
5d01e6ce | 52 | #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-2)) |
1da177e4 LT |
53 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) |
54 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | |
55 | ||
56 | /* | |
57 | * entries per page directory level: we use a two-level, so | |
58 | * we don't really have any PMD directory physically. | |
59 | * pointers are 4 bytes so we can use the page size and | |
60 | * divide it by 4 (shift by 2). | |
61 | */ | |
62 | #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-2)) | |
1da177e4 LT |
63 | #define PTRS_PER_PGD (1UL << (PAGE_SHIFT-2)) |
64 | ||
65 | /* calculate how many PGD entries a user-level program can use | |
66 | * the first mappable virtual address is 0 | |
67 | * (TASK_SIZE is the maximum virtual address space) | |
68 | */ | |
69 | ||
70 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) | |
d455a369 | 71 | #define FIRST_USER_ADDRESS 0 |
1da177e4 LT |
72 | |
73 | /* zero page used for uninitialized stuff */ | |
74 | #ifndef __ASSEMBLY__ | |
75 | extern unsigned long empty_zero_page; | |
76 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) | |
77 | #endif | |
78 | ||
79 | /* number of bits that fit into a memory pointer */ | |
80 | #define BITS_PER_PTR (8*sizeof(unsigned long)) | |
81 | ||
82 | /* to align the pointer to a pointer address */ | |
83 | #define PTR_MASK (~(sizeof(void*)-1)) | |
84 | ||
85 | /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ | |
86 | /* 64-bit machines, beware! SRB. */ | |
87 | #define SIZEOF_PTR_LOG2 2 | |
88 | ||
89 | /* to find an entry in a page-table */ | |
90 | #define PAGE_PTR(address) \ | |
91 | ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) | |
92 | ||
93 | /* to set the page-dir */ | |
94 | #define SET_PAGE_DIR(tsk,pgdir) | |
95 | ||
96 | #define pte_none(x) (!pte_val(x)) | |
97 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | |
98 | #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) | |
99 | ||
5d01e6ce | 100 | #define pmd_none(x) (!pmd_val(x)) |
1da177e4 LT |
101 | /* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad |
102 | * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries. | |
103 | */ | |
104 | #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE) | |
105 | #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) | |
106 | #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0) | |
107 | ||
108 | #ifndef __ASSEMBLY__ | |
109 | ||
1da177e4 LT |
110 | /* |
111 | * The following only work if pte_present() is true. | |
112 | * Undefined behaviour if not.. | |
113 | */ | |
114 | ||
115 | extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; } | |
116 | extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } | |
117 | extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_READ; } | |
118 | extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } | |
119 | extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } | |
120 | extern inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } | |
121 | ||
122 | extern inline pte_t pte_wrprotect(pte_t pte) | |
123 | { | |
124 | pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); | |
125 | return pte; | |
126 | } | |
127 | ||
128 | extern inline pte_t pte_rdprotect(pte_t pte) | |
129 | { | |
130 | pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); | |
131 | return pte; | |
132 | } | |
133 | ||
134 | extern inline pte_t pte_exprotect(pte_t pte) | |
135 | { | |
136 | pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); | |
137 | return pte; | |
138 | } | |
139 | ||
140 | extern inline pte_t pte_mkclean(pte_t pte) | |
141 | { | |
142 | pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); | |
143 | return pte; | |
144 | } | |
145 | ||
146 | extern inline pte_t pte_mkold(pte_t pte) | |
147 | { | |
148 | pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); | |
149 | return pte; | |
150 | } | |
151 | ||
152 | extern inline pte_t pte_mkwrite(pte_t pte) | |
153 | { | |
154 | pte_val(pte) |= _PAGE_WRITE; | |
155 | if (pte_val(pte) & _PAGE_MODIFIED) | |
156 | pte_val(pte) |= _PAGE_SILENT_WRITE; | |
157 | return pte; | |
158 | } | |
159 | ||
160 | extern inline pte_t pte_mkread(pte_t pte) | |
161 | { | |
162 | pte_val(pte) |= _PAGE_READ; | |
163 | if (pte_val(pte) & _PAGE_ACCESSED) | |
164 | pte_val(pte) |= _PAGE_SILENT_READ; | |
165 | return pte; | |
166 | } | |
167 | ||
168 | extern inline pte_t pte_mkexec(pte_t pte) | |
169 | { | |
170 | pte_val(pte) |= _PAGE_READ; | |
171 | if (pte_val(pte) & _PAGE_ACCESSED) | |
172 | pte_val(pte) |= _PAGE_SILENT_READ; | |
173 | return pte; | |
174 | } | |
175 | ||
176 | extern inline pte_t pte_mkdirty(pte_t pte) | |
177 | { | |
178 | pte_val(pte) |= _PAGE_MODIFIED; | |
179 | if (pte_val(pte) & _PAGE_WRITE) | |
180 | pte_val(pte) |= _PAGE_SILENT_WRITE; | |
181 | return pte; | |
182 | } | |
183 | ||
184 | extern inline pte_t pte_mkyoung(pte_t pte) | |
185 | { | |
186 | pte_val(pte) |= _PAGE_ACCESSED; | |
187 | if (pte_val(pte) & _PAGE_READ) | |
188 | { | |
189 | pte_val(pte) |= _PAGE_SILENT_READ; | |
190 | if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) == | |
191 | (_PAGE_WRITE | _PAGE_MODIFIED)) | |
192 | pte_val(pte) |= _PAGE_SILENT_WRITE; | |
193 | } | |
194 | return pte; | |
195 | } | |
196 | ||
197 | /* | |
198 | * Conversion functions: convert a page and protection to a page entry, | |
199 | * and a page entry and page directory to the page they refer to. | |
200 | */ | |
201 | ||
202 | /* What actually goes as arguments to the various functions is less than | |
203 | * obvious, but a rule of thumb is that struct page's goes as struct page *, | |
204 | * really physical DRAM addresses are unsigned long's, and DRAM "virtual" | |
205 | * addresses (the 0xc0xxxxxx's) goes as void *'s. | |
206 | */ | |
207 | ||
208 | extern inline pte_t __mk_pte(void * page, pgprot_t pgprot) | |
209 | { | |
210 | pte_t pte; | |
211 | /* the PTE needs a physical address */ | |
212 | pte_val(pte) = __pa(page) | pgprot_val(pgprot); | |
213 | return pte; | |
214 | } | |
215 | ||
216 | #define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot)) | |
217 | ||
218 | #define mk_pte_phys(physpage, pgprot) \ | |
219 | ({ \ | |
220 | pte_t __pte; \ | |
221 | \ | |
222 | pte_val(__pte) = (physpage) + pgprot_val(pgprot); \ | |
223 | __pte; \ | |
224 | }) | |
225 | ||
226 | extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | |
227 | { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } | |
228 | ||
229 | ||
230 | /* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval | |
231 | * __pte_page(pte_val) refers to the "virtual" DRAM interval | |
232 | * pte_pagenr refers to the page-number counted starting from the virtual DRAM start | |
233 | */ | |
234 | ||
235 | extern inline unsigned long __pte_page(pte_t pte) | |
236 | { | |
237 | /* the PTE contains a physical address */ | |
238 | return (unsigned long)__va(pte_val(pte) & PAGE_MASK); | |
239 | } | |
240 | ||
241 | #define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT) | |
242 | ||
243 | /* permanent address of a page */ | |
244 | ||
245 | #define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) | |
246 | #define pte_page(pte) (mem_map+pte_pagenr(pte)) | |
247 | ||
248 | /* only the pte's themselves need to point to physical DRAM (see above) | |
249 | * the pagetable links are purely handled within the kernel SW and thus | |
250 | * don't need the __pa and __va transformations. | |
251 | */ | |
252 | ||
253 | extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep) | |
254 | { pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; } | |
255 | ||
256 | #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) | |
257 | #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) | |
258 | ||
259 | /* to find an entry in a page-table-directory. */ | |
5d01e6ce | 260 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) |
1da177e4 LT |
261 | |
262 | /* to find an entry in a page-table-directory */ | |
263 | extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) | |
264 | { | |
265 | return mm->pgd + pgd_index(address); | |
266 | } | |
267 | ||
268 | /* to find an entry in a kernel page-table-directory */ | |
269 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | |
270 | ||
1da177e4 LT |
271 | /* Find an entry in the third-level page table.. */ |
272 | #define __pte_offset(address) \ | |
273 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | |
274 | #define pte_offset_kernel(dir, address) \ | |
275 | ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address)) | |
276 | #define pte_offset_map(dir, address) \ | |
277 | ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) | |
278 | #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address) | |
279 | ||
280 | #define pte_unmap(pte) do { } while (0) | |
281 | #define pte_unmap_nested(pte) do { } while (0) | |
282 | #define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT) | |
283 | #define pfn_pte(pfn, prot) __pte((__pa((pfn) << PAGE_SHIFT)) | pgprot_val(prot)) | |
284 | ||
285 | #define pte_ERROR(e) \ | |
286 | printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e)) | |
1da177e4 LT |
287 | #define pgd_ERROR(e) \ |
288 | printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e)) | |
289 | ||
290 | ||
291 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */ | |
292 | ||
293 | /* | |
294 | * CRIS doesn't have any external MMU info: the kernel page | |
295 | * tables contain all the necessary information. | |
296 | * | |
297 | * Actually I am not sure on what this could be used for. | |
298 | */ | |
299 | extern inline void update_mmu_cache(struct vm_area_struct * vma, | |
300 | unsigned long address, pte_t pte) | |
301 | { | |
302 | } | |
303 | ||
304 | /* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */ | |
305 | /* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */ | |
306 | ||
307 | #define __swp_type(x) (((x).val >> 5) & 0x7f) | |
308 | #define __swp_offset(x) ((x).val >> 12) | |
309 | #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 5) | ((offset) << 12) }) | |
310 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | |
311 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | |
312 | ||
313 | #define kern_addr_valid(addr) (1) | |
314 | ||
315 | #include <asm-generic/pgtable.h> | |
316 | ||
317 | /* | |
318 | * No page table caches to initialise | |
319 | */ | |
320 | #define pgtable_cache_init() do { } while (0) | |
321 | ||
322 | #define pte_to_pgoff(x) (pte_val(x) >> 6) | |
323 | #define pgoff_to_pte(x) __pte(((x) << 6) | _PAGE_FILE) | |
324 | ||
5d01e6ce MS |
325 | typedef pte_t *pte_addr_t; |
326 | ||
1da177e4 LT |
327 | #endif /* __ASSEMBLY__ */ |
328 | #endif /* _CRIS_PGTABLE_H */ |