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1da177e4 LT |
1 | /* io.h: FRV I/O operations |
2 | * | |
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | |
4 | * Written by David Howells (dhowells@redhat.com) | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This gets interesting when talking to the PCI bus - the CPU is in big endian | |
12 | * mode, the PCI bus is little endian and the hardware in the middle can do | |
13 | * byte swapping | |
14 | */ | |
15 | #ifndef _ASM_IO_H | |
16 | #define _ASM_IO_H | |
17 | ||
18 | #ifdef __KERNEL__ | |
19 | ||
20 | #include <linux/config.h> | |
21 | #include <asm/virtconvert.h> | |
22 | #include <asm/string.h> | |
23 | #include <asm/mb-regs.h> | |
24 | #include <linux/delay.h> | |
25 | ||
26 | /* | |
27 | * swap functions are sometimes needed to interface little-endian hardware | |
28 | */ | |
29 | ||
30 | static inline unsigned short _swapw(unsigned short v) | |
31 | { | |
32 | return ((v << 8) | (v >> 8)); | |
33 | } | |
34 | ||
35 | static inline unsigned long _swapl(unsigned long v) | |
36 | { | |
37 | return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24)); | |
38 | } | |
39 | ||
40 | //#define __iormb() asm volatile("membar") | |
41 | //#define __iowmb() asm volatile("membar") | |
42 | ||
43 | #define __raw_readb(addr) __builtin_read8((void *) (addr)) | |
44 | #define __raw_readw(addr) __builtin_read16((void *) (addr)) | |
45 | #define __raw_readl(addr) __builtin_read32((void *) (addr)) | |
46 | ||
47 | #define __raw_writeb(datum, addr) __builtin_write8((void *) (addr), datum) | |
48 | #define __raw_writew(datum, addr) __builtin_write16((void *) (addr), datum) | |
49 | #define __raw_writel(datum, addr) __builtin_write32((void *) (addr), datum) | |
50 | ||
51 | static inline void io_outsb(unsigned int addr, const void *buf, int len) | |
52 | { | |
53 | unsigned long __ioaddr = (unsigned long) addr; | |
54 | const uint8_t *bp = buf; | |
55 | ||
56 | while (len--) | |
57 | __builtin_write8((volatile void __iomem *) __ioaddr, *bp++); | |
58 | } | |
59 | ||
60 | static inline void io_outsw(unsigned int addr, const void *buf, int len) | |
61 | { | |
62 | unsigned long __ioaddr = (unsigned long) addr; | |
63 | const uint16_t *bp = buf; | |
64 | ||
65 | while (len--) | |
66 | __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++)); | |
67 | } | |
68 | ||
69 | extern void __outsl_ns(unsigned int addr, const void *buf, int len); | |
70 | extern void __outsl_sw(unsigned int addr, const void *buf, int len); | |
71 | static inline void __outsl(unsigned int addr, const void *buf, int len, int swap) | |
72 | { | |
73 | unsigned long __ioaddr = (unsigned long) addr; | |
74 | ||
75 | if (!swap) | |
76 | __outsl_ns(__ioaddr, buf, len); | |
77 | else | |
78 | __outsl_sw(__ioaddr, buf, len); | |
79 | } | |
80 | ||
81 | static inline void io_insb(unsigned long addr, void *buf, int len) | |
82 | { | |
83 | uint8_t *bp = buf; | |
84 | ||
85 | while (len--) | |
86 | *bp++ = __builtin_read8((volatile void __iomem *) addr); | |
87 | } | |
88 | ||
89 | static inline void io_insw(unsigned long addr, void *buf, int len) | |
90 | { | |
91 | uint16_t *bp = buf; | |
92 | ||
93 | while (len--) | |
94 | *bp++ = __builtin_read16((volatile void __iomem *) addr); | |
95 | } | |
96 | ||
97 | extern void __insl_ns(unsigned long addr, void *buf, int len); | |
98 | extern void __insl_sw(unsigned long addr, void *buf, int len); | |
99 | static inline void __insl(unsigned long addr, void *buf, int len, int swap) | |
100 | { | |
101 | if (!swap) | |
102 | __insl_ns(addr, buf, len); | |
103 | else | |
104 | __insl_sw(addr, buf, len); | |
105 | } | |
106 | ||
107 | /* | |
108 | * make the short names macros so specific devices | |
109 | * can override them as required | |
110 | */ | |
111 | ||
112 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) | |
113 | { | |
114 | memset((void __force *) addr, val, count); | |
115 | } | |
116 | ||
117 | static inline void memcpy_fromio(void *dst, volatile void __iomem *src, int count) | |
118 | { | |
119 | memcpy(dst, (void __force *) src, count); | |
120 | } | |
121 | ||
122 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) | |
123 | { | |
124 | memcpy((void __force *) dst, src, count); | |
125 | } | |
126 | ||
127 | static inline uint8_t inb(unsigned long addr) | |
128 | { | |
129 | return __builtin_read8((void *)addr); | |
130 | } | |
131 | ||
132 | static inline uint16_t inw(unsigned long addr) | |
133 | { | |
134 | uint16_t ret = __builtin_read16((void *)addr); | |
135 | ||
136 | if (__is_PCI_IO(addr)) | |
137 | ret = _swapw(ret); | |
138 | ||
139 | return ret; | |
140 | } | |
141 | ||
142 | static inline uint32_t inl(unsigned long addr) | |
143 | { | |
144 | uint32_t ret = __builtin_read32((void *)addr); | |
145 | ||
146 | if (__is_PCI_IO(addr)) | |
147 | ret = _swapl(ret); | |
148 | ||
149 | return ret; | |
150 | } | |
151 | ||
152 | static inline void outb(uint8_t datum, unsigned long addr) | |
153 | { | |
154 | __builtin_write8((void *)addr, datum); | |
155 | } | |
156 | ||
157 | static inline void outw(uint16_t datum, unsigned long addr) | |
158 | { | |
159 | if (__is_PCI_IO(addr)) | |
160 | datum = _swapw(datum); | |
161 | __builtin_write16((void *)addr, datum); | |
162 | } | |
163 | ||
164 | static inline void outl(uint32_t datum, unsigned long addr) | |
165 | { | |
166 | if (__is_PCI_IO(addr)) | |
167 | datum = _swapl(datum); | |
168 | __builtin_write32((void *)addr, datum); | |
169 | } | |
170 | ||
171 | #define inb_p(addr) inb(addr) | |
172 | #define inw_p(addr) inw(addr) | |
173 | #define inl_p(addr) inl(addr) | |
174 | #define outb_p(x,addr) outb(x,addr) | |
175 | #define outw_p(x,addr) outw(x,addr) | |
176 | #define outl_p(x,addr) outl(x,addr) | |
177 | ||
178 | #define outsb(a,b,l) io_outsb(a,b,l) | |
179 | #define outsw(a,b,l) io_outsw(a,b,l) | |
180 | #define outsl(a,b,l) __outsl(a,b,l,0) | |
181 | ||
182 | #define insb(a,b,l) io_insb(a,b,l) | |
183 | #define insw(a,b,l) io_insw(a,b,l) | |
184 | #define insl(a,b,l) __insl(a,b,l,0) | |
185 | ||
186 | #define IO_SPACE_LIMIT 0xffffffff | |
187 | ||
188 | static inline uint8_t readb(const volatile void __iomem *addr) | |
189 | { | |
190 | return __builtin_read8((volatile uint8_t __force *) addr); | |
191 | } | |
192 | ||
193 | static inline uint16_t readw(const volatile void __iomem *addr) | |
194 | { | |
195 | uint16_t ret = __builtin_read16((volatile uint16_t __force *)addr); | |
196 | ||
197 | if (__is_PCI_MEM(addr)) | |
198 | ret = _swapw(ret); | |
199 | return ret; | |
200 | } | |
201 | ||
202 | static inline uint32_t readl(const volatile void __iomem *addr) | |
203 | { | |
204 | uint32_t ret = __builtin_read32((volatile uint32_t __force *)addr); | |
205 | ||
206 | if (__is_PCI_MEM(addr)) | |
207 | ret = _swapl(ret); | |
208 | ||
209 | return ret; | |
210 | } | |
211 | ||
212 | static inline void writeb(uint8_t datum, volatile void __iomem *addr) | |
213 | { | |
214 | __builtin_write8((volatile uint8_t __force *) addr, datum); | |
215 | if (__is_PCI_MEM(addr)) | |
216 | __flush_PCI_writes(); | |
217 | } | |
218 | ||
219 | static inline void writew(uint16_t datum, volatile void __iomem *addr) | |
220 | { | |
221 | if (__is_PCI_MEM(addr)) | |
222 | datum = _swapw(datum); | |
223 | ||
224 | __builtin_write16((volatile uint16_t __force *) addr, datum); | |
225 | if (__is_PCI_MEM(addr)) | |
226 | __flush_PCI_writes(); | |
227 | } | |
228 | ||
229 | static inline void writel(uint32_t datum, volatile void __iomem *addr) | |
230 | { | |
231 | if (__is_PCI_MEM(addr)) | |
232 | datum = _swapl(datum); | |
233 | ||
234 | __builtin_write32((volatile uint32_t __force *) addr, datum); | |
235 | if (__is_PCI_MEM(addr)) | |
236 | __flush_PCI_writes(); | |
237 | } | |
238 | ||
239 | ||
240 | /* Values for nocacheflag and cmode */ | |
241 | #define IOMAP_FULL_CACHING 0 | |
242 | #define IOMAP_NOCACHE_SER 1 | |
243 | #define IOMAP_NOCACHE_NONSER 2 | |
244 | #define IOMAP_WRITETHROUGH 3 | |
245 | ||
246 | extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); | |
247 | extern void __iounmap(void __iomem *addr, unsigned long size); | |
248 | ||
249 | static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) | |
250 | { | |
251 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | |
252 | } | |
253 | ||
254 | static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) | |
255 | { | |
256 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | |
257 | } | |
258 | ||
259 | static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size) | |
260 | { | |
261 | return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); | |
262 | } | |
263 | ||
264 | static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size) | |
265 | { | |
266 | return __ioremap(physaddr, size, IOMAP_FULL_CACHING); | |
267 | } | |
268 | ||
269 | extern void iounmap(void __iomem *addr); | |
270 | ||
271 | static inline void flush_write_buffers(void) | |
272 | { | |
273 | __asm__ __volatile__ ("membar" : : :"memory"); | |
274 | } | |
275 | ||
276 | ||
277 | /* | |
278 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
279 | * access | |
280 | */ | |
281 | #define xlate_dev_mem_ptr(p) __va(p) | |
282 | ||
283 | /* | |
284 | * Convert a virtual cached pointer to an uncached pointer | |
285 | */ | |
286 | #define xlate_dev_kmem_ptr(p) p | |
287 | ||
288 | #endif /* __KERNEL__ */ | |
289 | ||
290 | #endif /* _ASM_IO_H */ |