Commit | Line | Data |
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93ea02bb PZ |
1 | /* |
2 | * Generic barrier definitions, originally based on MN10300 definitions. | |
885df91c DH |
3 | * |
4 | * It should be possible to use these on really simple architectures, | |
5 | * but it serves more as a starting point for new ports. | |
6 | * | |
7 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | |
8 | * Written by David Howells (dhowells@redhat.com) | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public Licence | |
12 | * as published by the Free Software Foundation; either version | |
13 | * 2 of the Licence, or (at your option) any later version. | |
14 | */ | |
15 | #ifndef __ASM_GENERIC_BARRIER_H | |
16 | #define __ASM_GENERIC_BARRIER_H | |
17 | ||
18 | #ifndef __ASSEMBLY__ | |
19 | ||
93ea02bb PZ |
20 | #include <linux/compiler.h> |
21 | ||
22 | #ifndef nop | |
23 | #define nop() asm volatile ("nop") | |
24 | #endif | |
885df91c DH |
25 | |
26 | /* | |
93ea02bb PZ |
27 | * Force strict CPU ordering. And yes, this is required on UP too when we're |
28 | * talking to devices. | |
885df91c | 29 | * |
93ea02bb | 30 | * Fall back to compiler barriers if nothing better is provided. |
885df91c DH |
31 | */ |
32 | ||
93ea02bb PZ |
33 | #ifndef mb |
34 | #define mb() barrier() | |
35 | #endif | |
36 | ||
37 | #ifndef rmb | |
885df91c | 38 | #define rmb() mb() |
93ea02bb PZ |
39 | #endif |
40 | ||
41 | #ifndef wmb | |
42 | #define wmb() mb() | |
43 | #endif | |
44 | ||
1077fa36 AD |
45 | #ifndef dma_rmb |
46 | #define dma_rmb() rmb() | |
47 | #endif | |
48 | ||
49 | #ifndef dma_wmb | |
50 | #define dma_wmb() wmb() | |
51 | #endif | |
52 | ||
93ea02bb PZ |
53 | #ifndef read_barrier_depends |
54 | #define read_barrier_depends() do { } while (0) | |
55 | #endif | |
885df91c DH |
56 | |
57 | #ifdef CONFIG_SMP | |
470c27e4 VG |
58 | |
59 | #ifndef smp_mb | |
885df91c | 60 | #define smp_mb() mb() |
470c27e4 VG |
61 | #endif |
62 | ||
63 | #ifndef smp_rmb | |
885df91c | 64 | #define smp_rmb() rmb() |
470c27e4 VG |
65 | #endif |
66 | ||
67 | #ifndef smp_wmb | |
885df91c | 68 | #define smp_wmb() wmb() |
470c27e4 VG |
69 | #endif |
70 | ||
71 | #ifndef smp_read_barrier_depends | |
93ea02bb | 72 | #define smp_read_barrier_depends() read_barrier_depends() |
470c27e4 VG |
73 | #endif |
74 | ||
0890a264 LT |
75 | #else /* !CONFIG_SMP */ |
76 | ||
470c27e4 | 77 | #ifndef smp_mb |
885df91c | 78 | #define smp_mb() barrier() |
470c27e4 VG |
79 | #endif |
80 | ||
81 | #ifndef smp_rmb | |
885df91c | 82 | #define smp_rmb() barrier() |
470c27e4 VG |
83 | #endif |
84 | ||
85 | #ifndef smp_wmb | |
885df91c | 86 | #define smp_wmb() barrier() |
470c27e4 VG |
87 | #endif |
88 | ||
89 | #ifndef smp_read_barrier_depends | |
93ea02bb | 90 | #define smp_read_barrier_depends() do { } while (0) |
885df91c DH |
91 | #endif |
92 | ||
0890a264 | 93 | #endif /* CONFIG_SMP */ |
470c27e4 | 94 | |
b92b8b35 PZ |
95 | #ifndef smp_store_mb |
96 | #define smp_store_mb(var, value) do { WRITE_ONCE(var, value); mb(); } while (0) | |
93ea02bb | 97 | #endif |
885df91c | 98 | |
febdbfe8 PZ |
99 | #ifndef smp_mb__before_atomic |
100 | #define smp_mb__before_atomic() smp_mb() | |
101 | #endif | |
102 | ||
103 | #ifndef smp_mb__after_atomic | |
104 | #define smp_mb__after_atomic() smp_mb() | |
105 | #endif | |
106 | ||
47933ad4 PZ |
107 | #define smp_store_release(p, v) \ |
108 | do { \ | |
109 | compiletime_assert_atomic_type(*p); \ | |
110 | smp_mb(); \ | |
76695af2 | 111 | WRITE_ONCE(*p, v); \ |
47933ad4 PZ |
112 | } while (0) |
113 | ||
114 | #define smp_load_acquire(p) \ | |
115 | ({ \ | |
76695af2 | 116 | typeof(*p) ___p1 = READ_ONCE(*p); \ |
47933ad4 PZ |
117 | compiletime_assert_atomic_type(*p); \ |
118 | smp_mb(); \ | |
119 | ___p1; \ | |
120 | }) | |
121 | ||
885df91c DH |
122 | #endif /* !__ASSEMBLY__ */ |
123 | #endif /* __ASM_GENERIC_BARRIER_H */ |