Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* Generic I/O and MEMIO string operations. */ |
2 | ||
3 | #define __ide_insw insw | |
4 | #define __ide_insl insl | |
5 | #define __ide_outsw outsw | |
6 | #define __ide_outsl outsl | |
7 | ||
8 | static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count) | |
9 | { | |
10 | while (count--) { | |
11 | *(u16 *)addr = readw(port); | |
12 | addr += 2; | |
13 | } | |
14 | } | |
15 | ||
16 | static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count) | |
17 | { | |
18 | while (count--) { | |
19 | *(u32 *)addr = readl(port); | |
20 | addr += 4; | |
21 | } | |
22 | } | |
23 | ||
24 | static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count) | |
25 | { | |
26 | while (count--) { | |
27 | writew(*(u16 *)addr, port); | |
28 | addr += 2; | |
29 | } | |
30 | } | |
31 | ||
32 | static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count) | |
33 | { | |
34 | while (count--) { | |
35 | writel(*(u32 *)addr, port); | |
36 | addr += 4; | |
37 | } | |
38 | } |