Commit | Line | Data |
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2272b0e0 AS |
1 | /* |
2 | * linux/include/asm-i386/tsc.h | |
3 | * | |
4 | * i386 TSC related functions | |
5 | */ | |
6 | #ifndef _ASM_i386_TSC_H | |
7 | #define _ASM_i386_TSC_H | |
8 | ||
9 | #include <asm/processor.h> | |
10 | ||
11 | /* | |
12 | * Standard way to access the cycle counter. | |
13 | */ | |
14 | typedef unsigned long long cycles_t; | |
15 | ||
16 | extern unsigned int cpu_khz; | |
17 | extern unsigned int tsc_khz; | |
18 | ||
19 | static inline cycles_t get_cycles(void) | |
20 | { | |
21 | unsigned long long ret = 0; | |
22 | ||
23 | #ifndef CONFIG_X86_TSC | |
24 | if (!cpu_has_tsc) | |
25 | return 0; | |
26 | #endif | |
27 | ||
28 | #if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC) | |
29 | rdtscll(ret); | |
30 | #endif | |
31 | return ret; | |
32 | } | |
33 | ||
34 | /* Like get_cycles, but make sure the CPU is synchronized. */ | |
35 | static __always_inline cycles_t get_cycles_sync(void) | |
36 | { | |
37 | unsigned long long ret; | |
38 | #ifdef X86_FEATURE_SYNC_RDTSC | |
39 | unsigned eax; | |
40 | ||
41 | /* | |
42 | * Don't do an additional sync on CPUs where we know | |
43 | * RDTSC is already synchronous: | |
44 | */ | |
45 | alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC, | |
46 | "=a" (eax), "0" (1) : "ebx","ecx","edx","memory"); | |
47 | #else | |
48 | sync_core(); | |
49 | #endif | |
50 | rdtscll(ret); | |
51 | ||
52 | return ret; | |
53 | } | |
54 | ||
55 | extern void tsc_init(void); | |
5a90cf20 | 56 | extern void mark_tsc_unstable(char *reason); |
2272b0e0 AS |
57 | extern int unsynchronized_tsc(void); |
58 | extern void init_tsc_clocksource(void); | |
59 | ||
60 | /* | |
61 | * Boot-time check whether the TSCs are synchronized across | |
62 | * all CPUs/cores: | |
63 | */ | |
64 | extern void check_tsc_sync_source(int cpu); | |
65 | extern void check_tsc_sync_target(void); | |
66 | ||
67 | #endif |