projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #ifndef _M68K_IRQ_H_ |
| 2 | #define _M68K_IRQ_H_ | |
| 3 | ||
| 1da177e4 LT |
4 | #include <asm/ptrace.h> |
| 5 | ||
| 6 | #ifdef CONFIG_COLDFIRE | |
| 7 | /* | |
| 8 | * On the ColdFire we keep track of all vectors. That way drivers | |
| 9 | * can register whatever vector number they wish, and we can deal | |
| 10 | * with it. | |
| 11 | */ | |
| 12 | #define SYS_IRQS 256 | |
| 13 | #define NR_IRQS SYS_IRQS | |
| 14 | ||
| 15 | #else | |
| 16 | ||
| 17 | /* | |
| 18 | * # of m68k interrupts | |
| 19 | */ | |
| 20 | #define SYS_IRQS 8 | |
| 21 | #define NR_IRQS (24+SYS_IRQS) | |
| 22 | ||
| 23 | #endif /* CONFIG_COLDFIRE */ | |
| 24 | ||
| 25 | /* | |
| 26 | * Interrupt source definitions | |
| 27 | * General interrupt sources are the level 1-7. | |
| 28 | * Adding an interrupt service routine for one of these sources | |
| 29 | * results in the addition of that routine to a chain of routines. | |
| 30 | * Each one is called in succession. Each individual interrupt | |
| 31 | * service routine should determine if the device associated with | |
| 32 | * that routine requires service. | |
| 33 | */ | |
| 34 | ||
| 35 | #define IRQ1 (1) /* level 1 interrupt */ | |
| 36 | #define IRQ2 (2) /* level 2 interrupt */ | |
| 37 | #define IRQ3 (3) /* level 3 interrupt */ | |
| 38 | #define IRQ4 (4) /* level 4 interrupt */ | |
| 39 | #define IRQ5 (5) /* level 5 interrupt */ | |
| 40 | #define IRQ6 (6) /* level 6 interrupt */ | |
| 41 | #define IRQ7 (7) /* level 7 interrupt (non-maskable) */ | |
| 42 | ||
| 43 | /* | |
| 44 | * Machine specific interrupt sources. | |
| 45 | * | |
| 46 | * Adding an interrupt service routine for a source with this bit | |
| 47 | * set indicates a special machine specific interrupt source. | |
| 48 | * The machine specific files define these sources. | |
| 49 | * | |
| 50 | * The IRQ_MACHSPEC bit is now gone - the only thing it did was to | |
| 51 | * introduce unnecessary overhead. | |
| 52 | * | |
| 53 | * All interrupt handling is actually machine specific so it is better | |
| 54 | * to use function pointers, as used by the Sparc port, and select the | |
| 55 | * interrupt handling functions when initializing the kernel. This way | |
| 56 | * we save some unnecessary overhead at run-time. | |
| 57 | * 01/11/97 - Jes | |
| 58 | */ | |
| 59 | ||
| 60 | extern void (*mach_enable_irq)(unsigned int); | |
| 61 | extern void (*mach_disable_irq)(unsigned int); | |
| 62 | ||
| 63 | /* | |
| 64 | * various flags for request_irq() - the Amiga now uses the standard | |
| f6f23887 TG |
65 | * mechanism like all other architectures - IRQF_DISABLED and |
| 66 | * IRQF_SHARED are your friends. | |
| 1da177e4 LT |
67 | */ |
| 68 | #define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */ | |
| 69 | #define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */ | |
| 70 | #define IRQ_FLG_FAST (0x0004) | |
| 71 | #define IRQ_FLG_SLOW (0x0008) | |
| 72 | #define IRQ_FLG_STD (0x8000) /* internally used */ | |
| 73 | ||
| 74 | #ifdef CONFIG_M68360 | |
| 75 | ||
| 76 | #define CPM_INTERRUPT IRQ4 | |
| 77 | ||
| 78 | /* see MC68360 User's Manual, p. 7-377 */ | |
| 79 | #define CPM_VECTOR_BASE 0x04 /* 3 MSbits of CPM vector */ | |
| 80 | ||
| 81 | #endif /* CONFIG_M68360 */ | |
| 82 | ||
| 1da177e4 LT |
83 | /* |
| 84 | * Some drivers want these entry points | |
| 85 | */ | |
| 09148777 | 86 | #define enable_irq(x) do { } while (0) |
| 32588918 | 87 | #define disable_irq(x) do { } while (0) |
| 1da177e4 LT |
88 | #define disable_irq_nosync(x) disable_irq(x) |
| 89 | ||
| 1da177e4 | 90 | #endif /* _M68K_IRQ_H_ */ |