[MIPS] Make __pa() aware of XKPHYS/CKSEG0 address mix for 64 bit kernels
[deliverable/linux.git] / include / asm-mips / page.h
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000, 03 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 */
9#ifndef _ASM_PAGE_H
10#define _ASM_PAGE_H
11
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12
13#ifdef __KERNEL__
14
15#include <spaces.h>
16
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17/*
18 * PAGE_SHIFT determines the page size
19 */
20#ifdef CONFIG_PAGE_SIZE_4KB
21#define PAGE_SHIFT 12
22#endif
23#ifdef CONFIG_PAGE_SIZE_8KB
24#define PAGE_SHIFT 13
25#endif
26#ifdef CONFIG_PAGE_SIZE_16KB
27#define PAGE_SHIFT 14
28#endif
29#ifdef CONFIG_PAGE_SIZE_64KB
30#define PAGE_SHIFT 16
31#endif
32#define PAGE_SIZE (1UL << PAGE_SHIFT)
33#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
34
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35#ifndef __ASSEMBLY__
36
99e3b942 37#include <linux/pfn.h>
585fa724 38#include <asm/cpu-features.h>
99e3b942 39#include <asm/io.h>
585fa724 40
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41extern void clear_page(void * page);
42extern void copy_page(void * to, void * from);
43
44extern unsigned long shm_align_mask;
45
46static inline unsigned long pages_do_alias(unsigned long addr1,
47 unsigned long addr2)
48{
49 return (addr1 ^ addr2) & shm_align_mask;
50}
51
52struct page;
53
54static inline void clear_user_page(void *addr, unsigned long vaddr,
55 struct page *page)
56{
57 extern void (*flush_data_cache_page)(unsigned long addr);
58
59 clear_page(addr);
585fa724 60 if (pages_do_alias((unsigned long) addr, vaddr & PAGE_MASK))
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61 flush_data_cache_page((unsigned long)addr);
62}
63
64static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
65 struct page *to)
66{
67 extern void (*flush_data_cache_page)(unsigned long addr);
68
69 copy_page(vto, vfrom);
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70 if (!cpu_has_ic_fills_f_dc ||
71 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
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72 flush_data_cache_page((unsigned long)vto);
73}
74
75/*
76 * These are used to make use of C type-checking..
77 */
78#ifdef CONFIG_64BIT_PHYS_ADDR
ec917c2c 79 #ifdef CONFIG_CPU_MIPS32
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80 typedef struct { unsigned long pte_low, pte_high; } pte_t;
81 #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
d34555fb 82 #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
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83 #else
84 typedef struct { unsigned long long pte; } pte_t;
85 #define pte_val(x) ((x).pte)
d34555fb 86 #define __pte(x) ((pte_t) { (x) } )
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87 #endif
88#else
89typedef struct { unsigned long pte; } pte_t;
90#define pte_val(x) ((x).pte)
c6e8b587 91#define __pte(x) ((pte_t) { (x) } )
d34555fb 92#endif
1da177e4 93
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94/*
95 * For 3-level pagetables we defines these ourselves, for 2-level the
96 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
97 */
98#ifdef CONFIG_64BIT
1da177e4 99
c6e8b587 100typedef struct { unsigned long pmd; } pmd_t;
1da177e4 101#define pmd_val(x) ((x).pmd)
c6e8b587 102#define __pmd(x) ((pmd_t) { (x) } )
1da177e4 103
c6e8b587 104#endif
1da177e4 105
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106/*
107 * Right now we don't support 4-level pagetables, so all pud-related
108 * definitions come from <asm-generic/pgtable-nopud.h>.
109 */
110
111/*
112 * Finall the top of the hierarchy, the pgd
113 */
114typedef struct { unsigned long pgd; } pgd_t;
115#define pgd_val(x) ((x).pgd)
1da177e4 116#define __pgd(x) ((pgd_t) { (x) } )
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117
118/*
119 * Manipulate page protection bits
120 */
121typedef struct { unsigned long pgprot; } pgprot_t;
122#define pgprot_val(x) ((x).pgprot)
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123#define __pgprot(x) ((pgprot_t) { (x) } )
124
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125/*
126 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
127 * pair of pages we only have a single global bit per pair of pages. When
128 * writing to the TLB make sure we always have the bit set for both pages
129 * or none. This macro is used to access the `buddy' of the pte we're just
130 * working on.
131 */
132#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
133
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134#endif /* !__ASSEMBLY__ */
135
136/* to align the pointer to the (next) page boundary */
137#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
138
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139#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
140#define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0)
141#else
142#define __pa_page_offset(x) PAGE_OFFSET
143#endif
144#define __pa(x) ((unsigned long)(x) - __pa_page_offset(x))
145#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
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146
147#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
148
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149#ifdef CONFIG_FLATMEM
150
151#define pfn_valid(pfn) ((pfn) < max_mapnr)
152
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153#elif defined(CONFIG_SPARSEMEM)
154
155/* pfn_valid is defined in linux/mmzone.h */
156
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157#elif defined(CONFIG_NEED_MULTIPLE_NODES)
158
159#define pfn_valid(pfn) \
160({ \
161 unsigned long __pfn = (pfn); \
162 int __n = pfn_to_nid(__pfn); \
163 ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \
164 NODE_DATA(__n)->node_spanned_pages) \
165 : 0); \
166})
167
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168#endif
169
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170#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
171#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr)))
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172
173#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
174 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
175
176#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
177#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
178
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179#ifdef CONFIG_LIMITED_DMA
180#define WANT_PAGE_VIRTUAL
181#endif
182
a02036e7 183#include <asm-generic/memory_model.h>
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184#include <asm-generic/page.h>
185
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186#endif /* defined (__KERNEL__) */
187
1da177e4 188#endif /* _ASM_PAGE_H */
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