[deliverable/linux.git] / include / asm-powerpc / oprofile_impl.h

/*
 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * Based on alpha version.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
#define _ASM_POWERPC_OPROFILE_IMPL_H

#define OP_MAX_COUNTER 8

/* Per-counter configuration as set via oprofilefs.  */
struct op_counter_config {
#ifdef __powerpc64__
	unsigned long valid;
#endif
	unsigned long enabled;
	unsigned long event;
	unsigned long count;
	/* Classic doesn't support per-counter user/kernel selection */
	unsigned long kernel;
	unsigned long user;
	unsigned long unit_mask;
};

/* System-wide configuration as set via oprofilefs.  */
struct op_system_config {
#ifdef CONFIG_PPC64
	unsigned long mmcr0;
	unsigned long mmcr1;
	unsigned long mmcra;
#endif
	unsigned long enable_kernel;
	unsigned long enable_user;
#ifdef CONFIG_PPC64
	unsigned long backtrace_spinlocks;
#endif
};

/* Per-arch configuration */
struct op_powerpc_model {
	void (*reg_setup) (struct op_counter_config *,
			   struct op_system_config *,
			   int num_counters);
	void (*cpu_setup) (void *);
	void (*start) (struct op_counter_config *);
	void (*stop) (void);
	void (*handle_interrupt) (struct pt_regs *,
				  struct op_counter_config *);
	int num_counters;
};

#ifdef CONFIG_FSL_BOOKE
extern struct op_powerpc_model op_model_fsl_booke;
#else /* Otherwise, it's classic */

#ifdef CONFIG_PPC64
extern struct op_powerpc_model op_model_rs64;
extern struct op_powerpc_model op_model_power4;

#else /* Otherwise, CONFIG_PPC32 */
extern struct op_powerpc_model op_model_7450;
#endif

/* All the classic PPC parts use these */
static inline unsigned int ctr_read(unsigned int i)
{
	switch(i) {
	case 0:
		return mfspr(SPRN_PMC1);
	case 1:
		return mfspr(SPRN_PMC2);
	case 2:
		return mfspr(SPRN_PMC3);
	case 3:
		return mfspr(SPRN_PMC4);
	case 4:
		return mfspr(SPRN_PMC5);
	case 5:
		return mfspr(SPRN_PMC6);

/* No PPC32 chip has more than 6 so far */
#ifdef CONFIG_PPC64
	case 6:
		return mfspr(SPRN_PMC7);
	case 7:
		return mfspr(SPRN_PMC8);
#endif
	default:
		return 0;
	}
}

static inline void ctr_write(unsigned int i, unsigned int val)
{
	switch(i) {
	case 0:
		mtspr(SPRN_PMC1, val);
		break;
	case 1:
		mtspr(SPRN_PMC2, val);
		break;
	case 2:
		mtspr(SPRN_PMC3, val);
		break;
	case 3:
		mtspr(SPRN_PMC4, val);
		break;
	case 4:
		mtspr(SPRN_PMC5, val);
		break;
	case 5:
		mtspr(SPRN_PMC6, val);
		break;

/* No PPC32 chip has more than 6, yet */
#ifdef CONFIG_PPC64
	case 6:
		mtspr(SPRN_PMC7, val);
		break;
	case 7:
		mtspr(SPRN_PMC8, val);
		break;
#endif
	default:
		break;
	}
}
#endif /* !CONFIG_FSL_BOOKE */

#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
	3	*
	4	* Based on alpha version.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
654810ec SR	12	#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
654810ec SR	13	#define _ASM_POWERPC_OPROFILE_IMPL_H
1da177e4 LT	14
	15	#define OP_MAX_COUNTER 8
	16
	17	/* Per-counter configuration as set via oprofilefs. */
	18	struct op_counter_config {
654810ec	19	#ifdef __powerpc64__
1da177e4	20	unsigned long valid;
654810ec	21	#endif
1da177e4 LT	22	unsigned long enabled;
	23	unsigned long event;
	24	unsigned long count;
555d97ac	25	/* Classic doesn't support per-counter user/kernel selection */
1da177e4	26	unsigned long kernel;
1da177e4 LT	27	unsigned long user;
	28	unsigned long unit_mask;
	29	};
	30
	31	/* System-wide configuration as set via oprofilefs. */
	32	struct op_system_config {
555d97ac	33	#ifdef CONFIG_PPC64
1da177e4 LT	34	unsigned long mmcr0;
	35	unsigned long mmcr1;
	36	unsigned long mmcra;
654810ec	37	#endif
1da177e4 LT	38	unsigned long enable_kernel;
1da177e4 LT	39	unsigned long enable_user;
555d97ac	40	#ifdef CONFIG_PPC64
1da177e4	41	unsigned long backtrace_spinlocks;
654810ec	42	#endif
1da177e4 LT	43	};
	44
	45	/* Per-arch configuration */
a3e48c10	46	struct op_powerpc_model {
1da177e4 LT	47	void (reg_setup) (struct op_counter_config ,
	48	struct op_system_config *,
	49	int num_counters);
	50	void (cpu_setup) (void );
	51	void (start) (struct op_counter_config );
	52	void (*stop) (void);
	53	void (handle_interrupt) (struct pt_regs ,
	54	struct op_counter_config *);
	55	int num_counters;
	56	};
	57
555d97ac AF	58	#ifdef CONFIG_FSL_BOOKE
	59	extern struct op_powerpc_model op_model_fsl_booke;
	60	#else /* Otherwise, it's classic */
	61
	62	#ifdef CONFIG_PPC64
a3e48c10 SR	63	extern struct op_powerpc_model op_model_rs64;
a3e48c10 SR	64	extern struct op_powerpc_model op_model_power4;
dca85932	65
555d97ac AF	66	#else /* Otherwise, CONFIG_PPC32 */
	67	extern struct op_powerpc_model op_model_7450;
	68	#endif
	69
	70	/* All the classic PPC parts use these */
1da177e4 LT	71	static inline unsigned int ctr_read(unsigned int i)
	72	{
	73	switch(i) {
	74	case 0:
	75	return mfspr(SPRN_PMC1);
	76	case 1:
	77	return mfspr(SPRN_PMC2);
	78	case 2:
	79	return mfspr(SPRN_PMC3);
	80	case 3:
	81	return mfspr(SPRN_PMC4);
	82	case 4:
	83	return mfspr(SPRN_PMC5);
	84	case 5:
	85	return mfspr(SPRN_PMC6);
555d97ac AF	86
	87	/* No PPC32 chip has more than 6 so far */
	88	#ifdef CONFIG_PPC64
1da177e4 LT	89	case 6:
	90	return mfspr(SPRN_PMC7);
	91	case 7:
	92	return mfspr(SPRN_PMC8);
555d97ac	93	#endif
1da177e4 LT	94	default:
	95	return 0;
	96	}
	97	}
	98
	99	static inline void ctr_write(unsigned int i, unsigned int val)
	100	{
	101	switch(i) {
	102	case 0:
	103	mtspr(SPRN_PMC1, val);
	104	break;
	105	case 1:
	106	mtspr(SPRN_PMC2, val);
	107	break;
	108	case 2:
	109	mtspr(SPRN_PMC3, val);
	110	break;
	111	case 3:
	112	mtspr(SPRN_PMC4, val);
	113	break;
	114	case 4:
	115	mtspr(SPRN_PMC5, val);
	116	break;
	117	case 5:
	118	mtspr(SPRN_PMC6, val);
	119	break;
555d97ac AF	120
	121	/* No PPC32 chip has more than 6, yet */
	122	#ifdef CONFIG_PPC64
1da177e4 LT	123	case 6:
	124	mtspr(SPRN_PMC7, val);
	125	break;
	126	case 7:
	127	mtspr(SPRN_PMC8, val);
	128	break;
555d97ac	129	#endif
1da177e4 LT	130	default:
	131	break;
	132	}
	133	}
555d97ac	134	#endif /* !CONFIG_FSL_BOOKE */
1da177e4	135
654810ec	136	#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */