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1 | /* |
2 | * include/asm-s390/etr.h | |
3 | * | |
4 | * Copyright IBM Corp. 2006 | |
5 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) | |
6 | */ | |
7 | #ifndef __S390_ETR_H | |
8 | #define __S390_ETR_H | |
9 | ||
10 | /* ETR attachment control register */ | |
11 | struct etr_eacr { | |
12 | unsigned int e0 : 1; /* port 0 stepping control */ | |
13 | unsigned int e1 : 1; /* port 1 stepping control */ | |
14 | unsigned int _pad0 : 5; /* must be 00100 */ | |
15 | unsigned int dp : 1; /* data port control */ | |
16 | unsigned int p0 : 1; /* port 0 change recognition control */ | |
17 | unsigned int p1 : 1; /* port 1 change recognition control */ | |
18 | unsigned int _pad1 : 3; /* must be 000 */ | |
19 | unsigned int ea : 1; /* ETR alert control */ | |
20 | unsigned int es : 1; /* ETR sync check control */ | |
21 | unsigned int sl : 1; /* switch to local control */ | |
22 | } __attribute__ ((packed)); | |
23 | ||
24 | /* Port state returned by steai */ | |
25 | enum etr_psc { | |
26 | etr_psc_operational = 0, | |
27 | etr_psc_semi_operational = 1, | |
28 | etr_psc_protocol_error = 4, | |
29 | etr_psc_no_symbols = 8, | |
30 | etr_psc_no_signal = 12, | |
31 | etr_psc_pps_mode = 13 | |
32 | }; | |
33 | ||
34 | /* Logical port state returned by stetr */ | |
35 | enum etr_lpsc { | |
36 | etr_lpsc_operational_step = 0, | |
37 | etr_lpsc_operational_alt = 1, | |
38 | etr_lpsc_semi_operational = 2, | |
39 | etr_lpsc_protocol_error = 4, | |
40 | etr_lpsc_no_symbol_sync = 8, | |
41 | etr_lpsc_no_signal = 12, | |
42 | etr_lpsc_pps_mode = 13 | |
43 | }; | |
44 | ||
45 | /* ETR status words */ | |
46 | struct etr_esw { | |
47 | struct etr_eacr eacr; /* attachment control register */ | |
48 | unsigned int y : 1; /* stepping mode */ | |
49 | unsigned int _pad0 : 5; /* must be 00000 */ | |
50 | unsigned int p : 1; /* stepping port number */ | |
51 | unsigned int q : 1; /* data port number */ | |
52 | unsigned int psc0 : 4; /* port 0 state code */ | |
53 | unsigned int psc1 : 4; /* port 1 state code */ | |
54 | } __attribute__ ((packed)); | |
55 | ||
56 | /* Second level data register status word */ | |
57 | struct etr_slsw { | |
58 | unsigned int vv1 : 1; /* copy of validity bit data frame 1 */ | |
59 | unsigned int vv2 : 1; /* copy of validity bit data frame 2 */ | |
60 | unsigned int vv3 : 1; /* copy of validity bit data frame 3 */ | |
61 | unsigned int vv4 : 1; /* copy of validity bit data frame 4 */ | |
62 | unsigned int _pad0 : 19; /* must by all zeroes */ | |
63 | unsigned int n : 1; /* EAF port number */ | |
64 | unsigned int v1 : 1; /* validity bit ETR data frame 1 */ | |
65 | unsigned int v2 : 1; /* validity bit ETR data frame 2 */ | |
66 | unsigned int v3 : 1; /* validity bit ETR data frame 3 */ | |
67 | unsigned int v4 : 1; /* validity bit ETR data frame 4 */ | |
68 | unsigned int _pad1 : 4; /* must be 0000 */ | |
69 | } __attribute__ ((packed)); | |
70 | ||
71 | /* ETR data frames */ | |
72 | struct etr_edf1 { | |
73 | unsigned int u : 1; /* untuned bit */ | |
74 | unsigned int _pad0 : 1; /* must be 0 */ | |
75 | unsigned int r : 1; /* service request bit */ | |
76 | unsigned int _pad1 : 4; /* must be 0000 */ | |
77 | unsigned int a : 1; /* time adjustment bit */ | |
78 | unsigned int net_id : 8; /* ETR network id */ | |
79 | unsigned int etr_id : 8; /* id of ETR which sends data frames */ | |
80 | unsigned int etr_pn : 8; /* port number of ETR output port */ | |
81 | } __attribute__ ((packed)); | |
82 | ||
83 | struct etr_edf2 { | |
84 | unsigned int etv : 32; /* Upper 32 bits of TOD. */ | |
85 | } __attribute__ ((packed)); | |
86 | ||
87 | struct etr_edf3 { | |
88 | unsigned int rc : 8; /* failure reason code */ | |
89 | unsigned int _pad0 : 3; /* must be 000 */ | |
90 | unsigned int c : 1; /* ETR coupled bit */ | |
91 | unsigned int tc : 4; /* ETR type code */ | |
92 | unsigned int blto : 8; /* biased local time offset */ | |
93 | /* (blto - 128) * 15 = minutes */ | |
94 | unsigned int buo : 8; /* biased utc offset */ | |
95 | /* (buo - 128) = leap seconds */ | |
96 | } __attribute__ ((packed)); | |
97 | ||
98 | struct etr_edf4 { | |
99 | unsigned int ed : 8; /* ETS device dependent data */ | |
100 | unsigned int _pad0 : 1; /* must be 0 */ | |
101 | unsigned int buc : 5; /* biased ut1 correction */ | |
102 | /* (buc - 16) * 0.1 seconds */ | |
103 | unsigned int em : 6; /* ETS error magnitude */ | |
104 | unsigned int dc : 6; /* ETS drift code */ | |
105 | unsigned int sc : 6; /* ETS steering code */ | |
106 | } __attribute__ ((packed)); | |
107 | ||
108 | /* | |
109 | * ETR attachment information block, two formats | |
110 | * format 1 has 4 reserved words with a size of 64 bytes | |
111 | * format 2 has 16 reserved words with a size of 96 bytes | |
112 | */ | |
113 | struct etr_aib { | |
114 | struct etr_esw esw; | |
115 | struct etr_slsw slsw; | |
116 | unsigned long long tsp; | |
117 | struct etr_edf1 edf1; | |
118 | struct etr_edf2 edf2; | |
119 | struct etr_edf3 edf3; | |
120 | struct etr_edf4 edf4; | |
121 | unsigned int reserved[16]; | |
122 | } __attribute__ ((packed,aligned(8))); | |
123 | ||
124 | /* ETR interruption parameter */ | |
125 | struct etr_interruption_parameter { | |
126 | unsigned int _pad0 : 8; | |
127 | unsigned int pc0 : 1; /* port 0 state change */ | |
128 | unsigned int pc1 : 1; /* port 1 state change */ | |
129 | unsigned int _pad1 : 3; | |
130 | unsigned int eai : 1; /* ETR alert indication */ | |
131 | unsigned int _pad2 : 18; | |
132 | } __attribute__ ((packed)); | |
133 | ||
134 | /* Query TOD offset result */ | |
135 | struct etr_ptff_qto { | |
136 | unsigned long long physical_clock; | |
137 | unsigned long long tod_offset; | |
138 | unsigned long long logical_tod_offset; | |
139 | unsigned long long tod_epoch_difference; | |
140 | } __attribute__ ((packed)); | |
141 | ||
142 | /* Inline assembly helper functions */ | |
143 | static inline int etr_setr(struct etr_eacr *ctrl) | |
144 | { | |
145 | int rc = -ENOSYS; | |
146 | ||
147 | asm volatile( | |
148 | " .insn s,0xb2160000,0(%2)\n" | |
149 | "0: la %0,0\n" | |
150 | "1:\n" | |
151 | EX_TABLE(0b,1b) | |
152 | : "+d" (rc) : "m" (*ctrl), "a" (ctrl)); | |
153 | return rc; | |
154 | } | |
155 | ||
156 | /* Stores a format 1 aib with 64 bytes */ | |
157 | static inline int etr_stetr(struct etr_aib *aib) | |
158 | { | |
159 | int rc = -ENOSYS; | |
160 | ||
161 | asm volatile( | |
162 | " .insn s,0xb2170000,0(%2)\n" | |
163 | "0: la %0,0\n" | |
164 | "1:\n" | |
165 | EX_TABLE(0b,1b) | |
166 | : "+d" (rc) : "m" (*aib), "a" (aib)); | |
167 | return rc; | |
168 | } | |
169 | ||
170 | /* Stores a format 2 aib with 96 bytes for specified port */ | |
171 | static inline int etr_steai(struct etr_aib *aib, unsigned int func) | |
172 | { | |
173 | register unsigned int reg0 asm("0") = func; | |
174 | int rc = -ENOSYS; | |
175 | ||
176 | asm volatile( | |
177 | " .insn s,0xb2b30000,0(%2)\n" | |
178 | "0: la %0,0\n" | |
179 | "1:\n" | |
180 | EX_TABLE(0b,1b) | |
181 | : "+d" (rc) : "m" (*aib), "a" (aib), "d" (reg0)); | |
182 | return rc; | |
183 | } | |
184 | ||
185 | /* Function codes for the steai instruction. */ | |
186 | #define ETR_STEAI_STEPPING_PORT 0x10 | |
187 | #define ETR_STEAI_ALTERNATE_PORT 0x11 | |
188 | #define ETR_STEAI_PORT_0 0x12 | |
189 | #define ETR_STEAI_PORT_1 0x13 | |
190 | ||
191 | static inline int etr_ptff(void *ptff_block, unsigned int func) | |
192 | { | |
193 | register unsigned int reg0 asm("0") = func; | |
194 | register unsigned long reg1 asm("1") = (unsigned long) ptff_block; | |
195 | int rc = -ENOSYS; | |
196 | ||
197 | asm volatile( | |
198 | " .word 0x0104\n" | |
199 | " ipm %0\n" | |
200 | " srl %0,28\n" | |
201 | : "=d" (rc), "=m" (ptff_block) | |
202 | : "d" (reg0), "d" (reg1), "m" (ptff_block) : "cc"); | |
203 | return rc; | |
204 | } | |
205 | ||
206 | /* Function codes for the ptff instruction. */ | |
207 | #define ETR_PTFF_QAF 0x00 /* query available functions */ | |
208 | #define ETR_PTFF_QTO 0x01 /* query tod offset */ | |
209 | #define ETR_PTFF_QSI 0x02 /* query steering information */ | |
210 | #define ETR_PTFF_ATO 0x40 /* adjust tod offset */ | |
211 | #define ETR_PTFF_STO 0x41 /* set tod offset */ | |
212 | #define ETR_PTFF_SFS 0x42 /* set fine steering rate */ | |
213 | #define ETR_PTFF_SGS 0x43 /* set gross steering rate */ | |
214 | ||
215 | /* Functions needed by the machine check handler */ | |
216 | extern void etr_switch_to_local(void); | |
217 | extern void etr_sync_check(void); | |
218 | ||
219 | #endif /* __S390_ETR_H */ |