projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Rework ptep_set_access_flags and fix sun4c
[deliverable/linux.git] / include / asm-s390 / pgtable.h
CommitLineData
1da177e4
LT		 1/*
2 * include/asm-s390/pgtable.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 *
10 * Derived from "include/asm-i386/pgtable.h"
11 */
12
13#ifndef _ASM_S390_PGTABLE_H
14#define _ASM_S390_PGTABLE_H
15
16#include <asm-generic/4level-fixup.h>
17
18/*
19 * The Linux memory management assumes a three-level page table setup. For
20 * s390 31 bit we "fold" the mid level into the top-level page table, so
21 * that we physically have the same two-level page table as the s390 mmu
22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
23 * the hardware provides (region first and region second tables are not
24 * used).
25 *
26 * The "pgd_xxx()" functions are trivial for a folded two-level
27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * into the pgd entry)
29 *
30 * This file contains the functions and defines necessary to modify and use
31 * the S390 page table tree.
32 */
33#ifndef __ASSEMBLY__
2dcea57a 34#include <linux/mm_types.h>
1da177e4
LT		 35#include <asm/bug.h>
36#include <asm/processor.h>
1da177e4
LT		 37
38struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
8c65b4a6 39struct mm_struct;
1da177e4
LT		 40
41extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
42extern void paging_init(void);
2b67fc46 43extern void vmem_map_init(void);
1da177e4
LT		 44
45/*
46 * The S390 doesn't have any external MMU info: the kernel page
47 * tables contain all the necessary information.
48 */
49#define update_mmu_cache(vma, address, pte) do { } while (0)
50
51/*
52 * ZERO_PAGE is a global shared page that is always zero: used
53 * for zero-mapped memory areas etc..
54 */
55extern char empty_zero_page[PAGE_SIZE];
56#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
57#endif /* !__ASSEMBLY__ */
58
59/*
60 * PMD_SHIFT determines the size of the area a second-level page
61 * table can map
62 * PGDIR_SHIFT determines what a third-level page table entry can map
63 */
64#ifndef __s390x__
65# define PMD_SHIFT 22
66# define PGDIR_SHIFT 22
67#else /* __s390x__ */
68# define PMD_SHIFT 21
69# define PGDIR_SHIFT 31
70#endif /* __s390x__ */
71
72#define PMD_SIZE (1UL << PMD_SHIFT)
73#define PMD_MASK (~(PMD_SIZE-1))
74#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
75#define PGDIR_MASK (~(PGDIR_SIZE-1))
76
77/*
78 * entries per page directory level: the S390 is two-level, so
79 * we don't really have any PMD directory physically.
80 * for S390 segment-table entries are combined to one PGD
81 * that leads to 1024 pte per pgd
82 */
83#ifndef __s390x__
84# define PTRS_PER_PTE 1024
85# define PTRS_PER_PMD 1
86# define PTRS_PER_PGD 512
87#else /* __s390x__ */
88# define PTRS_PER_PTE 512
89# define PTRS_PER_PMD 1024
90# define PTRS_PER_PGD 2048
91#endif /* __s390x__ */
92
d455a369
HD		 93#define FIRST_USER_ADDRESS 0
94
1da177e4
LT		 95#define pte_ERROR(e) \
96 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
97#define pmd_ERROR(e) \
98 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
99#define pgd_ERROR(e) \
100 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
101
102#ifndef __ASSEMBLY__
103/*
104 * Just any arbitrary offset to the start of the vmalloc VM area: the
105 * current 8MB value just means that there will be a 8MB "hole" after the
106 * physical memory until the kernel virtual memory starts. That means that
107 * any out-of-bounds memory accesses will hopefully be caught.
108 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
109 * area for the same reason. ;)
110 */
f4eb07c1 111extern unsigned long vmalloc_end;
1da177e4
LT		 112#define VMALLOC_OFFSET (8*1024*1024)
113#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \
114 & ~(VMALLOC_OFFSET-1))
f4eb07c1 115#define VMALLOC_END vmalloc_end
8b62bc96
HC		 116
117/*
118 * We need some free virtual space to be able to do vmalloc.
119 * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc
120 * area. On a machine with 2GB memory we make sure that we
121 * have at least 128MB free space for vmalloc. On a machine
f4eb07c1 122 * with 4TB we make sure we have at least 128GB.
8b62bc96 123 */
1da177e4 124#ifndef __s390x__
8b62bc96 125#define VMALLOC_MIN_SIZE 0x8000000UL
f4eb07c1 126#define VMALLOC_END_INIT 0x80000000UL
1da177e4 127#else /* __s390x__ */
f4eb07c1
HC		 128#define VMALLOC_MIN_SIZE 0x2000000000UL
129#define VMALLOC_END_INIT 0x40000000000UL
1da177e4
LT		 130#endif /* __s390x__ */
131
1da177e4
LT		 132/*
133 * A 31 bit pagetable entry of S390 has following format:
134 * | PFRA | | OS |
135 * 0 0IP0
136 * 00000000001111111111222222222233
137 * 01234567890123456789012345678901
138 *
139 * I Page-Invalid Bit: Page is not available for address-translation
140 * P Page-Protection Bit: Store access not possible for page
141 *
142 * A 31 bit segmenttable entry of S390 has following format:
143 * | P-table origin | |PTL
144 * 0 IC
145 * 00000000001111111111222222222233
146 * 01234567890123456789012345678901
147 *
148 * I Segment-Invalid Bit: Segment is not available for address-translation
149 * C Common-Segment Bit: Segment is not private (PoP 3-30)
150 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
151 *
152 * The 31 bit segmenttable origin of S390 has following format:
153 *
154 * |S-table origin | | STL |
155 * X **GPS
156 * 00000000001111111111222222222233
157 * 01234567890123456789012345678901
158 *
159 * X Space-Switch event:
160 * G Segment-Invalid Bit: *
161 * P Private-Space Bit: Segment is not private (PoP 3-30)
162 * S Storage-Alteration:
163 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
164 *
165 * A 64 bit pagetable entry of S390 has following format:
166 * | PFRA |0IP0| OS |
167 * 0000000000111111111122222222223333333333444444444455555555556666
168 * 0123456789012345678901234567890123456789012345678901234567890123
169 *
170 * I Page-Invalid Bit: Page is not available for address-translation
171 * P Page-Protection Bit: Store access not possible for page
172 *
173 * A 64 bit segmenttable entry of S390 has following format:
174 * | P-table origin | TT
175 * 0000000000111111111122222222223333333333444444444455555555556666
176 * 0123456789012345678901234567890123456789012345678901234567890123
177 *
178 * I Segment-Invalid Bit: Segment is not available for address-translation
179 * C Common-Segment Bit: Segment is not private (PoP 3-30)
180 * P Page-Protection Bit: Store access not possible for page
181 * TT Type 00
182 *
183 * A 64 bit region table entry of S390 has following format:
184 * | S-table origin | TF TTTL
185 * 0000000000111111111122222222223333333333444444444455555555556666
186 * 0123456789012345678901234567890123456789012345678901234567890123
187 *
188 * I Segment-Invalid Bit: Segment is not available for address-translation
189 * TT Type 01
190 * TF
191 * TL Table lenght
192 *
193 * The 64 bit regiontable origin of S390 has following format:
194 * | region table origon | DTTL
195 * 0000000000111111111122222222223333333333444444444455555555556666
196 * 0123456789012345678901234567890123456789012345678901234567890123
197 *
198 * X Space-Switch event:
199 * G Segment-Invalid Bit:
200 * P Private-Space Bit:
201 * S Storage-Alteration:
202 * R Real space
203 * TL Table-Length:
204 *
205 * A storage key has the following format:
206 * | ACC |F|R|C|0|
207 * 0 3 4 5 6 7
208 * ACC: access key
209 * F : fetch protection bit
210 * R : referenced bit
211 * C : changed bit
212 */
213
214/* Hardware bits in the page table entry */
83377484
MS		 215#define _PAGE_RO 0x200 /* HW read-only bit */
216#define _PAGE_INVALID 0x400 /* HW invalid bit */
217#define _PAGE_SWT 0x001 /* SW pte type bit t */
218#define _PAGE_SWX 0x002 /* SW pte type bit x */
1da177e4 219
83377484 220/* Six different types of pages. */
9282ed92
GS		 221#define _PAGE_TYPE_EMPTY 0x400
222#define _PAGE_TYPE_NONE 0x401
83377484
MS		 223#define _PAGE_TYPE_SWAP 0x403
224#define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
9282ed92
GS		 225#define _PAGE_TYPE_RO 0x200
226#define _PAGE_TYPE_RW 0x000
c1821c2e
GS		 227#define _PAGE_TYPE_EX_RO 0x202
228#define _PAGE_TYPE_EX_RW 0x002
1da177e4 229
83377484
MS		 230/*
231 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
232 * pte_none and pte_file to find out the pte type WITHOUT holding the page
233 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
234 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
235 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
236 * This change is done while holding the lock, but the intermediate step
237 * of a previously valid pte with the hw invalid bit set can be observed by
238 * handle_pte_fault. That makes it necessary that all valid pte types with
239 * the hw invalid bit set must be distinguishable from the four pte types
240 * empty, none, swap and file.
241 *
242 * irxt ipte irxt
243 * _PAGE_TYPE_EMPTY 1000 -> 1000
244 * _PAGE_TYPE_NONE 1001 -> 1001
245 * _PAGE_TYPE_SWAP 1011 -> 1011
246 * _PAGE_TYPE_FILE 11?1 -> 11?1
247 * _PAGE_TYPE_RO 0100 -> 1100
248 * _PAGE_TYPE_RW 0000 -> 1000
c1821c2e
GS		 249 * _PAGE_TYPE_EX_RO 0110 -> 1110
250 * _PAGE_TYPE_EX_RW 0010 -> 1010
83377484 251 *
c1821c2e 252 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
83377484
MS		 253 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
254 * pte_file is true for bits combinations 1101, 1111
c1821c2e 255 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
83377484
MS		 256 */
257
1da177e4
LT		 258#ifndef __s390x__
259
260/* Bits in the segment table entry */
261#define _PAGE_TABLE_LEN 0xf /* only full page-tables */
262#define _PAGE_TABLE_COM 0x10 /* common page-table */
263#define _PAGE_TABLE_INV 0x20 /* invalid page-table */
264#define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
265
266/* Bits int the storage key */
267#define _PAGE_CHANGED 0x02 /* HW changed bit */
268#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
269
270#define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
271#define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
272
273/*
274 * User and Kernel pagetables are identical
275 */
276#define _PAGE_TABLE _PAGE_TABLE_LEN
277#define _KERNPG_TABLE _PAGE_TABLE_LEN
278
279/*
280 * The Kernel segment-tables includes the User segment-table
281 */
282
283#define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
284#define _KERNSEG_TABLE _KERNEL_SEG_TABLE_LEN
285
286#define USER_STD_MASK 0x00000080UL
287
288#else /* __s390x__ */
289
290/* Bits in the segment table entry */
291#define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */
292#define _PMD_ENTRY 0x00
293
294/* Bits in the region third table entry */
295#define _PGD_ENTRY_INV 0x20 /* invalid region table entry */
296#define _PGD_ENTRY 0x07
297
298/*
299 * User and kernel page directory
300 */
301#define _REGION_THIRD 0x4
302#define _REGION_THIRD_LEN 0x3
303#define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
304#define _KERN_REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN)
305
306#define USER_STD_MASK 0x0000000000000080UL
307
308/* Bits in the storage key */
309#define _PAGE_CHANGED 0x02 /* HW changed bit */
310#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
311
312#endif /* __s390x__ */
313
314/*
9282ed92 315 * Page protection definitions.
1da177e4 316 */
9282ed92
GS		 317#define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
318#define PAGE_RO __pgprot(_PAGE_TYPE_RO)
319#define PAGE_RW __pgprot(_PAGE_TYPE_RW)
c1821c2e
GS		 320#define PAGE_EX_RO __pgprot(_PAGE_TYPE_EX_RO)
321#define PAGE_EX_RW __pgprot(_PAGE_TYPE_EX_RW)
9282ed92
GS		 322
323#define PAGE_KERNEL PAGE_RW
324#define PAGE_COPY PAGE_RO
1da177e4
LT		 325
326/*
c1821c2e
GS		 327 * Dependent on the EXEC_PROTECT option s390 can do execute protection.
328 * Write permission always implies read permission. In theory with a
329 * primary/secondary page table execute only can be implemented but
330 * it would cost an additional bit in the pte to distinguish all the
331 * different pte types. To avoid that execute permission currently
332 * implies read permission as well.
1da177e4
LT		 333 */
334 /*xwr*/
9282ed92
GS		 335#define __P000 PAGE_NONE
336#define __P001 PAGE_RO
337#define __P010 PAGE_RO
338#define __P011 PAGE_RO
c1821c2e
GS		 339#define __P100 PAGE_EX_RO
340#define __P101 PAGE_EX_RO
341#define __P110 PAGE_EX_RO
342#define __P111 PAGE_EX_RO
9282ed92
GS		 343
344#define __S000 PAGE_NONE
345#define __S001 PAGE_RO
346#define __S010 PAGE_RW
347#define __S011 PAGE_RW
c1821c2e
GS		 348#define __S100 PAGE_EX_RO
349#define __S101 PAGE_EX_RO
350#define __S110 PAGE_EX_RW
351#define __S111 PAGE_EX_RW
352
353#ifndef __s390x__
354# define PMD_SHADOW_SHIFT 1
355# define PGD_SHADOW_SHIFT 1
356#else /* __s390x__ */
357# define PMD_SHADOW_SHIFT 2
358# define PGD_SHADOW_SHIFT 2
359#endif /* __s390x__ */
360
361static inline struct page *get_shadow_page(struct page *page)
362{
363 if (s390_noexec && !list_empty(&page->lru))
364 return virt_to_page(page->lru.next);
365 return NULL;
366}
367
368static inline pte_t *get_shadow_pte(pte_t *ptep)
369{
370 unsigned long pteptr = (unsigned long) (ptep);
371
372 if (s390_noexec) {
373 unsigned long offset = pteptr & (PAGE_SIZE - 1);
374 void *addr = (void *) (pteptr ^ offset);
375 struct page *page = virt_to_page(addr);
376 if (!list_empty(&page->lru))
377 return (pte_t *) ((unsigned long) page->lru.next |
378 offset);
379 }
380 return NULL;
381}
382
383static inline pmd_t *get_shadow_pmd(pmd_t *pmdp)
384{
385 unsigned long pmdptr = (unsigned long) (pmdp);
386
387 if (s390_noexec) {
388 unsigned long offset = pmdptr &
389 ((PAGE_SIZE << PMD_SHADOW_SHIFT) - 1);
390 void *addr = (void *) (pmdptr ^ offset);
391 struct page *page = virt_to_page(addr);
392 if (!list_empty(&page->lru))
393 return (pmd_t *) ((unsigned long) page->lru.next |
394 offset);
395 }
396 return NULL;
397}
398
399static inline pgd_t *get_shadow_pgd(pgd_t *pgdp)
400{
401 unsigned long pgdptr = (unsigned long) (pgdp);
402
403 if (s390_noexec) {
404 unsigned long offset = pgdptr &
405 ((PAGE_SIZE << PGD_SHADOW_SHIFT) - 1);
406 void *addr = (void *) (pgdptr ^ offset);
407 struct page *page = virt_to_page(addr);
408 if (!list_empty(&page->lru))
409 return (pgd_t *) ((unsigned long) page->lru.next |
410 offset);
411 }
412 return NULL;
413}
1da177e4
LT		 414
415/*
416 * Certain architectures need to do special things when PTEs
417 * within a page table are directly modified. Thus, the following
418 * hook is made available.
419 */
4448aaf0 420static inline void set_pte(pte_t *pteptr, pte_t pteval)
1da177e4 421{
c1821c2e
GS		 422 pte_t *shadow_pte = get_shadow_pte(pteptr);
423
1da177e4 424 *pteptr = pteval;
c1821c2e
GS		 425 if (shadow_pte) {
426 if (!(pte_val(pteval) & _PAGE_INVALID) &&
427 (pte_val(pteval) & _PAGE_SWX))
428 pte_val(*shadow_pte) = pte_val(pteval) | _PAGE_RO;
429 else
430 pte_val(*shadow_pte) = _PAGE_TYPE_EMPTY;
431 }
1da177e4
LT		 432}
433#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
434
435/*
436 * pgd/pmd/pte query functions
437 */
438#ifndef __s390x__
439
4448aaf0
AB		 440static inline int pgd_present(pgd_t pgd) { return 1; }
441static inline int pgd_none(pgd_t pgd) { return 0; }
442static inline int pgd_bad(pgd_t pgd) { return 0; }
1da177e4 443
4448aaf0
AB		 444static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
445static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
446static inline int pmd_bad(pmd_t pmd)
1da177e4
LT		 447{
448 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
449}
450
451#else /* __s390x__ */
452
4448aaf0 453static inline int pgd_present(pgd_t pgd)
1da177e4
LT		 454{
455 return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
456}
457
4448aaf0 458static inline int pgd_none(pgd_t pgd)
1da177e4
LT		 459{
460 return pgd_val(pgd) & _PGD_ENTRY_INV;
461}
462
4448aaf0 463static inline int pgd_bad(pgd_t pgd)
1da177e4
LT		 464{
465 return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
466}
467
4448aaf0 468static inline int pmd_present(pmd_t pmd)
1da177e4
LT		 469{
470 return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
471}
472
4448aaf0 473static inline int pmd_none(pmd_t pmd)
1da177e4
LT		 474{
475 return pmd_val(pmd) & _PMD_ENTRY_INV;
476}
477
4448aaf0 478static inline int pmd_bad(pmd_t pmd)
1da177e4
LT		 479{
480 return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
481}
482
483#endif /* __s390x__ */
484
4448aaf0 485static inline int pte_none(pte_t pte)
1da177e4 486{
83377484 487 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
1da177e4
LT		 488}
489
4448aaf0 490static inline int pte_present(pte_t pte)
1da177e4 491{
83377484
MS		 492 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
493 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
494 (!(pte_val(pte) & _PAGE_INVALID) &&
495 !(pte_val(pte) & _PAGE_SWT));
1da177e4
LT		 496}
497
4448aaf0 498static inline int pte_file(pte_t pte)
1da177e4 499{
83377484
MS		 500 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
501 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
1da177e4
LT		 502}
503
504#define pte_same(a,b) (pte_val(a) == pte_val(b))
505
506/*
507 * query functions pte_write/pte_dirty/pte_young only work if
508 * pte_present() is true. Undefined behaviour if not..
509 */
4448aaf0 510static inline int pte_write(pte_t pte)
1da177e4
LT		 511{
512 return (pte_val(pte) & _PAGE_RO) == 0;
513}
514
4448aaf0 515static inline int pte_dirty(pte_t pte)
1da177e4
LT		 516{
517 /* A pte is neither clean nor dirty on s/390. The dirty bit
518 * is in the storage key. See page_test_and_clear_dirty for
519 * details.
520 */
521 return 0;
522}
523
4448aaf0 524static inline int pte_young(pte_t pte)
1da177e4
LT		 525{
526 /* A pte is neither young nor old on s/390. The young bit
527 * is in the storage key. See page_test_and_clear_young for
528 * details.
529 */
530 return 0;
531}
532
4448aaf0 533static inline int pte_read(pte_t pte)
1da177e4
LT		 534{
535 /* All pages are readable since we don't use the fetch
536 * protection bit in the storage key.
537 */
538 return 1;
539}
540
541/*
542 * pgd/pmd/pte modification functions
543 */
544
545#ifndef __s390x__
546
4448aaf0 547static inline void pgd_clear(pgd_t * pgdp) { }
1da177e4 548
c1821c2e 549static inline void pmd_clear_kernel(pmd_t * pmdp)
1da177e4
LT		 550{
551 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
552 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
553 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
554 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
555}
556
c1821c2e
GS		 557static inline void pmd_clear(pmd_t * pmdp)
558{
559 pmd_t *shadow_pmd = get_shadow_pmd(pmdp);
560
561 pmd_clear_kernel(pmdp);
562 if (shadow_pmd)
563 pmd_clear_kernel(shadow_pmd);
564}
565
1da177e4
LT		 566#else /* __s390x__ */
567
c1821c2e 568static inline void pgd_clear_kernel(pgd_t * pgdp)
1da177e4
LT		 569{
570 pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
571}
572
c1821c2e
GS		 573static inline void pgd_clear(pgd_t * pgdp)
574{
575 pgd_t *shadow_pgd = get_shadow_pgd(pgdp);
576
577 pgd_clear_kernel(pgdp);
578 if (shadow_pgd)
579 pgd_clear_kernel(shadow_pgd);
580}
581
582static inline void pmd_clear_kernel(pmd_t * pmdp)
1da177e4
LT		 583{
584 pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
585 pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
586}
587
c1821c2e
GS		 588static inline void pmd_clear(pmd_t * pmdp)
589{
590 pmd_t *shadow_pmd = get_shadow_pmd(pmdp);
591
592 pmd_clear_kernel(pmdp);
593 if (shadow_pmd)
594 pmd_clear_kernel(shadow_pmd);
595}
596
1da177e4
LT		 597#endif /* __s390x__ */
598
4448aaf0 599static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
1da177e4 600{
c1821c2e
GS		 601 pte_t *shadow_pte = get_shadow_pte(ptep);
602
9282ed92 603 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
c1821c2e
GS		 604 if (shadow_pte)
605 pte_val(*shadow_pte) = _PAGE_TYPE_EMPTY;
1da177e4
LT		 606}
607
608/*
609 * The following pte modification functions only work if
610 * pte_present() is true. Undefined behaviour if not..
611 */
4448aaf0 612static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4
LT		 613{
614 pte_val(pte) &= PAGE_MASK;
615 pte_val(pte) |= pgprot_val(newprot);
616 return pte;
617}
618
4448aaf0 619static inline pte_t pte_wrprotect(pte_t pte)
1da177e4 620{
9282ed92 621 /* Do not clobber _PAGE_TYPE_NONE pages! */
1da177e4
LT		 622 if (!(pte_val(pte) & _PAGE_INVALID))
623 pte_val(pte) |= _PAGE_RO;
624 return pte;
625}
626
4448aaf0 627static inline pte_t pte_mkwrite(pte_t pte)
1da177e4
LT		 628{
629 pte_val(pte) &= ~_PAGE_RO;
630 return pte;
631}
632
4448aaf0 633static inline pte_t pte_mkclean(pte_t pte)
1da177e4
LT		 634{
635 /* The only user of pte_mkclean is the fork() code.
636 We must *not* clear the *physical* page dirty bit
637 just because fork() wants to clear the dirty bit in
638 *one* of the page's mappings. So we just do nothing. */
639 return pte;
640}
641
4448aaf0 642static inline pte_t pte_mkdirty(pte_t pte)
1da177e4
LT		 643{
644 /* We do not explicitly set the dirty bit because the
645 * sske instruction is slow. It is faster to let the
646 * next instruction set the dirty bit.
647 */
648 return pte;
649}
650
4448aaf0 651static inline pte_t pte_mkold(pte_t pte)
1da177e4
LT		 652{
653 /* S/390 doesn't keep its dirty/referenced bit in the pte.
654 * There is no point in clearing the real referenced bit.
655 */
656 return pte;
657}
658
4448aaf0 659static inline pte_t pte_mkyoung(pte_t pte)
1da177e4
LT		 660{
661 /* S/390 doesn't keep its dirty/referenced bit in the pte.
662 * There is no point in setting the real referenced bit.
663 */
664 return pte;
665}
666
667static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
668{
669 return 0;
670}
671
672static inline int
673ptep_clear_flush_young(struct vm_area_struct *vma,
674 unsigned long address, pte_t *ptep)
675{
676 /* No need to flush TLB; bits are in storage key */
677 return ptep_test_and_clear_young(vma, address, ptep);
678}
679
680static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
681{
682 return 0;
683}
684
685static inline int
686ptep_clear_flush_dirty(struct vm_area_struct *vma,
687 unsigned long address, pte_t *ptep)
688{
689 /* No need to flush TLB; bits are in storage key */
690 return ptep_test_and_clear_dirty(vma, address, ptep);
691}
692
693static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
694{
695 pte_t pte = *ptep;
696 pte_clear(mm, addr, ptep);
697 return pte;
698}
699
9282ed92 700static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1da177e4 701{
9282ed92 702 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
1da177e4 703#ifndef __s390x__
1da177e4
LT		 704 /* S390 has 1mb segments, we are emulating 4MB segments */
705 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
9282ed92
GS		 706#else
707 /* ipte in zarch mode can do the math */
708 pte_t *pto = ptep;
709#endif
94c12cc7
MS		 710 asm volatile(
711 " ipte %2,%3"
712 : "=m" (*ptep) : "m" (*ptep),
713 "a" (pto), "a" (address));
1da177e4 714 }
9282ed92
GS		 715 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
716}
717
718static inline pte_t
719ptep_clear_flush(struct vm_area_struct *vma,
720 unsigned long address, pte_t *ptep)
721{
722 pte_t pte = *ptep;
c1821c2e 723 pte_t *shadow_pte = get_shadow_pte(ptep);
9282ed92
GS		 724
725 __ptep_ipte(address, ptep);
c1821c2e
GS		 726 if (shadow_pte)
727 __ptep_ipte(address, shadow_pte);
1da177e4
LT		 728 return pte;
729}
730
731static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
732{
733 pte_t old_pte = *ptep;
734 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
735}
736
737static inline void
738ptep_establish(struct vm_area_struct *vma,
739 unsigned long address, pte_t *ptep,
740 pte_t entry)
741{
742 ptep_clear_flush(vma, address, ptep);
743 set_pte(ptep, entry);
744}
745
746#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
8dab5241
BH		 747({ \
748 int __changed = !pte_same(*(__ptep), __entry); \
749 if (__changed) \
750 ptep_establish(__vma, __address, __ptep, __entry); \
751 __changed; \
752})
1da177e4
LT		 753
754/*
755 * Test and clear dirty bit in storage key.
756 * We can't clear the changed bit atomically. This is a potential
757 * race against modification of the referenced bit. This function
758 * should therefore only be called if it is not mapped in any
759 * address space.
760 */
6c210482 761static inline int page_test_dirty(struct page *page)
2dcea57a 762{
6c210482
MS		 763 return (page_get_storage_key(page_to_phys(page)) & _PAGE_CHANGED) != 0;
764}
2dcea57a 765
6c210482
MS		 766static inline void page_clear_dirty(struct page *page)
767{
768 page_set_storage_key(page_to_phys(page), PAGE_DEFAULT_KEY);
2dcea57a 769}
1da177e4
LT		 770
771/*
772 * Test and clear referenced bit in storage key.
773 */
2dcea57a
HC		 774static inline int page_test_and_clear_young(struct page *page)
775{
0b2b6e1d 776 unsigned long physpage = page_to_phys(page);
2dcea57a
HC		 777 int ccode;
778
0b2b6e1d
HC		 779 asm volatile(
780 " rrbe 0,%1\n"
781 " ipm %0\n"
782 " srl %0,28\n"
2dcea57a
HC		 783 : "=d" (ccode) : "a" (physpage) : "cc" );
784 return ccode & 2;
785}
1da177e4
LT		 786
787/*
788 * Conversion functions: convert a page and protection to a page entry,
789 * and a page entry and page directory to the page they refer to.
790 */
791static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
792{
793 pte_t __pte;
794 pte_val(__pte) = physpage + pgprot_val(pgprot);
795 return __pte;
796}
797
2dcea57a
HC		 798static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
799{
0b2b6e1d 800 unsigned long physpage = page_to_phys(page);
1da177e4 801
2dcea57a
HC		 802 return mk_pte_phys(physpage, pgprot);
803}
804
805static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
806{
807 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
808
809 return mk_pte_phys(physpage, pgprot);
810}
1da177e4 811
1da177e4
LT		 812#ifdef __s390x__
813
2dcea57a
HC		 814static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
815{
816 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
817
818 return __pmd(physpage + pgprot_val(pgprot));
819}
1da177e4
LT		 820
821#endif /* __s390x__ */
822
823#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
824#define pte_page(x) pfn_to_page(pte_pfn(x))
825
46a82b2d 826#define pmd_page_vaddr(pmd) (pmd_val(pmd) & PAGE_MASK)
1da177e4 827
0b2b6e1d 828#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1da177e4 829
46a82b2d
DM		 830#define pgd_page_vaddr(pgd) (pgd_val(pgd) & PAGE_MASK)
831
0b2b6e1d 832#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
1da177e4
LT		 833
834/* to find an entry in a page-table-directory */
835#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
836#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
837
838/* to find an entry in a kernel page-table-directory */
839#define pgd_offset_k(address) pgd_offset(&init_mm, address)
840
841#ifndef __s390x__
842
843/* Find an entry in the second-level page table.. */
4448aaf0 844static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
1da177e4
LT		 845{
846 return (pmd_t *) dir;
847}
848
849#else /* __s390x__ */
850
851/* Find an entry in the second-level page table.. */
852#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
853#define pmd_offset(dir,addr) \
46a82b2d 854 ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(addr))
1da177e4
LT		 855
856#endif /* __s390x__ */
857
858/* Find an entry in the third-level page table.. */
859#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
860#define pte_offset_kernel(pmd, address) \
46a82b2d 861 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
1da177e4
LT		 862#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
863#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
864#define pte_unmap(pte) do { } while (0)
865#define pte_unmap_nested(pte) do { } while (0)
866
867/*
868 * 31 bit swap entry format:
869 * A page-table entry has some bits we have to treat in a special way.
870 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
871 * exception will occur instead of a page translation exception. The
872 * specifiation exception has the bad habit not to store necessary
873 * information in the lowcore.
874 * Bit 21 and bit 22 are the page invalid bit and the page protection
875 * bit. We set both to indicate a swapped page.
876 * Bit 30 and 31 are used to distinguish the different page types. For
877 * a swapped page these bits need to be zero.
878 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
879 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
880 * plus 24 for the offset.
881 * 0| offset |0110|o|type |00|
882 * 0 0000000001111111111 2222 2 22222 33
883 * 0 1234567890123456789 0123 4 56789 01
884 *
885 * 64 bit swap entry format:
886 * A page-table entry has some bits we have to treat in a special way.
887 * Bits 52 and bit 55 have to be zero, otherwise an specification
888 * exception will occur instead of a page translation exception. The
889 * specifiation exception has the bad habit not to store necessary
890 * information in the lowcore.
891 * Bit 53 and bit 54 are the page invalid bit and the page protection
892 * bit. We set both to indicate a swapped page.
893 * Bit 62 and 63 are used to distinguish the different page types. For
894 * a swapped page these bits need to be zero.
895 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
896 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
897 * plus 56 for the offset.
898 * | offset |0110|o|type |00|
899 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
900 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
901 */
902#ifndef __s390x__
903#define __SWP_OFFSET_MASK (~0UL >> 12)
904#else
905#define __SWP_OFFSET_MASK (~0UL >> 11)
906#endif
4448aaf0 907static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1da177e4
LT		 908{
909 pte_t pte;
910 offset &= __SWP_OFFSET_MASK;
9282ed92 911 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1da177e4
LT		 912 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
913 return pte;
914}
915
916#define __swp_type(entry) (((entry).val >> 2) & 0x1f)
917#define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
918#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
919
920#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
921#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
922
923#ifndef __s390x__
924# define PTE_FILE_MAX_BITS 26
925#else /* __s390x__ */
926# define PTE_FILE_MAX_BITS 59
927#endif /* __s390x__ */
928
929#define pte_to_pgoff(__pte) \
930 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
931
932#define pgoff_to_pte(__off) \
933 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
9282ed92 934 | _PAGE_TYPE_FILE })
1da177e4
LT		 935
936#endif /* !__ASSEMBLY__ */
937
938#define kern_addr_valid(addr) (1)
939
f4eb07c1
HC		 940extern int add_shared_memory(unsigned long start, unsigned long size);
941extern int remove_shared_memory(unsigned long start, unsigned long size);
942
1da177e4
LT		 943/*
944 * No page table caches to initialise
945 */
946#define pgtable_cache_init() do { } while (0)
947
f4eb07c1
HC		 948#define __HAVE_ARCH_MEMMAP_INIT
949extern void memmap_init(unsigned long, int, unsigned long, unsigned long);
950
1da177e4
LT		 951#define __HAVE_ARCH_PTEP_ESTABLISH
952#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
953#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
954#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
955#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
956#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
957#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
958#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
959#define __HAVE_ARCH_PTEP_SET_WRPROTECT
960#define __HAVE_ARCH_PTE_SAME
6c210482
MS		 961#define __HAVE_ARCH_PAGE_TEST_DIRTY
962#define __HAVE_ARCH_PAGE_CLEAR_DIRTY
1da177e4
LT		 963#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
964#include <asm-generic/pgtable.h>
965
966#endif /* _S390_PAGE_H */
967
Linux kernel - Deliverables
This page took 0.48937 seconds and 5 git commands to generate.