projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* $Id: timer.h,v 1.21 1999/04/20 13:22:51 anton Exp $ |
| 2 | * timer.h: Definitions for the timer chips on the Sparc. | |
| 3 | * | |
| 4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
| 5 | */ | |
| 6 | ||
| 7 | #include <linux/config.h> | |
| 8 | ||
| 9 | #ifndef _SPARC_TIMER_H | |
| 10 | #define _SPARC_TIMER_H | |
| 11 | ||
| 12 | #include <asm/system.h> /* For SUN4M_NCPUS */ | |
| 13 | #include <asm/sun4paddr.h> | |
| 14 | #include <asm/btfixup.h> | |
| 15 | ||
| 16 | /* Timer structures. The interrupt timer has two properties which | |
| 17 | * are the counter (which is handled in do_timer in sched.c) and the limit. | |
| 18 | * This limit is where the timer's counter 'wraps' around. Oddly enough, | |
| 19 | * the sun4c timer when it hits the limit wraps back to 1 and not zero | |
| 20 | * thus when calculating the value at which it will fire a microsecond you | |
| 21 | * must adjust by one. Thanks SUN for designing such great hardware ;( | |
| 22 | */ | |
| 23 | ||
| 24 | /* Note that I am only going to use the timer that interrupts at | |
| 25 | * Sparc IRQ 10. There is another one available that can fire at | |
| 26 | * IRQ 14. Currently it is left untouched, we keep the PROM's limit | |
| 27 | * register value and let the prom take these interrupts. This allows | |
| 28 | * L1-A to work. | |
| 29 | */ | |
| 30 | ||
| 31 | struct sun4c_timer_info { | |
| 32 | __volatile__ unsigned int cur_count10; | |
| 33 | __volatile__ unsigned int timer_limit10; | |
| 34 | __volatile__ unsigned int cur_count14; | |
| 35 | __volatile__ unsigned int timer_limit14; | |
| 36 | }; | |
| 37 | ||
| 38 | #define SUN4C_TIMER_PHYSADDR 0xf3000000 | |
| 39 | #ifdef CONFIG_SUN4 | |
| 40 | #define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR | |
| 41 | #else | |
| 42 | #define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR | |
| 43 | #endif | |
| 44 | ||
| 45 | /* A sun4m has two blocks of registers which are probably of the same | |
| 46 | * structure. LSI Logic's L64851 is told to _decrement_ from the limit | |
| 47 | * value. Aurora behaves similarly but its limit value is compacted in | |
| 48 | * other fashion (it's wider). Documented fields are defined here. | |
| 49 | */ | |
| 50 | ||
| 51 | /* As with the interrupt register, we have two classes of timer registers | |
| 52 | * which are per-cpu and master. Per-cpu timers only hit that cpu and are | |
| 53 | * only level 14 ticks, master timer hits all cpus and is level 10. | |
| 54 | */ | |
| 55 | ||
| 56 | #define SUN4M_PRM_CNT_L 0x80000000 | |
| 57 | #define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 | |
| 58 | ||
| 59 | struct sun4m_timer_percpu_info { | |
| 60 | __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ | |
| 61 | __volatile__ unsigned int l14_cur_count; | |
| 62 | ||
| 63 | /* This register appears to be write only and/or inaccessible | |
| 64 | * on Uni-Processor sun4m machines. | |
| 65 | */ | |
| 66 | __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ | |
| 67 | ||
| 68 | __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ | |
| 69 | __volatile__ unsigned char space[PAGE_SIZE - 16]; | |
| 70 | }; | |
| 71 | ||
| 72 | struct sun4m_timer_regs { | |
| 73 | struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; | |
| 74 | volatile unsigned int l10_timer_limit; | |
| 75 | volatile unsigned int l10_cur_count; | |
| 76 | ||
| 77 | /* Again, this appears to be write only and/or inaccessible | |
| 78 | * on uni-processor sun4m machines. | |
| 79 | */ | |
| 80 | volatile unsigned int l10_limit_noclear; | |
| 81 | ||
| 82 | /* This register too, it must be magic. */ | |
| 83 | volatile unsigned int foobar; | |
| 84 | ||
| 85 | volatile unsigned int cfg; /* equals zero at boot time... */ | |
| 86 | }; | |
| 87 | ||
| 88 | extern struct sun4m_timer_regs *sun4m_timers; | |
| 89 | ||
| 90 | #define SUN4D_PRM_CNT_L 0x80000000 | |
| 91 | #define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 | |
| 92 | ||
| 93 | struct sun4d_timer_regs { | |
| 94 | volatile unsigned int l10_timer_limit; | |
| 95 | volatile unsigned int l10_cur_countx; | |
| 96 | volatile unsigned int l10_limit_noclear; | |
| 97 | volatile unsigned int ctrl; | |
| 98 | volatile unsigned int l10_cur_count; | |
| 99 | }; | |
| 100 | ||
| 101 | extern struct sun4d_timer_regs *sun4d_timers; | |
| 102 | ||
| 103 | extern __volatile__ unsigned int *master_l10_counter; | |
| 104 | extern __volatile__ unsigned int *master_l10_limit; | |
| 105 | ||
| 106 | /* FIXME: Make do_[gs]ettimeofday btfixup calls */ | |
| 107 | BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) | |
| 108 | #define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv) | |
| 109 | ||
| 110 | #endif /* !(_SPARC_TIMER_H) */ |