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1da177e4 LT |
1 | /* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */ |
2 | #ifndef _SPARC64_DCU_H | |
3 | #define _SPARC64_DCU_H | |
4 | ||
5 | /* UltraSparc-III Data Cache Unit Control Register */ | |
6 | #define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/ | |
7 | #define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */ | |
8 | #define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */ | |
9 | #define DCU_RE 0x0000400000000000 /* RAW bypass Enable */ | |
10 | #define DCU_PE 0x0000200000000000 /* PCache Enable */ | |
11 | #define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */ | |
12 | #define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */ | |
13 | #define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */ | |
14 | #define DCU_WE 0x0000020000000000 /* WCache enable */ | |
15 | #define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */ | |
16 | #define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */ | |
17 | #define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */ | |
18 | #define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */ | |
19 | #define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */ | |
20 | #define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */ | |
21 | #define DCU_DM 0x0000000000000008 /* DMMU Enable */ | |
22 | #define DCU_IM 0x0000000000000004 /* IMMU Enable */ | |
23 | #define DCU_DC 0x0000000000000002 /* Data Cache Enable */ | |
24 | #define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */ | |
25 | ||
26 | #endif /* _SPARC64_DCU_H */ |