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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1999 by Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | */ | |
1da177e4 LT |
9 | |
10 | #ifdef CONFIG_RTE_CB_ME2 | |
11 | ||
12 | #include <asm/rte_me2_cb.h> | |
13 | ||
14 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) | |
15 | ||
16 | #define irq_cannonicalize(x) (x) | |
17 | #define BASE_BAUD 250000 /* (16MHz / (16 * 38400)) * 9600 */ | |
18 | #define SERIAL_PORT_DFNS \ | |
19 | { 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS }, | |
20 | ||
21 | /* Redefine UART register offsets. */ | |
22 | #undef UART_RX | |
23 | #undef UART_TX | |
24 | #undef UART_DLL | |
25 | #undef UART_TRG | |
26 | #undef UART_DLM | |
27 | #undef UART_IER | |
28 | #undef UART_FCTR | |
29 | #undef UART_IIR | |
30 | #undef UART_FCR | |
31 | #undef UART_EFR | |
32 | #undef UART_LCR | |
33 | #undef UART_MCR | |
34 | #undef UART_LSR | |
35 | #undef UART_MSR | |
36 | #undef UART_SCR | |
37 | #undef UART_EMSR | |
38 | ||
39 | #define UART_RX (0 * CB_UART_REG_GAP) | |
40 | #define UART_TX (0 * CB_UART_REG_GAP) | |
41 | #define UART_DLL (0 * CB_UART_REG_GAP) | |
42 | #define UART_TRG (0 * CB_UART_REG_GAP) | |
43 | #define UART_DLM (1 * CB_UART_REG_GAP) | |
44 | #define UART_IER (1 * CB_UART_REG_GAP) | |
45 | #define UART_FCTR (1 * CB_UART_REG_GAP) | |
46 | #define UART_IIR (2 * CB_UART_REG_GAP) | |
47 | #define UART_FCR (2 * CB_UART_REG_GAP) | |
48 | #define UART_EFR (2 * CB_UART_REG_GAP) | |
49 | #define UART_LCR (3 * CB_UART_REG_GAP) | |
50 | #define UART_MCR (4 * CB_UART_REG_GAP) | |
51 | #define UART_LSR (5 * CB_UART_REG_GAP) | |
52 | #define UART_MSR (6 * CB_UART_REG_GAP) | |
53 | #define UART_SCR (7 * CB_UART_REG_GAP) | |
54 | #define UART_EMSR (7 * CB_UART_REG_GAP) | |
55 | ||
56 | #endif /* CONFIG_RTE_CB_ME2 */ |