[deliverable/linux.git] / include / asm-x86 / apic_64.h

#ifndef __ASM_APIC_H
#define __ASM_APIC_H

#include <linux/pm.h>
#include <linux/delay.h>
#include <asm/fixmap.h>
#include <asm/apicdef.h>
#include <asm/system.h>

#define Dprintk(x...)

/*
 * Debugging macros
 */
#define APIC_QUIET   0
#define APIC_VERBOSE 1
#define APIC_DEBUG   2

extern int apic_verbosity;
extern int apic_runs_main_timer;
extern int ioapic_force;
extern int disable_apic_timer;

/*
 * Define the default level of output to be very little
 * This can be turned up by using apic=verbose for more
 * information and apic=debug for _lots_ of information.
 * apic_verbosity is defined in apic.c
 */
#define apic_printk(v, s, a...) do {       \
		if ((v) <= apic_verbosity) \
			printk(s, ##a);    \
	} while (0)

struct pt_regs;

/*
 * Basic functions accessing APICs.
 */

static __inline void apic_write(unsigned long reg, unsigned int v)
{
	*((volatile unsigned int *)(APIC_BASE+reg)) = v;
}

static __inline unsigned int apic_read(unsigned long reg)
{
	return *((volatile unsigned int *)(APIC_BASE+reg));
}

extern void apic_wait_icr_idle(void);
extern unsigned int safe_apic_wait_icr_idle(void);

static inline void ack_APIC_irq(void)
{
	/*
	 * ack_APIC_irq() actually gets compiled as a single instruction:
	 * - a single rmw on Pentium/82489DX
	 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
	 * ... yummie.
	 */

	/* Docs say use 0 for future compatibility */
	apic_write(APIC_EOI, 0);
}

extern int get_maxlvt (void);
extern void clear_local_APIC (void);
extern void connect_bsp_APIC (void);
extern void disconnect_bsp_APIC (int virt_wire_setup);
extern void disable_local_APIC (void);
extern int verify_local_APIC (void);
extern void cache_APIC_registers (void);
extern void sync_Arb_IDs (void);
extern void init_bsp_APIC (void);
extern void setup_local_APIC (void);
extern void init_apic_mappings (void);
extern void smp_local_timer_interrupt (void);
extern void setup_boot_APIC_clock (void);
extern void setup_secondary_APIC_clock (void);
extern int APIC_init_uniprocessor (void);
extern void setup_apic_routing(void);

extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector,
				    unsigned char msg_type, unsigned char mask);

extern int apic_is_clustered_box(void);

#define K8_APIC_EXT_LVT_BASE    0x500
#define K8_APIC_EXT_INT_MSG_FIX 0x0
#define K8_APIC_EXT_INT_MSG_SMI 0x2
#define K8_APIC_EXT_INT_MSG_NMI 0x4
#define K8_APIC_EXT_INT_MSG_EXT 0x7
#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD    0

#define ARCH_APICTIMER_STOPS_ON_C3	1

extern unsigned boot_cpu_id;
extern int local_apic_timer_c2_ok;

#endif /* __ASM_APIC_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_APIC_H
	2	#define __ASM_APIC_H
	3
1da177e4	4	#include <linux/pm.h>
8339e9fb	5	#include <linux/delay.h>
1da177e4 LT	6	#include <asm/fixmap.h>
	7	#include <asm/apicdef.h>
	8	#include <asm/system.h>
	9
	10	#define Dprintk(x...)
	11
	12	/*
	13	* Debugging macros
	14	*/
	15	#define APIC_QUIET 0
	16	#define APIC_VERBOSE 1
	17	#define APIC_DEBUG 2
	18
	19	extern int apic_verbosity;
73dea47f	20	extern int apic_runs_main_timer;
2c8c0e6b	21	extern int ioapic_force;
fb79d22e	22	extern int disable_apic_timer;
1da177e4 LT	23
	24	/*
	25	* Define the default level of output to be very little
	26	* This can be turned up by using apic=verbose for more
	27	* information and apic=debug for _lots_ of information.
	28	* apic_verbosity is defined in apic.c
	29	*/
	30	#define apic_printk(v, s, a...) do { \
	31	if ((v) <= apic_verbosity) \
	32	printk(s, ##a); \
	33	} while (0)
	34
1da177e4 LT	35	struct pt_regs;
	36
	37	/*
	38	* Basic functions accessing APICs.
	39	*/
	40
	41	static __inline void apic_write(unsigned long reg, unsigned int v)
	42	{
	43	((volatile unsigned int )(APIC_BASE+reg)) = v;
	44	}
	45
1da177e4 LT	46	static __inline unsigned int apic_read(unsigned long reg)
	47	{
	48	return ((volatile unsigned int )(APIC_BASE+reg));
	49	}
	50
8339e9fb FLV	51	extern void apic_wait_icr_idle(void);
8339e9fb FLV	52	extern unsigned int safe_apic_wait_icr_idle(void);
1da177e4	53
1da177e4 LT	54	static inline void ack_APIC_irq(void)
	55	{
	56	/*
	57	* ack_APIC_irq() actually gets compiled as a single instruction:
	58	* - a single rmw on Pentium/82489DX
	59	* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
	60	* ... yummie.
	61	*/
	62
	63	/* Docs say use 0 for future compatibility */
11a8e778	64	apic_write(APIC_EOI, 0);
1da177e4 LT	65	}
	66
	67	extern int get_maxlvt (void);
	68	extern void clear_local_APIC (void);
	69	extern void connect_bsp_APIC (void);
208fb931	70	extern void disconnect_bsp_APIC (int virt_wire_setup);
1da177e4 LT	71	extern void disable_local_APIC (void);
	72	extern int verify_local_APIC (void);
	73	extern void cache_APIC_registers (void);
	74	extern void sync_Arb_IDs (void);
	75	extern void init_bsp_APIC (void);
	76	extern void setup_local_APIC (void);
	77	extern void init_apic_mappings (void);
7d12e780	78	extern void smp_local_timer_interrupt (void);
1da177e4 LT	79	extern void setup_boot_APIC_clock (void);
1da177e4 LT	80	extern void setup_secondary_APIC_clock (void);
1da177e4	81	extern int APIC_init_uniprocessor (void);
3c43f039	82	extern void setup_apic_routing(void);
1da177e4	83
f40f31bf TG	84	extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector,
f40f31bf TG	85	unsigned char msg_type, unsigned char mask);
17fc14ff	86
55f93afd CW	87	extern int apic_is_clustered_box(void);
55f93afd CW	88
17fc14ff JS	89	#define K8_APIC_EXT_LVT_BASE 0x500
	90	#define K8_APIC_EXT_INT_MSG_FIX 0x0
	91	#define K8_APIC_EXT_INT_MSG_SMI 0x2
	92	#define K8_APIC_EXT_INT_MSG_NMI 0x4
	93	#define K8_APIC_EXT_INT_MSG_EXT 0x7
	94	#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0
	95
d25bf7e5 VP	96	#define ARCH_APICTIMER_STOPS_ON_C3 1
d25bf7e5 VP	97
1da177e4	98	extern unsigned boot_cpu_id;
2e7c2838	99	extern int local_apic_timer_c2_ok;
1da177e4 LT	100
1da177e4 LT	101	#endif /* __ASM_APIC_H */