[deliverable/linux.git] / include / asm-x86 / cache_64.h

/*
 * include/asm-x86_64/cache.h
 */
#ifndef __ARCH_X8664_CACHE_H
#define __ARCH_X8664_CACHE_H


/* L1 cache line size */
#define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
#define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)

#ifdef CONFIG_X86_VSMP

/* vSMP Internode cacheline shift */
#define INTERNODE_CACHE_SHIFT (12)
#ifdef CONFIG_SMP
#define __cacheline_aligned_in_smp					\
       __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))         \
       __attribute__((__section__(".data.page_aligned")))
#endif

#endif

#define __read_mostly __attribute__((__section__(".data.read_mostly")))

#endif
Commit	Line	Data
1da177e4	1	/*
f30c2269	2	* include/asm-x86_64/cache.h
1da177e4 LT	3	*/
	4	#ifndef __ARCH_X8664_CACHE_H
	5	#define __ARCH_X8664_CACHE_H
	6
1da177e4 LT	7
	8	/* L1 cache line size */
	9	#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
	10	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
1da177e4	11
5fd63b30 RT	12	#ifdef CONFIG_X86_VSMP
	13
	14	/* vSMP Internode cacheline shift */
	15	#define INTERNODE_CACHE_SHIFT (12)
	16	#ifdef CONFIG_SMP
	17	#define __cacheline_aligned_in_smp \
	18	__attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \
	19	__attribute__((__section__(".data.page_aligned")))
	20	#endif
	21
	22	#endif
	23
0b699e36 ED	24	#define __read_mostly __attribute__((__section__(".data.read_mostly")))
0b699e36 ED	25
1da177e4	26	#endif