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KVM: Add coalesced MMIO support (common part)
[deliverable/linux.git] / include / asm-x86 / kvm_host.h
CommitLineData
043405e1
CO		 1#/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
edf88417
AK		 11#ifndef ASM_KVM_HOST_H
12#define ASM_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
16
17#include <linux/kvm.h>
18#include <linux/kvm_para.h>
edf88417 19#include <linux/kvm_types.h>
34c16eec 20
50d0a0f9 21#include <asm/pvclock-abi.h>
e01a1b57
HB		 22#include <asm/desc.h>
23
69a9f69b
AK		 24#define KVM_MAX_VCPUS 16
25#define KVM_MEMORY_SLOTS 32
26/* memory slots that does not exposed to userspace */
27#define KVM_PRIVATE_MEM_SLOTS 4
28
29#define KVM_PIO_PAGE_OFFSET 1
30
cd6e8f87
ZX		 31#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
32#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 33#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
34 0xFFFFFF0000000000ULL)
cd6e8f87 35
7d76b4d3 36#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 37 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
38 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 39#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 40 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
41 | X86_CR0_MP)
7d76b4d3 42#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 43 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
44#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
45#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
46
47#define INVALID_PAGE (~(hpa_t)0)
48#define UNMAPPED_GVA (~(gpa_t)0)
49
05da4558
MT		 50/* shadow tables are PAE even on non-PAE hosts */
51#define KVM_HPAGE_SHIFT 21
52#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
53#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
54
55#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
56
cd6e8f87
ZX		 57#define DE_VECTOR 0
58#define UD_VECTOR 6
59#define NM_VECTOR 7
60#define DF_VECTOR 8
61#define TS_VECTOR 10
62#define NP_VECTOR 11
63#define SS_VECTOR 12
64#define GP_VECTOR 13
65#define PF_VECTOR 14
53371b50 66#define MC_VECTOR 18
cd6e8f87
ZX		 67
68#define SELECTOR_TI_MASK (1 << 2)
69#define SELECTOR_RPL_MASK 0x03
70
71#define IOPL_SHIFT 12
72
d69fb81f
ZX		 73#define KVM_ALIAS_SLOTS 4
74
d657a98e
ZX		 75#define KVM_PERMILLE_MMU_PAGES 20
76#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 77#define KVM_MMU_HASH_SHIFT 10
78#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 79#define KVM_MIN_FREE_MMU_PAGES 5
80#define KVM_REFILL_PAGES 25
81#define KVM_MAX_CPUID_ENTRIES 40
9ba075a6 82#define KVM_NR_VAR_MTRR 8
d657a98e 83
e9b11c17
ZX		 84extern spinlock_t kvm_lock;
85extern struct list_head vm_list;
86
d657a98e
ZX		 87struct kvm_vcpu;
88struct kvm;
89
2b3ccfa0
ZX		 90enum {
91 VCPU_REGS_RAX = 0,
92 VCPU_REGS_RCX = 1,
93 VCPU_REGS_RDX = 2,
94 VCPU_REGS_RBX = 3,
95 VCPU_REGS_RSP = 4,
96 VCPU_REGS_RBP = 5,
97 VCPU_REGS_RSI = 6,
98 VCPU_REGS_RDI = 7,
99#ifdef CONFIG_X86_64
100 VCPU_REGS_R8 = 8,
101 VCPU_REGS_R9 = 9,
102 VCPU_REGS_R10 = 10,
103 VCPU_REGS_R11 = 11,
104 VCPU_REGS_R12 = 12,
105 VCPU_REGS_R13 = 13,
106 VCPU_REGS_R14 = 14,
107 VCPU_REGS_R15 = 15,
108#endif
109 NR_VCPU_REGS
110};
111
112enum {
81609e3e 113 VCPU_SREG_ES,
2b3ccfa0 114 VCPU_SREG_CS,
81609e3e 115 VCPU_SREG_SS,
2b3ccfa0 116 VCPU_SREG_DS,
2b3ccfa0
ZX		 117 VCPU_SREG_FS,
118 VCPU_SREG_GS,
2b3ccfa0
ZX		 119 VCPU_SREG_TR,
120 VCPU_SREG_LDTR,
121};
122
edf88417 123#include <asm/kvm_x86_emulate.h>
2b3ccfa0 124
d657a98e
ZX		 125#define KVM_NR_MEM_OBJS 40
126
69a9f69b
AK		 127struct kvm_guest_debug {
128 int enabled;
129 unsigned long bp[4];
130 int singlestep;
131};
132
d657a98e
ZX		 133/*
134 * We don't want allocation failures within the mmu code, so we preallocate
135 * enough memory for a single page fault in a cache.
136 */
137struct kvm_mmu_memory_cache {
138 int nobjs;
139 void *objects[KVM_NR_MEM_OBJS];
140};
141
142#define NR_PTE_CHAIN_ENTRIES 5
143
144struct kvm_pte_chain {
145 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
146 struct hlist_node link;
147};
148
149/*
150 * kvm_mmu_page_role, below, is defined as:
151 *
152 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
153 * bits 4:7 - page table level for this shadow (1-4)
154 * bits 8:9 - page table quadrant for 2-level guests
155 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
156 * bits 17:19 - common access permissions for all ptes in this shadow page
157 */
158union kvm_mmu_page_role {
159 unsigned word;
160 struct {
7d76b4d3
JP		 161 unsigned glevels:4;
162 unsigned level:4;
163 unsigned quadrant:2;
164 unsigned pad_for_nice_hex_output:6;
165 unsigned metaphysical:1;
166 unsigned access:3;
2e53d63a 167 unsigned invalid:1;
d657a98e
ZX		 168 };
169};
170
171struct kvm_mmu_page {
172 struct list_head link;
173 struct hlist_node hash_link;
174
175 /*
176 * The following two entries are used to key the shadow page in the
177 * hash table.
178 */
179 gfn_t gfn;
180 union kvm_mmu_page_role role;
181
182 u64 *spt;
183 /* hold the gfn of each spte inside spt */
184 gfn_t *gfns;
185 unsigned long slot_bitmap; /* One bit set per slot which has memory
186 * in this shadow page.
187 */
188 int multimapped; /* More than one parent_pte? */
189 int root_count; /* Currently serving as active root */
190 union {
191 u64 *parent_pte; /* !multimapped */
192 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
193 };
194};
195
196/*
197 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
198 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
199 * mode.
200 */
201struct kvm_mmu {
202 void (*new_cr3)(struct kvm_vcpu *vcpu);
203 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
204 void (*free)(struct kvm_vcpu *vcpu);
205 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
206 void (*prefetch_page)(struct kvm_vcpu *vcpu,
207 struct kvm_mmu_page *page);
208 hpa_t root_hpa;
209 int root_level;
210 int shadow_root_level;
211
212 u64 *pae_root;
213};
214
ad312c7c 215struct kvm_vcpu_arch {
34c16eec
ZX		 216 u64 host_tsc;
217 int interrupt_window_open;
218 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
219 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
220 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
221 unsigned long rip; /* needs vcpu_load_rsp_rip() */
222
223 unsigned long cr0;
224 unsigned long cr2;
225 unsigned long cr3;
226 unsigned long cr4;
227 unsigned long cr8;
228 u64 pdptrs[4]; /* pae */
229 u64 shadow_efer;
230 u64 apic_base;
231 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 232 int mp_state;
233 int sipi_vector;
234 u64 ia32_misc_enable_msr;
b209749f 235 bool tpr_access_reporting;
34c16eec
ZX		 236
237 struct kvm_mmu mmu;
238
239 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
240 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
241 struct kvm_mmu_memory_cache mmu_page_cache;
242 struct kvm_mmu_memory_cache mmu_page_header_cache;
243
244 gfn_t last_pt_write_gfn;
245 int last_pt_write_count;
246 u64 *last_pte_updated;
1b7fcd32 247 gfn_t last_pte_gfn;
34c16eec 248
d7824fff 249 struct {
35149e21
AL		 250 gfn_t gfn; /* presumed gfn during guest pte update */
251 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 252 int largepage;
d7824fff
AK		 253 } update_pte;
254
34c16eec
ZX		 255 struct i387_fxsave_struct host_fx_image;
256 struct i387_fxsave_struct guest_fx_image;
257
258 gva_t mmio_fault_cr2;
259 struct kvm_pio_request pio;
260 void *pio_data;
261
298101da
AK		 262 struct kvm_queued_exception {
263 bool pending;
264 bool has_error_code;
265 u8 nr;
266 u32 error_code;
267 } exception;
268
34c16eec
ZX		 269 struct {
270 int active;
271 u8 save_iopl;
272 struct kvm_save_segment {
273 u16 selector;
274 unsigned long base;
275 u32 limit;
276 u32 ar;
277 } tr, es, ds, fs, gs;
278 } rmode;
279 int halt_request; /* real mode on Intel only */
280
281 int cpuid_nent;
07716717 282 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 283 /* emulate context */
284
285 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 286
287 gpa_t time;
50d0a0f9
GH		 288 struct pvclock_vcpu_time_info hv_clock;
289 unsigned int hv_clock_tsc_khz;
18068523
GOC		 290 unsigned int time_offset;
291 struct page *time_page;
3419ffc8
SY		 292
293 bool nmi_pending;
9ba075a6
AK		 294
295 u64 mtrr[0x100];
34c16eec
ZX		 296};
297
d69fb81f
ZX		 298struct kvm_mem_alias {
299 gfn_t base_gfn;
300 unsigned long npages;
301 gfn_t target_gfn;
302};
303
304struct kvm_arch{
305 int naliases;
306 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 307
308 unsigned int n_free_mmu_pages;
309 unsigned int n_requested_mmu_pages;
310 unsigned int n_alloc_mmu_pages;
311 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
312 /*
313 * Hash table of struct kvm_mmu_page.
314 */
315 struct list_head active_mmu_pages;
d7deeeb0
ZX		 316 struct kvm_pic *vpic;
317 struct kvm_ioapic *vioapic;
7837699f 318 struct kvm_pit *vpit;
bfc6d222
ZX		 319
320 int round_robin_prev_vcpu;
321 unsigned int tss_addr;
322 struct page *apic_access_page;
18068523
GOC		 323
324 gpa_t wall_clock;
b7ebfb05
SY		 325
326 struct page *ept_identity_pagetable;
327 bool ept_identity_pagetable_done;
d69fb81f
ZX		 328};
329
0711456c
ZX		 330struct kvm_vm_stat {
331 u32 mmu_shadow_zapped;
332 u32 mmu_pte_write;
333 u32 mmu_pte_updated;
334 u32 mmu_pde_zapped;
335 u32 mmu_flooded;
336 u32 mmu_recycled;
dfc5aa00 337 u32 mmu_cache_miss;
0711456c 338 u32 remote_tlb_flush;
05da4558 339 u32 lpages;
0711456c
ZX		 340};
341
77b4c255
ZX		 342struct kvm_vcpu_stat {
343 u32 pf_fixed;
344 u32 pf_guest;
345 u32 tlb_flush;
346 u32 invlpg;
347
348 u32 exits;
349 u32 io_exits;
350 u32 mmio_exits;
351 u32 signal_exits;
352 u32 irq_window_exits;
f08864b4 353 u32 nmi_window_exits;
77b4c255
ZX		 354 u32 halt_exits;
355 u32 halt_wakeup;
356 u32 request_irq_exits;
357 u32 irq_exits;
358 u32 host_state_reload;
359 u32 efer_reload;
360 u32 fpu_reload;
361 u32 insn_emulation;
362 u32 insn_emulation_fail;
f11c3a8d 363 u32 hypercalls;
77b4c255 364};
ad312c7c 365
e01a1b57
HB		 366struct descriptor_table {
367 u16 limit;
368 unsigned long base;
369} __attribute__((packed));
370
ea4a5ff8
ZX		 371struct kvm_x86_ops {
372 int (*cpu_has_kvm_support)(void); /* __init */
373 int (*disabled_by_bios)(void); /* __init */
374 void (*hardware_enable)(void *dummy); /* __init */
375 void (*hardware_disable)(void *dummy);
376 void (*check_processor_compatibility)(void *rtn);
377 int (*hardware_setup)(void); /* __init */
378 void (*hardware_unsetup)(void); /* __exit */
774ead3a 379 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 380
381 /* Create, but do not attach this VCPU */
382 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
383 void (*vcpu_free)(struct kvm_vcpu *vcpu);
384 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
385
386 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
387 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
388 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 389
390 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
391 struct kvm_debug_guest *dbg);
392 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
393 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
394 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
395 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
396 void (*get_segment)(struct kvm_vcpu *vcpu,
397 struct kvm_segment *var, int seg);
2e4d2653 398 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 399 void (*set_segment)(struct kvm_vcpu *vcpu,
400 struct kvm_segment *var, int seg);
401 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
402 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
403 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
404 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
405 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
406 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
407 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
408 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
409 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
410 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
411 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
412 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
413 int *exception);
414 void (*cache_regs)(struct kvm_vcpu *vcpu);
415 void (*decache_regs)(struct kvm_vcpu *vcpu);
416 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
417 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
418
419 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 420
ea4a5ff8
ZX		 421 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
422 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
423 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
424 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
425 unsigned char *hypercall_addr);
426 int (*get_irq)(struct kvm_vcpu *vcpu);
427 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 428 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
429 bool has_error_code, u32 error_code);
430 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 431 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
432 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
433 struct kvm_run *run);
434
435 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 436 int (*get_tdp_level)(void);
ea4a5ff8
ZX		 437};
438
97896d04
ZX		 439extern struct kvm_x86_ops *kvm_x86_ops;
440
54f1585a
ZX		 441int kvm_mmu_module_init(void);
442void kvm_mmu_module_exit(void);
443
444void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
445int kvm_mmu_create(struct kvm_vcpu *vcpu);
446int kvm_mmu_setup(struct kvm_vcpu *vcpu);
447void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 448void kvm_mmu_set_base_ptes(u64 base_pte);
449void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
450 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX		 451
452int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
453void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
454void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 455unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 456void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
457
cc4b6871
JR		 458int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
459
3200f405 460int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 461 const void *val, int bytes);
2f333bcb
MT		 462int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
463 gpa_t addr, unsigned long *ret);
464
465extern bool tdp_enabled;
9f811285 466
54f1585a
ZX		 467enum emulation_result {
468 EMULATE_DONE, /* no further processing */
469 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
470 EMULATE_FAIL, /* can't emulate this instruction */
471};
472
571008da
SY		 473#define EMULTYPE_NO_DECODE (1 << 0)
474#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 475int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 476 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 477void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
478void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
479void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
480void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
481 unsigned long *rflags);
482
483unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
484void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
485 unsigned long *rflags);
f2b4b7dd 486void kvm_enable_efer_bits(u64);
54f1585a
ZX		 487int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
488int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
489
490struct x86_emulate_ctxt;
491
492int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
493 int size, unsigned port);
494int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
495 int size, unsigned long count, int down,
496 gva_t address, int rep, unsigned port);
497void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
498int kvm_emulate_halt(struct kvm_vcpu *vcpu);
499int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
500int emulate_clts(struct kvm_vcpu *vcpu);
501int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
502 unsigned long *dest);
503int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
504 unsigned long value);
505
3e6e0aab
GT		 506void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
507int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
508 int type_bits, int seg);
509
37817f29
IE		 510int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
511
2d3ad1f4 512void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 513void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
514void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
515void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 516unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
517void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 518void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
519
520int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
521int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
522
298101da
AK		 523void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
524void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 525void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
526 u32 error_code);
298101da 527
3419ffc8
SY		 528void kvm_inject_nmi(struct kvm_vcpu *vcpu);
529
54f1585a
ZX		 530void fx_init(struct kvm_vcpu *vcpu);
531
532int emulator_read_std(unsigned long addr,
533 void *val,
534 unsigned int bytes,
535 struct kvm_vcpu *vcpu);
536int emulator_write_emulated(unsigned long addr,
537 const void *val,
538 unsigned int bytes,
539 struct kvm_vcpu *vcpu);
540
541unsigned long segment_base(u16 selector);
542
d835dfec 543void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a
ZX		 544void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
545 const u8 *new, int bytes);
546int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
547void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
548int kvm_mmu_load(struct kvm_vcpu *vcpu);
549void kvm_mmu_unload(struct kvm_vcpu *vcpu);
550
551int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
552
553int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
554
3067714c 555int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
34c16eec 556
18552672
JR		 557void kvm_enable_tdp(void);
558
a03490ed 559int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 560int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d
ZX		 561
562static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
563{
564 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
565
566 return (struct kvm_mmu_page *)page_private(page);
567}
568
569static inline u16 read_fs(void)
570{
571 u16 seg;
572 asm("mov %%fs, %0" : "=g"(seg));
573 return seg;
574}
575
576static inline u16 read_gs(void)
577{
578 u16 seg;
579 asm("mov %%gs, %0" : "=g"(seg));
580 return seg;
581}
582
583static inline u16 read_ldt(void)
584{
585 u16 ldt;
586 asm("sldt %0" : "=g"(ldt));
587 return ldt;
588}
589
590static inline void load_fs(u16 sel)
591{
592 asm("mov %0, %%fs" : : "rm"(sel));
593}
594
595static inline void load_gs(u16 sel)
596{
597 asm("mov %0, %%gs" : : "rm"(sel));
598}
599
600#ifndef load_ldt
601static inline void load_ldt(u16 sel)
602{
603 asm("lldt %0" : : "rm"(sel));
604}
605#endif
606
607static inline void get_idt(struct descriptor_table *table)
608{
609 asm("sidt %0" : "=m"(*table));
610}
611
612static inline void get_gdt(struct descriptor_table *table)
613{
614 asm("sgdt %0" : "=m"(*table));
615}
616
617static inline unsigned long read_tr_base(void)
618{
619 u16 tr;
620 asm("str %0" : "=g"(tr));
621 return segment_base(tr);
622}
623
624#ifdef CONFIG_X86_64
625static inline unsigned long read_msr(unsigned long msr)
626{
627 u64 value;
628
629 rdmsrl(msr, value);
630 return value;
631}
632#endif
633
634static inline void fx_save(struct i387_fxsave_struct *image)
635{
636 asm("fxsave (%0)":: "r" (image));
637}
638
639static inline void fx_restore(struct i387_fxsave_struct *image)
640{
641 asm("fxrstor (%0)":: "r" (image));
642}
643
bc1a34f1 644static inline void fx_finit(void)
ec6d273d
ZX		 645{
646 asm("finit");
647}
648
649static inline u32 get_rdx_init_val(void)
650{
651 return 0x600; /* P6 family */
652}
653
c1a5d4f9
AK		 654static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
655{
656 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
657}
658
ec6d273d
ZX		 659#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
660#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
661#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
662#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
663#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
664#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
665#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
666#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
667#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 668#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 669#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d
ZX		 670
671#define MSR_IA32_TIME_STAMP_COUNTER 0x010
672
673#define TSS_IOPB_BASE_OFFSET 0x66
674#define TSS_BASE_SIZE 0x68
675#define TSS_IOPB_SIZE (65536 / 8)
676#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 677#define RMODE_TSS_SIZE \
678 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 679
37817f29
IE		 680enum {
681 TASK_SWITCH_CALL = 0,
682 TASK_SWITCH_IRET = 1,
683 TASK_SWITCH_JMP = 2,
684 TASK_SWITCH_GATE = 3,
685};
686
2714d1d3
FEL		 687#define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \
688 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
689 vcpu, 5, d1, d2, d3, d4, d5)
690#define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \
691 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
692 vcpu, 4, d1, d2, d3, d4, 0)
693#define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \
694 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
695 vcpu, 3, d1, d2, d3, 0, 0)
696#define KVMTRACE_2D(evt, vcpu, d1, d2, name) \
697 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
698 vcpu, 2, d1, d2, 0, 0, 0)
699#define KVMTRACE_1D(evt, vcpu, d1, name) \
700 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
701 vcpu, 1, d1, 0, 0, 0, 0)
702#define KVMTRACE_0D(evt, vcpu, name) \
703 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
704 vcpu, 0, 0, 0, 0, 0, 0)
705
4ecac3fd
AK		 706#ifdef CONFIG_64BIT
707#define KVM_EX_ENTRY ".quad"
708#else
709#define KVM_EX_ENTRY ".long"
710#endif
711
712/*
713 * Hardware virtualization extension instructions may fault if a
714 * reboot turns off virtualization while processes are running.
715 * Trap the fault and ignore the instruction if that happens.
716 */
717asmlinkage void kvm_handle_fault_on_reboot(void);
718
719#define __kvm_handle_fault_on_reboot(insn) \
720 "666: " insn "\n\t" \
721 ".pushsection .text.fixup, \"ax\" \n" \
722 "667: \n\t" \
723 "push $666b \n\t" \
724 "jmp kvm_handle_fault_on_reboot \n\t" \
725 ".popsection \n\t" \
726 ".pushsection __ex_table, \"a\" \n\t" \
727 KVM_EX_ENTRY " 666b, 667b \n\t" \
728 ".popsection"
729
043405e1 730#endif
Linux kernel - Deliverables
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