x86: rename PTE_MASK to PTE_PFN_MASK
[deliverable/linux.git] / include / asm-x86 / pgtable.h
CommitLineData
6c386655
JF
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
3
6c386655
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4#define FIRST_USER_ADDRESS 0
5
43cdf5d6
JS
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
6c386655
JF
13#define _PAGE_BIT_FILE 6
14#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
9bf5a475 15#define _PAGE_BIT_PAT 7 /* on 4KB pages */
6c386655
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16#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
17#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
18#define _PAGE_BIT_UNUSED2 10
19#define _PAGE_BIT_UNUSED3 11
9bf5a475 20#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
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21#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
22
4226ab93
JF
23#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
24#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
25#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
26#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
27#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
28#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
29#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
30#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
31#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
32#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
33#define _PAGE_UNUSED2 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED2)
34#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
35#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
36#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
6c386655
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37
38#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
4226ab93 39#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
6c386655 40#else
4226ab93 41#define _PAGE_NX (_AT(pteval_t, 0))
6c386655
JF
42#endif
43
44/* If _PAGE_PRESENT is clear, we use these: */
3cbaeafe
JP
45#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping,
46 * saved PTE; unset:swap */
6c386655
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47#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
48 pte_present gives true */
49
3cbaeafe
JP
50#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
51 _PAGE_ACCESSED | _PAGE_DIRTY)
52#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
53 _PAGE_DIRTY)
6c386655 54
86aaf4fd 55/* Set of bits not changed in pte_modify */
59438c9f 56#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
1c12c4cf 57 _PAGE_ACCESSED | _PAGE_DIRTY)
6c386655 58
2e5d9c85 59#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
60#define _PAGE_CACHE_WB (0)
61#define _PAGE_CACHE_WC (_PAGE_PWT)
62#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
63#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
64
6c386655 65#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
3cbaeafe
JP
66#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
67 _PAGE_ACCESSED | _PAGE_NX)
68
69#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
70 _PAGE_USER | _PAGE_ACCESSED)
71#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
72 _PAGE_ACCESSED | _PAGE_NX)
73#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
74 _PAGE_ACCESSED)
6c386655 75#define PAGE_COPY PAGE_COPY_NOEXEC
3cbaeafe
JP
76#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED)
6c386655 80
6c386655 81#define __PAGE_KERNEL_EXEC \
8490638c 82 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
6c386655 83#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
6c386655
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84
85#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
86#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
d2e626f4 87#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
b310f381 88#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
6c386655 89#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
d546b67a 90#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
6c386655
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91#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
92#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
93#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
3a9e189d 94#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
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95#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
96
8490638c
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97#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
98#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
99#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
100#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
101#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
102#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
103#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
104#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
105#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
3a9e189d 106#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
8490638c
JF
107#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
108#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
109#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
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110
111/* xwr */
112#define __P000 PAGE_NONE
113#define __P001 PAGE_READONLY
114#define __P010 PAGE_COPY
115#define __P011 PAGE_COPY
116#define __P100 PAGE_READONLY_EXEC
117#define __P101 PAGE_READONLY_EXEC
118#define __P110 PAGE_COPY_EXEC
119#define __P111 PAGE_COPY_EXEC
120
121#define __S000 PAGE_NONE
122#define __S001 PAGE_READONLY
123#define __S010 PAGE_SHARED
124#define __S011 PAGE_SHARED
125#define __S100 PAGE_READONLY_EXEC
126#define __S101 PAGE_READONLY_EXEC
127#define __S110 PAGE_SHARED_EXEC
128#define __S111 PAGE_SHARED_EXEC
129
4614139c 130#ifndef __ASSEMBLY__
195466dc 131
8405b122
JF
132/*
133 * ZERO_PAGE is a global shared page that is always zero: used
134 * for zero-mapped memory areas etc..
135 */
3cbaeafe 136extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
137#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
138
e3ed910d
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139extern spinlock_t pgd_lock;
140extern struct list_head pgd_list;
8405b122 141
4614139c
JF
142/*
143 * The following only work if pte_present() is true.
144 * Undefined behaviour if not..
145 */
3cbaeafe
JP
146static inline int pte_dirty(pte_t pte)
147{
a15af1c9 148 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
149}
150
151static inline int pte_young(pte_t pte)
152{
a15af1c9 153 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
154}
155
156static inline int pte_write(pte_t pte)
157{
a15af1c9 158 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
159}
160
161static inline int pte_file(pte_t pte)
162{
a15af1c9 163 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
164}
165
166static inline int pte_huge(pte_t pte)
167{
a15af1c9 168 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
169}
170
3cbaeafe
JP
171static inline int pte_global(pte_t pte)
172{
a15af1c9 173 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
174}
175
176static inline int pte_exec(pte_t pte)
177{
a15af1c9 178 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
179}
180
7e675137
NP
181static inline int pte_special(pte_t pte)
182{
183 return 0;
184}
185
3cbaeafe
JP
186static inline int pmd_large(pmd_t pte)
187{
188 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
189 (_PAGE_PSE | _PAGE_PRESENT);
190}
191
192static inline pte_t pte_mkclean(pte_t pte)
193{
4226ab93 194 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
3cbaeafe
JP
195}
196
197static inline pte_t pte_mkold(pte_t pte)
198{
4226ab93 199 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
3cbaeafe
JP
200}
201
202static inline pte_t pte_wrprotect(pte_t pte)
203{
4226ab93 204 return __pte(pte_val(pte) & ~_PAGE_RW);
3cbaeafe
JP
205}
206
207static inline pte_t pte_mkexec(pte_t pte)
208{
4226ab93 209 return __pte(pte_val(pte) & ~_PAGE_NX);
3cbaeafe
JP
210}
211
212static inline pte_t pte_mkdirty(pte_t pte)
213{
214 return __pte(pte_val(pte) | _PAGE_DIRTY);
215}
216
217static inline pte_t pte_mkyoung(pte_t pte)
218{
219 return __pte(pte_val(pte) | _PAGE_ACCESSED);
220}
221
222static inline pte_t pte_mkwrite(pte_t pte)
223{
224 return __pte(pte_val(pte) | _PAGE_RW);
225}
226
227static inline pte_t pte_mkhuge(pte_t pte)
228{
229 return __pte(pte_val(pte) | _PAGE_PSE);
230}
231
232static inline pte_t pte_clrhuge(pte_t pte)
233{
4226ab93 234 return __pte(pte_val(pte) & ~_PAGE_PSE);
3cbaeafe
JP
235}
236
237static inline pte_t pte_mkglobal(pte_t pte)
238{
239 return __pte(pte_val(pte) | _PAGE_GLOBAL);
240}
241
242static inline pte_t pte_clrglobal(pte_t pte)
243{
4226ab93 244 return __pte(pte_val(pte) & ~_PAGE_GLOBAL);
3cbaeafe 245}
4614139c 246
7e675137
NP
247static inline pte_t pte_mkspecial(pte_t pte)
248{
249 return pte;
250}
251
6fdc05d4
JF
252extern pteval_t __supported_pte_mask;
253
254static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
255{
256 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
257 pgprot_val(pgprot)) & __supported_pte_mask);
258}
259
260static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
261{
262 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
263 pgprot_val(pgprot)) & __supported_pte_mask);
264}
265
38472311
IM
266static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
267{
268 pteval_t val = pte_val(pte);
269
270 /*
271 * Chop off the NX bit (if present), and add the NX portion of
272 * the newprot (if present):
273 */
1c12c4cf
VP
274 val &= _PAGE_CHG_MASK;
275 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
38472311
IM
276
277 return __pte(val);
278}
279
1c12c4cf
VP
280/* mprotect needs to preserve PAT bits when updating vm_page_prot */
281#define pgprot_modify pgprot_modify
282static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
283{
284 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
285 pgprotval_t addbits = pgprot_val(newprot);
286 return __pgprot(preservebits | addbits);
287}
288
59438c9f 289#define pte_pgprot(x) __pgprot(pte_flags(x) & ~PTE_PFN_MASK)
c6ca18eb 290
1e8e23bc
AK
291#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
292
f0970c13 293#ifndef __ASSEMBLY__
294#define __HAVE_PHYS_MEM_ACCESS_PROT
295struct file;
296pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
297 unsigned long size, pgprot_t vma_prot);
298int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
299 unsigned long size, pgprot_t *vma_prot);
300#endif
301
d494a961
JF
302/* Install a pte for a particular vaddr in kernel space. */
303void set_pte_vaddr(unsigned long vaddr, pte_t pte);
304
a312b37b
EH
305#ifdef CONFIG_X86_32
306extern void native_pagetable_setup_start(pgd_t *base);
307extern void native_pagetable_setup_done(pgd_t *base);
308#else
309static inline void native_pagetable_setup_start(pgd_t *base) {}
310static inline void native_pagetable_setup_done(pgd_t *base) {}
311#endif
312
4891645e
JF
313#ifdef CONFIG_PARAVIRT
314#include <asm/paravirt.h>
315#else /* !CONFIG_PARAVIRT */
316#define set_pte(ptep, pte) native_set_pte(ptep, pte)
317#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
318
319#define set_pte_present(mm, addr, ptep, pte) \
320 native_set_pte_present(mm, addr, ptep, pte)
321#define set_pte_atomic(ptep, pte) \
322 native_set_pte_atomic(ptep, pte)
323
324#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
325
326#ifndef __PAGETABLE_PUD_FOLDED
327#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
328#define pgd_clear(pgd) native_pgd_clear(pgd)
329#endif
330
331#ifndef set_pud
332# define set_pud(pudp, pud) native_set_pud(pudp, pud)
333#endif
334
335#ifndef __PAGETABLE_PMD_FOLDED
336#define pud_clear(pud) native_pud_clear(pud)
337#endif
338
339#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
340#define pmd_clear(pmd) native_pmd_clear(pmd)
341
342#define pte_update(mm, addr, ptep) do { } while (0)
343#define pte_update_defer(mm, addr, ptep) do { } while (0)
a312b37b
EH
344
345static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
346{
347 native_pagetable_setup_start(base);
348}
349
350static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
351{
352 native_pagetable_setup_done(base);
353}
4891645e
JF
354#endif /* CONFIG_PARAVIRT */
355
4614139c
JF
356#endif /* __ASSEMBLY__ */
357
96a388de
TG
358#ifdef CONFIG_X86_32
359# include "pgtable_32.h"
360#else
361# include "pgtable_64.h"
362#endif
6c386655 363
fb15a9b3
JF
364/*
365 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
366 *
367 * this macro returns the index of the entry in the pgd page which would
368 * control the given virtual address
369 */
370#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
371
372/*
373 * pgd_offset() returns a (pgd_t *)
374 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
375 */
376#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
377/*
378 * a shortcut which implies the use of the kernel's pgd, instead
379 * of a process's
380 */
381#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
382
383
68db065c
JF
384#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
385#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
386
195466dc
JF
387#ifndef __ASSEMBLY__
388
30551bb3
TG
389enum {
390 PG_LEVEL_NONE,
391 PG_LEVEL_4K,
392 PG_LEVEL_2M,
86f03989 393 PG_LEVEL_1G,
ce0c0e50 394 PG_LEVEL_NUM
30551bb3
TG
395};
396
65280e61
TG
397#ifdef CONFIG_PROC_FS
398extern void update_page_count(int level, unsigned long pages);
399#else
400static inline void update_page_count(int level, unsigned long pages) { }
401#endif
ce0c0e50 402
0a663088
TG
403/*
404 * Helper function that returns the kernel pagetable entry controlling
405 * the virtual address 'address'. NULL means no pagetable entry present.
406 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
407 * as a pte too.
408 */
da7bfc50 409extern pte_t *lookup_address(unsigned long address, unsigned int *level);
0a663088 410
4891645e
JF
411/* local pte updates need not use xchg for locking */
412static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
413{
414 pte_t res = *ptep;
415
416 /* Pure native function needs no input for mm, addr */
417 native_pte_clear(NULL, 0, ptep);
418 return res;
419}
420
421static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
422 pte_t *ptep , pte_t pte)
423{
424 native_set_pte(ptep, pte);
425}
426
195466dc
JF
427#ifndef CONFIG_PARAVIRT
428/*
429 * Rules for using pte_update - it must be called after any PTE update which
430 * has not been done using the set_pte / clear_pte interfaces. It is used by
431 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
432 * updates should either be sets, clears, or set_pte_atomic for P->P
433 * transitions, which means this hook should only be called for user PTEs.
434 * This hook implies a P->P protection or access change has taken place, which
435 * requires a subsequent TLB flush. The notification can optionally be delayed
436 * until the TLB flush event by using the pte_update_defer form of the
437 * interface, but care must be taken to assure that the flush happens while
438 * still holding the same page table lock so that the shadow and primary pages
439 * do not become out of sync on SMP.
440 */
441#define pte_update(mm, addr, ptep) do { } while (0)
442#define pte_update_defer(mm, addr, ptep) do { } while (0)
443#endif
444
195466dc
JF
445/*
446 * We only update the dirty/accessed state if we set
447 * the dirty bit by hand in the kernel, since the hardware
448 * will do the accessed bit for us, and we don't want to
449 * race with other CPU's that might be updating the dirty
450 * bit at the same time.
451 */
bea41808
JF
452struct vm_area_struct;
453
195466dc 454#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
455extern int ptep_set_access_flags(struct vm_area_struct *vma,
456 unsigned long address, pte_t *ptep,
457 pte_t entry, int dirty);
195466dc
JF
458
459#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
460extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
461 unsigned long addr, pte_t *ptep);
195466dc
JF
462
463#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
464extern int ptep_clear_flush_young(struct vm_area_struct *vma,
465 unsigned long address, pte_t *ptep);
195466dc
JF
466
467#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
468static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
469 pte_t *ptep)
195466dc
JF
470{
471 pte_t pte = native_ptep_get_and_clear(ptep);
472 pte_update(mm, addr, ptep);
473 return pte;
474}
475
476#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
477static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
478 unsigned long addr, pte_t *ptep,
479 int full)
195466dc
JF
480{
481 pte_t pte;
482 if (full) {
483 /*
484 * Full address destruction in progress; paravirt does not
485 * care about updates and native needs no locking
486 */
487 pte = native_local_ptep_get_and_clear(ptep);
488 } else {
489 pte = ptep_get_and_clear(mm, addr, ptep);
490 }
491 return pte;
492}
493
494#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
495static inline void ptep_set_wrprotect(struct mm_struct *mm,
496 unsigned long addr, pte_t *ptep)
195466dc 497{
d8d89827 498 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
499 pte_update(mm, addr, ptep);
500}
501
85958b46
JF
502/*
503 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
504 *
505 * dst - pointer to pgd range anwhere on a pgd page
506 * src - ""
507 * count - the number of pgds to copy.
508 *
509 * dst and src can be on the same page, but the range must not overlap,
510 * and must not cross a page boundary.
511 */
512static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
513{
514 memcpy(dst, src, count * sizeof(pgd_t));
515}
516
517
195466dc
JF
518#include <asm-generic/pgtable.h>
519#endif /* __ASSEMBLY__ */
520
6c386655 521#endif /* _ASM_X86_PGTABLE_H */
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