Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef __ASM_SMP_H |
2 | #define __ASM_SMP_H | |
3 | ||
ae9d983b TG |
4 | #ifndef __ASSEMBLY__ |
5 | #include <linux/cpumask.h> | |
6 | #include <linux/init.h> | |
7 | ||
1da177e4 LT |
8 | /* |
9 | * We need the APIC definitions automatically as part of 'smp.h' | |
10 | */ | |
ae9d983b TG |
11 | #ifdef CONFIG_X86_LOCAL_APIC |
12 | # include <asm/mpspec.h> | |
13 | # include <asm/apic.h> | |
14 | # ifdef CONFIG_X86_IO_APIC | |
15 | # include <asm/io_apic.h> | |
16 | # endif | |
1da177e4 LT |
17 | #endif |
18 | ||
ae9d983b | 19 | extern cpumask_t cpu_callin_map; |
1da177e4 | 20 | |
1da177e4 LT |
21 | extern void (*mtrr_hook) (void); |
22 | extern void zap_low_mappings (void); | |
23 | ||
5382e896 | 24 | extern u16 __initdata x86_cpu_to_apicid_init[]; |
3b419089 | 25 | extern void *x86_cpu_to_apicid_early_ptr; |
b4033c17 | 26 | |
ae9d983b TG |
27 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
28 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); | |
5382e896 GC |
29 | DECLARE_PER_CPU(u16, cpu_llc_id); |
30 | DECLARE_PER_CPU(u16, x86_cpu_to_apicid); | |
c70df743 | 31 | |
ae9d983b | 32 | #ifdef CONFIG_SMP |
ae5da273 | 33 | #ifndef CONFIG_PARAVIRT |
ae9d983b | 34 | #define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0) |
ae5da273 ZA |
35 | #endif |
36 | ||
ae9d983b TG |
37 | extern int __cpu_disable(void); |
38 | extern void __cpu_die(unsigned int cpu); | |
39 | ||
1da177e4 LT |
40 | /* |
41 | * This function is needed by all SMP systems. It must _always_ be valid | |
42 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
43 | * so this is correct in the x86 case. | |
44 | */ | |
7c3576d2 JF |
45 | DECLARE_PER_CPU(int, cpu_number); |
46 | #define raw_smp_processor_id() (x86_read_percpu(cpu_number)) | |
1da177e4 | 47 | |
ae9d983b TG |
48 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
49 | ||
50 | extern int safe_smp_processor_id(void); | |
51 | ||
52 | void __cpuinit smp_store_cpu_info(int id); | |
1da177e4 LT |
53 | |
54 | /* We don't mark CPUs online until __cpu_up(), so we need another measure */ | |
55 | static inline int num_booting_cpus(void) | |
56 | { | |
57 | return cpus_weight(cpu_callout_map); | |
58 | } | |
59 | ||
b4033c17 AR |
60 | #else /* CONFIG_SMP */ |
61 | ||
dc2bc768 | 62 | #define safe_smp_processor_id() 0 |
b4033c17 AR |
63 | #define cpu_physical_id(cpu) boot_cpu_physical_apicid |
64 | ||
ae9d983b | 65 | #endif /* !CONFIG_SMP */ |
815a965b | 66 | |
a36166c6 FLVC |
67 | #ifdef CONFIG_X86_LOCAL_APIC |
68 | ||
ae9d983b TG |
69 | static __inline int logical_smp_processor_id(void) |
70 | { | |
71 | /* we don't want to mark this access volatile - bad code generation */ | |
72 | return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); | |
73 | } | |
74 | ||
75 | # ifdef APIC_DEFINITION | |
a36166c6 | 76 | extern int hard_smp_processor_id(void); |
ae9d983b TG |
77 | # else |
78 | # include <mach_apicdef.h> | |
a36166c6 FLVC |
79 | static inline int hard_smp_processor_id(void) |
80 | { | |
81 | /* we don't want to mark this access volatile - bad code generation */ | |
ae9d983b | 82 | return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID)); |
a36166c6 | 83 | } |
ae9d983b | 84 | # endif /* APIC_DEFINITION */ |
a36166c6 FLVC |
85 | |
86 | #else /* CONFIG_X86_LOCAL_APIC */ | |
87 | ||
ae9d983b TG |
88 | # ifndef CONFIG_SMP |
89 | # define hard_smp_processor_id() 0 | |
90 | # endif | |
a36166c6 FLVC |
91 | |
92 | #endif /* CONFIG_X86_LOCAL_APIC */ | |
93 | ||
ae9d983b | 94 | #endif /* !ASSEMBLY */ |
1da177e4 | 95 | #endif |