Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef AGP_H |
2 | #define AGP_H 1 | |
3 | ||
4 | #include <asm/cacheflush.h> | |
5 | ||
6 | /* | |
7 | * Functions to keep the agpgart mappings coherent. | |
8 | * The GART gives the CPU a physical alias of memory. The alias is | |
9 | * mapped uncacheable. Make sure there are no conflicting mappings | |
10 | * with different cachability attributes for the same page. | |
11 | */ | |
12 | ||
13 | int map_page_into_agp(struct page *page); | |
14 | int unmap_page_from_agp(struct page *page); | |
15 | #define flush_agp_mappings() global_flush_tlb() | |
16 | ||
17 | /* Could use CLFLUSH here if the cpu supports it. But then it would | |
18 | need to be called for each cacheline of the whole page so it may not be | |
19 | worth it. Would need a page for it. */ | |
20 | #define flush_agp_cache() asm volatile("wbinvd":::"memory") | |
21 | ||
22 | #endif |