[deliverable/linux.git] / include / asm-x86_64 / apic.h

#ifndef __ASM_APIC_H
#define __ASM_APIC_H

#include <linux/config.h>
#include <linux/pm.h>
#include <asm/fixmap.h>
#include <asm/apicdef.h>
#include <asm/system.h>

#define Dprintk(x...)

/*
 * Debugging macros
 */
#define APIC_QUIET   0
#define APIC_VERBOSE 1
#define APIC_DEBUG   2

extern int apic_verbosity;

/*
 * Define the default level of output to be very little
 * This can be turned up by using apic=verbose for more
 * information and apic=debug for _lots_ of information.
 * apic_verbosity is defined in apic.c
 */
#define apic_printk(v, s, a...) do {       \
		if ((v) <= apic_verbosity) \
			printk(s, ##a);    \
	} while (0)

#ifdef CONFIG_X86_LOCAL_APIC

struct pt_regs;

/*
 * Basic functions accessing APICs.
 */

static __inline void apic_write(unsigned long reg, unsigned int v)
{
	*((volatile unsigned int *)(APIC_BASE+reg)) = v;
}

static __inline unsigned int apic_read(unsigned long reg)
{
	return *((volatile unsigned int *)(APIC_BASE+reg));
}

static __inline__ void apic_wait_icr_idle(void)
{
	while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
}

static inline void ack_APIC_irq(void)
{
	/*
	 * ack_APIC_irq() actually gets compiled as a single instruction:
	 * - a single rmw on Pentium/82489DX
	 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
	 * ... yummie.
	 */

	/* Docs say use 0 for future compatibility */
	apic_write(APIC_EOI, 0);
}

extern int get_maxlvt (void);
extern void clear_local_APIC (void);
extern void connect_bsp_APIC (void);
extern void disconnect_bsp_APIC (int virt_wire_setup);
extern void disable_local_APIC (void);
extern int verify_local_APIC (void);
extern void cache_APIC_registers (void);
extern void sync_Arb_IDs (void);
extern void init_bsp_APIC (void);
extern void setup_local_APIC (void);
extern void init_apic_mappings (void);
extern void smp_local_timer_interrupt (struct pt_regs * regs);
extern void setup_boot_APIC_clock (void);
extern void setup_secondary_APIC_clock (void);
extern void setup_apic_nmi_watchdog (void);
extern int reserve_lapic_nmi(void);
extern void release_lapic_nmi(void);
extern void disable_timer_nmi_watchdog(void);
extern void enable_timer_nmi_watchdog(void);
extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
extern int APIC_init_uniprocessor (void);
extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
extern void clustered_apic_check(void);

extern void nmi_watchdog_default(void);
extern int setup_nmi_watchdog(char *);

extern unsigned int nmi_watchdog;
#define NMI_DEFAULT	-1
#define NMI_NONE	0
#define NMI_IO_APIC	1
#define NMI_LOCAL_APIC	2
#define NMI_INVALID	3

extern int disable_timer_pin_1;

extern void setup_threshold_lvt(unsigned long lvt_off);

void smp_send_timer_broadcast_ipi(void);
void switch_APIC_timer_to_ipi(void *cpumask);
void switch_ipi_to_APIC_timer(void *cpumask);

#define ARCH_APICTIMER_STOPS_ON_C3	1

#endif /* CONFIG_X86_LOCAL_APIC */

extern unsigned boot_cpu_id;

#endif /* __ASM_APIC_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_APIC_H
	2	#define __ASM_APIC_H
	3
	4	#include <linux/config.h>
	5	#include <linux/pm.h>
	6	#include <asm/fixmap.h>
	7	#include <asm/apicdef.h>
	8	#include <asm/system.h>
	9
	10	#define Dprintk(x...)
	11
	12	/*
	13	* Debugging macros
	14	*/
	15	#define APIC_QUIET 0
	16	#define APIC_VERBOSE 1
	17	#define APIC_DEBUG 2
	18
	19	extern int apic_verbosity;
	20
	21	/*
	22	* Define the default level of output to be very little
	23	* This can be turned up by using apic=verbose for more
	24	* information and apic=debug for _lots_ of information.
	25	* apic_verbosity is defined in apic.c
	26	*/
	27	#define apic_printk(v, s, a...) do { \
	28	if ((v) <= apic_verbosity) \
	29	printk(s, ##a); \
	30	} while (0)
	31
	32	#ifdef CONFIG_X86_LOCAL_APIC
	33
	34	struct pt_regs;
	35
	36	/*
	37	* Basic functions accessing APICs.
	38	*/
	39
	40	static __inline void apic_write(unsigned long reg, unsigned int v)
	41	{
	42	((volatile unsigned int )(APIC_BASE+reg)) = v;
	43	}
	44
1da177e4 LT	45	static __inline unsigned int apic_read(unsigned long reg)
	46	{
	47	return ((volatile unsigned int )(APIC_BASE+reg));
	48	}
	49
	50	static __inline__ void apic_wait_icr_idle(void)
	51	{
	52	while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
	53	}
	54
1da177e4 LT	55	static inline void ack_APIC_irq(void)
	56	{
	57	/*
	58	* ack_APIC_irq() actually gets compiled as a single instruction:
	59	* - a single rmw on Pentium/82489DX
	60	* - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
	61	* ... yummie.
	62	*/
	63
	64	/* Docs say use 0 for future compatibility */
11a8e778	65	apic_write(APIC_EOI, 0);
1da177e4 LT	66	}
	67
	68	extern int get_maxlvt (void);
	69	extern void clear_local_APIC (void);
	70	extern void connect_bsp_APIC (void);
208fb931	71	extern void disconnect_bsp_APIC (int virt_wire_setup);
1da177e4 LT	72	extern void disable_local_APIC (void);
	73	extern int verify_local_APIC (void);
	74	extern void cache_APIC_registers (void);
	75	extern void sync_Arb_IDs (void);
	76	extern void init_bsp_APIC (void);
	77	extern void setup_local_APIC (void);
	78	extern void init_apic_mappings (void);
	79	extern void smp_local_timer_interrupt (struct pt_regs * regs);
	80	extern void setup_boot_APIC_clock (void);
	81	extern void setup_secondary_APIC_clock (void);
	82	extern void setup_apic_nmi_watchdog (void);
	83	extern int reserve_lapic_nmi(void);
	84	extern void release_lapic_nmi(void);
	85	extern void disable_timer_nmi_watchdog(void);
	86	extern void enable_timer_nmi_watchdog(void);
	87	extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
	88	extern int APIC_init_uniprocessor (void);
	89	extern void disable_APIC_timer(void);
	90	extern void enable_APIC_timer(void);
	91	extern void clustered_apic_check(void);
	92
1da177e4 LT	93	extern void nmi_watchdog_default(void);
	94	extern int setup_nmi_watchdog(char *);
	95
	96	extern unsigned int nmi_watchdog;
	97	#define NMI_DEFAULT -1
	98	#define NMI_NONE 0
	99	#define NMI_IO_APIC 1
	100	#define NMI_LOCAL_APIC 2
	101	#define NMI_INVALID 3
	102
66759a01 CE	103	extern int disable_timer_pin_1;
66759a01 CE	104
89b831ef JS	105	extern void setup_threshold_lvt(unsigned long lvt_off);
89b831ef JS	106
d25bf7e5 VP	107	void smp_send_timer_broadcast_ipi(void);
	108	void switch_APIC_timer_to_ipi(void *cpumask);
	109	void switch_ipi_to_APIC_timer(void *cpumask);
	110
	111	#define ARCH_APICTIMER_STOPS_ON_C3 1
	112
1da177e4 LT	113	#endif /* CONFIG_X86_LOCAL_APIC */
1da177e4 LT	114
1da177e4 LT	115	extern unsigned boot_cpu_id;
	116
	117	#endif /* __ASM_APIC_H */