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9a8fd558 | 1 | /* |
f30c2269 | 2 | * include/asm-xtensa/cache.h |
9a8fd558 CZ |
3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
9a8fd558 CZ |
7 | * |
8 | * (C) 2001 - 2005 Tensilica Inc. | |
9 | */ | |
10 | ||
11 | #ifndef _XTENSA_CACHE_H | |
12 | #define _XTENSA_CACHE_H | |
13 | ||
173d6681 | 14 | #include <asm/variant/core.h> |
9a8fd558 | 15 | |
173d6681 CZ |
16 | #define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH |
17 | #define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE | |
18 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | |
9a8fd558 | 19 | |
173d6681 CZ |
20 | #define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS) |
21 | #define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS) | |
6656920b CZ |
22 | #define DCACHE_WAY_SHIFT (XCHAL_DCACHE_SETWIDTH + XCHAL_DCACHE_LINEWIDTH) |
23 | #define ICACHE_WAY_SHIFT (XCHAL_ICACHE_SETWIDTH + XCHAL_ICACHE_LINEWIDTH) | |
24 | ||
25 | /* Maximum cache size per way. */ | |
26 | #if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE | |
27 | # define CACHE_WAY_SIZE DCACHE_WAY_SIZE | |
28 | #else | |
29 | # define CACHE_WAY_SIZE ICACHE_WAY_SIZE | |
30 | #endif | |
9a8fd558 | 31 | |
9a8fd558 CZ |
32 | |
33 | #endif /* _XTENSA_CACHE_H */ |