Commit | Line | Data |
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9a8fd558 | 1 | /* |
f30c2269 | 2 | * include/asm-xtensa/cache.h |
9a8fd558 CZ |
3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | * | |
9 | * (C) 2001 - 2005 Tensilica Inc. | |
10 | */ | |
11 | ||
12 | #ifndef _XTENSA_CACHE_H | |
13 | #define _XTENSA_CACHE_H | |
14 | ||
15 | #include <xtensa/config/core.h> | |
16 | ||
17 | #if XCHAL_ICACHE_SIZE > 0 | |
18 | # if (XCHAL_ICACHE_SIZE % (XCHAL_ICACHE_LINESIZE*XCHAL_ICACHE_WAYS*4)) != 0 | |
19 | # error cache configuration outside expected/supported range! | |
20 | # endif | |
21 | #endif | |
22 | ||
23 | #if XCHAL_DCACHE_SIZE > 0 | |
24 | # if (XCHAL_DCACHE_SIZE % (XCHAL_DCACHE_LINESIZE*XCHAL_DCACHE_WAYS*4)) != 0 | |
25 | # error cache configuration outside expected/supported range! | |
26 | # endif | |
27 | #endif | |
28 | ||
29 | #define L1_CACHE_SHIFT XCHAL_CACHE_LINEWIDTH_MAX | |
30 | #define L1_CACHE_BYTES XCHAL_CACHE_LINESIZE_MAX | |
31 | ||
32 | #endif /* _XTENSA_CACHE_H */ |