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1 | /* |
2 | * include/asm-xtensa/processor.h | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | |
9 | */ | |
10 | ||
11 | #ifndef _XTENSA_PROCESSOR_H | |
12 | #define _XTENSA_PROCESSOR_H | |
13 | ||
14 | #ifdef __ASSEMBLY__ | |
15 | #define _ASMLANGUAGE | |
16 | #endif | |
17 | ||
18 | #include <xtensa/config/core.h> | |
19 | #include <xtensa/config/specreg.h> | |
20 | #include <xtensa/config/tie.h> | |
21 | #include <xtensa/config/system.h> | |
22 | ||
f6dc8c5b | 23 | #include <linux/compiler.h> |
9a8fd558 CZ |
24 | #include <asm/ptrace.h> |
25 | #include <asm/types.h> | |
26 | #include <asm/coprocessor.h> | |
27 | ||
28 | /* Assertions. */ | |
29 | ||
30 | #if (XCHAL_HAVE_WINDOWED != 1) | |
31 | #error Linux requires the Xtensa Windowed Registers Option. | |
32 | #endif | |
33 | ||
34 | /* | |
35 | * User space process size: 1 GB. | |
36 | * Windowed call ABI requires caller and callee to be located within the same | |
37 | * 1 GB region. The C compiler places trampoline code on the stack for sources | |
38 | * that take the address of a nested C function (a feature used by glibc), so | |
39 | * the 1 GB requirement applies to the stack as well. | |
40 | */ | |
41 | ||
42 | #define TASK_SIZE 0x40000000 | |
43 | ||
44 | /* | |
45 | * General exception cause assigned to debug exceptions. Debug exceptions go | |
46 | * to their own vector, rather than the general exception vectors (user, | |
47 | * kernel, double); and their specific causes are reported via DEBUGCAUSE | |
48 | * rather than EXCCAUSE. However it is sometimes convenient to redirect debug | |
49 | * exceptions to the general exception mechanism. To do this, an otherwise | |
50 | * unused EXCCAUSE value was assigned to debug exceptions for this purpose. | |
51 | */ | |
52 | ||
53 | #define EXCCAUSE_MAPPED_DEBUG 63 | |
54 | ||
55 | /* | |
56 | * We use DEPC also as a flag to distinguish between double and regular | |
57 | * exceptions. For performance reasons, DEPC might contain the value of | |
58 | * EXCCAUSE for regular exceptions, so we use this definition to mark a | |
59 | * valid double exception address. | |
60 | * (Note: We use it in bgeui, so it should be 64, 128, or 256) | |
61 | */ | |
62 | ||
63 | #define VALID_DOUBLE_EXCEPTION_ADDRESS 64 | |
64 | ||
65 | /* LOCKLEVEL defines the interrupt level that masks all | |
66 | * general-purpose interrupts. | |
67 | */ | |
68 | #define LOCKLEVEL 1 | |
69 | ||
70 | /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE | |
71 | * registers | |
72 | */ | |
73 | #define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */ | |
74 | #define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */ | |
75 | ||
76 | #ifndef __ASSEMBLY__ | |
77 | ||
78 | /* Build a valid return address for the specified call winsize. | |
79 | * winsize must be 1 (call4), 2 (call8), or 3 (call12) | |
80 | */ | |
81 | #define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30) | |
82 | ||
83 | /* Convert return address to a valid pc | |
84 | * Note: We assume that the stack pointer is in the same 1GB ranges as the ra | |
85 | */ | |
86 | #define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000)) | |
87 | ||
88 | typedef struct { | |
89 | unsigned long seg; | |
90 | } mm_segment_t; | |
91 | ||
92 | struct thread_struct { | |
93 | ||
94 | /* kernel's return address and stack pointer for context switching */ | |
95 | unsigned long ra; /* kernel's a0: return address and window call size */ | |
96 | unsigned long sp; /* kernel's a1: stack pointer */ | |
97 | ||
98 | mm_segment_t current_ds; /* see uaccess.h for example uses */ | |
99 | ||
100 | /* struct xtensa_cpuinfo info; */ | |
101 | ||
102 | unsigned long bad_vaddr; /* last user fault */ | |
103 | unsigned long bad_uaddr; /* last kernel fault accessing user space */ | |
104 | unsigned long error_code; | |
105 | ||
106 | unsigned long ibreak[XCHAL_NUM_IBREAK]; | |
107 | unsigned long dbreaka[XCHAL_NUM_DBREAK]; | |
108 | unsigned long dbreakc[XCHAL_NUM_DBREAK]; | |
109 | ||
110 | /* Allocate storage for extra state and coprocessor state. */ | |
111 | unsigned char cp_save[XTENSA_CP_EXTRA_SIZE] | |
112 | __attribute__ ((aligned(XTENSA_CP_EXTRA_ALIGN))); | |
113 | ||
114 | /* Make structure 16 bytes aligned. */ | |
115 | int align[0] __attribute__ ((aligned(16))); | |
116 | }; | |
117 | ||
118 | ||
119 | /* | |
120 | * Default implementation of macro that returns current | |
121 | * instruction pointer ("program counter"). | |
122 | */ | |
123 | #define current_text_addr() ({ __label__ _l; _l: &&_l;}) | |
124 | ||
125 | ||
126 | /* This decides where the kernel will search for a free chunk of vm | |
127 | * space during mmap's. | |
128 | */ | |
129 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 2) | |
130 | ||
131 | #define INIT_THREAD \ | |
132 | { \ | |
133 | ra: 0, \ | |
134 | sp: sizeof(init_stack) + (long) &init_stack, \ | |
135 | current_ds: {0}, \ | |
136 | /*info: {0}, */ \ | |
137 | bad_vaddr: 0, \ | |
138 | bad_uaddr: 0, \ | |
139 | error_code: 0, \ | |
140 | } | |
141 | ||
142 | ||
143 | /* | |
144 | * Do necessary setup to start up a newly executed thread. | |
145 | * Note: We set-up ps as if we did a call4 to the new pc. | |
146 | * set_thread_state in signal.c depends on it. | |
147 | */ | |
148 | #define USER_PS_VALUE ( (1 << XCHAL_PS_WOE_SHIFT) + \ | |
149 | (1 << XCHAL_PS_CALLINC_SHIFT) + \ | |
150 | (USER_RING << XCHAL_PS_RING_SHIFT) + \ | |
151 | (1 << XCHAL_PS_PROGSTACK_SHIFT) + \ | |
152 | (1 << XCHAL_PS_EXCM_SHIFT) ) | |
153 | ||
154 | /* Clearing a0 terminates the backtrace. */ | |
155 | #define start_thread(regs, new_pc, new_sp) \ | |
156 | regs->pc = new_pc; \ | |
157 | regs->ps = USER_PS_VALUE; \ | |
158 | regs->areg[1] = new_sp; \ | |
159 | regs->areg[0] = 0; \ | |
160 | regs->wmask = 1; \ | |
161 | regs->depc = 0; \ | |
162 | regs->windowbase = 0; \ | |
163 | regs->windowstart = 1; | |
164 | ||
165 | /* Forward declaration */ | |
166 | struct task_struct; | |
167 | struct mm_struct; | |
168 | ||
169 | // FIXME: do we need release_thread for CP?? | |
170 | /* Free all resources held by a thread. */ | |
171 | #define release_thread(thread) do { } while(0) | |
172 | ||
173 | // FIXME: do we need prepare_to_copy (lazy status) for CP?? | |
174 | /* Prepare to copy thread state - unlazy all lazy status */ | |
175 | #define prepare_to_copy(tsk) do { } while (0) | |
176 | ||
177 | /* | |
178 | * create a kernel thread without removing it from tasklists | |
179 | */ | |
180 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | |
181 | ||
182 | /* Copy and release all segment info associated with a VM */ | |
183 | ||
184 | #define copy_segments(p, mm) do { } while(0) | |
185 | #define release_segments(mm) do { } while(0) | |
186 | #define forget_segments() do { } while (0) | |
187 | ||
04fe6faf | 188 | #define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc) |
9a8fd558 CZ |
189 | |
190 | extern unsigned long get_wchan(struct task_struct *p); | |
191 | ||
04fe6faf AV |
192 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) |
193 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1]) | |
9a8fd558 | 194 | |
f6dc8c5b | 195 | #define cpu_relax() barrier() |
9a8fd558 CZ |
196 | |
197 | /* Special register access. */ | |
198 | ||
199 | #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v)); | |
200 | #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v)); | |
201 | ||
202 | #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);}) | |
203 | #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; }) | |
204 | ||
205 | #endif /* __ASSEMBLY__ */ | |
206 | #endif /* _XTENSA_PROCESSOR_H */ |