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1 | /* |
2 | * include/asm-xtensa/processor.h | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | |
9 | */ | |
10 | ||
11 | #ifndef _XTENSA_PROCESSOR_H | |
12 | #define _XTENSA_PROCESSOR_H | |
13 | ||
14 | #ifdef __ASSEMBLY__ | |
15 | #define _ASMLANGUAGE | |
16 | #endif | |
17 | ||
18 | #include <xtensa/config/core.h> | |
19 | #include <xtensa/config/specreg.h> | |
20 | #include <xtensa/config/tie.h> | |
21 | #include <xtensa/config/system.h> | |
22 | ||
23 | #include <asm/ptrace.h> | |
24 | #include <asm/types.h> | |
25 | #include <asm/coprocessor.h> | |
26 | ||
27 | /* Assertions. */ | |
28 | ||
29 | #if (XCHAL_HAVE_WINDOWED != 1) | |
30 | #error Linux requires the Xtensa Windowed Registers Option. | |
31 | #endif | |
32 | ||
33 | /* | |
34 | * User space process size: 1 GB. | |
35 | * Windowed call ABI requires caller and callee to be located within the same | |
36 | * 1 GB region. The C compiler places trampoline code on the stack for sources | |
37 | * that take the address of a nested C function (a feature used by glibc), so | |
38 | * the 1 GB requirement applies to the stack as well. | |
39 | */ | |
40 | ||
41 | #define TASK_SIZE 0x40000000 | |
42 | ||
43 | /* | |
44 | * General exception cause assigned to debug exceptions. Debug exceptions go | |
45 | * to their own vector, rather than the general exception vectors (user, | |
46 | * kernel, double); and their specific causes are reported via DEBUGCAUSE | |
47 | * rather than EXCCAUSE. However it is sometimes convenient to redirect debug | |
48 | * exceptions to the general exception mechanism. To do this, an otherwise | |
49 | * unused EXCCAUSE value was assigned to debug exceptions for this purpose. | |
50 | */ | |
51 | ||
52 | #define EXCCAUSE_MAPPED_DEBUG 63 | |
53 | ||
54 | /* | |
55 | * We use DEPC also as a flag to distinguish between double and regular | |
56 | * exceptions. For performance reasons, DEPC might contain the value of | |
57 | * EXCCAUSE for regular exceptions, so we use this definition to mark a | |
58 | * valid double exception address. | |
59 | * (Note: We use it in bgeui, so it should be 64, 128, or 256) | |
60 | */ | |
61 | ||
62 | #define VALID_DOUBLE_EXCEPTION_ADDRESS 64 | |
63 | ||
64 | /* LOCKLEVEL defines the interrupt level that masks all | |
65 | * general-purpose interrupts. | |
66 | */ | |
67 | #define LOCKLEVEL 1 | |
68 | ||
69 | /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE | |
70 | * registers | |
71 | */ | |
72 | #define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */ | |
73 | #define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */ | |
74 | ||
75 | #ifndef __ASSEMBLY__ | |
76 | ||
77 | /* Build a valid return address for the specified call winsize. | |
78 | * winsize must be 1 (call4), 2 (call8), or 3 (call12) | |
79 | */ | |
80 | #define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30) | |
81 | ||
82 | /* Convert return address to a valid pc | |
83 | * Note: We assume that the stack pointer is in the same 1GB ranges as the ra | |
84 | */ | |
85 | #define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000)) | |
86 | ||
87 | typedef struct { | |
88 | unsigned long seg; | |
89 | } mm_segment_t; | |
90 | ||
91 | struct thread_struct { | |
92 | ||
93 | /* kernel's return address and stack pointer for context switching */ | |
94 | unsigned long ra; /* kernel's a0: return address and window call size */ | |
95 | unsigned long sp; /* kernel's a1: stack pointer */ | |
96 | ||
97 | mm_segment_t current_ds; /* see uaccess.h for example uses */ | |
98 | ||
99 | /* struct xtensa_cpuinfo info; */ | |
100 | ||
101 | unsigned long bad_vaddr; /* last user fault */ | |
102 | unsigned long bad_uaddr; /* last kernel fault accessing user space */ | |
103 | unsigned long error_code; | |
104 | ||
105 | unsigned long ibreak[XCHAL_NUM_IBREAK]; | |
106 | unsigned long dbreaka[XCHAL_NUM_DBREAK]; | |
107 | unsigned long dbreakc[XCHAL_NUM_DBREAK]; | |
108 | ||
109 | /* Allocate storage for extra state and coprocessor state. */ | |
110 | unsigned char cp_save[XTENSA_CP_EXTRA_SIZE] | |
111 | __attribute__ ((aligned(XTENSA_CP_EXTRA_ALIGN))); | |
112 | ||
113 | /* Make structure 16 bytes aligned. */ | |
114 | int align[0] __attribute__ ((aligned(16))); | |
115 | }; | |
116 | ||
117 | ||
118 | /* | |
119 | * Default implementation of macro that returns current | |
120 | * instruction pointer ("program counter"). | |
121 | */ | |
122 | #define current_text_addr() ({ __label__ _l; _l: &&_l;}) | |
123 | ||
124 | ||
125 | /* This decides where the kernel will search for a free chunk of vm | |
126 | * space during mmap's. | |
127 | */ | |
128 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 2) | |
129 | ||
130 | #define INIT_THREAD \ | |
131 | { \ | |
132 | ra: 0, \ | |
133 | sp: sizeof(init_stack) + (long) &init_stack, \ | |
134 | current_ds: {0}, \ | |
135 | /*info: {0}, */ \ | |
136 | bad_vaddr: 0, \ | |
137 | bad_uaddr: 0, \ | |
138 | error_code: 0, \ | |
139 | } | |
140 | ||
141 | ||
142 | /* | |
143 | * Do necessary setup to start up a newly executed thread. | |
144 | * Note: We set-up ps as if we did a call4 to the new pc. | |
145 | * set_thread_state in signal.c depends on it. | |
146 | */ | |
147 | #define USER_PS_VALUE ( (1 << XCHAL_PS_WOE_SHIFT) + \ | |
148 | (1 << XCHAL_PS_CALLINC_SHIFT) + \ | |
149 | (USER_RING << XCHAL_PS_RING_SHIFT) + \ | |
150 | (1 << XCHAL_PS_PROGSTACK_SHIFT) + \ | |
151 | (1 << XCHAL_PS_EXCM_SHIFT) ) | |
152 | ||
153 | /* Clearing a0 terminates the backtrace. */ | |
154 | #define start_thread(regs, new_pc, new_sp) \ | |
155 | regs->pc = new_pc; \ | |
156 | regs->ps = USER_PS_VALUE; \ | |
157 | regs->areg[1] = new_sp; \ | |
158 | regs->areg[0] = 0; \ | |
159 | regs->wmask = 1; \ | |
160 | regs->depc = 0; \ | |
161 | regs->windowbase = 0; \ | |
162 | regs->windowstart = 1; | |
163 | ||
164 | /* Forward declaration */ | |
165 | struct task_struct; | |
166 | struct mm_struct; | |
167 | ||
168 | // FIXME: do we need release_thread for CP?? | |
169 | /* Free all resources held by a thread. */ | |
170 | #define release_thread(thread) do { } while(0) | |
171 | ||
172 | // FIXME: do we need prepare_to_copy (lazy status) for CP?? | |
173 | /* Prepare to copy thread state - unlazy all lazy status */ | |
174 | #define prepare_to_copy(tsk) do { } while (0) | |
175 | ||
176 | /* | |
177 | * create a kernel thread without removing it from tasklists | |
178 | */ | |
179 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | |
180 | ||
181 | /* Copy and release all segment info associated with a VM */ | |
182 | ||
183 | #define copy_segments(p, mm) do { } while(0) | |
184 | #define release_segments(mm) do { } while(0) | |
185 | #define forget_segments() do { } while (0) | |
186 | ||
187 | #define thread_saved_pc(tsk) (xtensa_pt_regs(tsk)->pc) | |
188 | ||
189 | extern unsigned long get_wchan(struct task_struct *p); | |
190 | ||
191 | #define KSTK_EIP(tsk) (xtensa_pt_regs(tsk)->pc) | |
192 | #define KSTK_ESP(tsk) (xtensa_pt_regs(tsk)->areg[1]) | |
193 | ||
194 | #define cpu_relax() do { } while (0) | |
195 | ||
196 | /* Special register access. */ | |
197 | ||
198 | #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v)); | |
199 | #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v)); | |
200 | ||
201 | #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);}) | |
202 | #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; }) | |
203 | ||
204 | #endif /* __ASSEMBLY__ */ | |
205 | #endif /* _XTENSA_PROCESSOR_H */ |