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b21f4b65 AY |
1 | /* |
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #ifndef __DW_HDMI__ | |
11 | #define __DW_HDMI__ | |
12 | ||
13 | #include <drm/drmP.h> | |
14 | ||
b5814fff RK |
15 | struct dw_hdmi; |
16 | ||
b21f4b65 AY |
17 | enum { |
18 | DW_HDMI_RES_8, | |
19 | DW_HDMI_RES_10, | |
20 | DW_HDMI_RES_12, | |
21 | DW_HDMI_RES_MAX, | |
22 | }; | |
23 | ||
24 | enum dw_hdmi_devtype { | |
25 | IMX6Q_HDMI, | |
26 | IMX6DL_HDMI, | |
12b9f204 | 27 | RK3288_HDMI, |
b21f4b65 AY |
28 | }; |
29 | ||
30 | struct dw_hdmi_mpll_config { | |
31 | unsigned long mpixelclock; | |
32 | struct { | |
33 | u16 cpce; | |
34 | u16 gmp; | |
35 | } res[DW_HDMI_RES_MAX]; | |
36 | }; | |
37 | ||
38 | struct dw_hdmi_curr_ctrl { | |
39 | unsigned long mpixelclock; | |
40 | u16 curr[DW_HDMI_RES_MAX]; | |
41 | }; | |
42 | ||
034705a4 | 43 | struct dw_hdmi_phy_config { |
b21f4b65 AY |
44 | unsigned long mpixelclock; |
45 | u16 sym_ctr; /*clock symbol and transmitter control*/ | |
46 | u16 term; /*transmission termination value*/ | |
034705a4 | 47 | u16 vlev_ctr; /* voltage level control */ |
b21f4b65 AY |
48 | }; |
49 | ||
50 | struct dw_hdmi_plat_data { | |
51 | enum dw_hdmi_devtype dev_type; | |
52 | const struct dw_hdmi_mpll_config *mpll_cfg; | |
53 | const struct dw_hdmi_curr_ctrl *cur_ctr; | |
034705a4 | 54 | const struct dw_hdmi_phy_config *phy_config; |
b21f4b65 AY |
55 | enum drm_mode_status (*mode_valid)(struct drm_connector *connector, |
56 | struct drm_display_mode *mode); | |
57 | }; | |
58 | ||
59 | void dw_hdmi_unbind(struct device *dev, struct device *master, void *data); | |
60 | int dw_hdmi_bind(struct device *dev, struct device *master, | |
61 | void *data, struct drm_encoder *encoder, | |
62 | struct resource *iores, int irq, | |
63 | const struct dw_hdmi_plat_data *plat_data); | |
b5814fff RK |
64 | |
65 | void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); | |
b90120a9 RK |
66 | void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); |
67 | void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); | |
b5814fff | 68 | |
b21f4b65 | 69 | #endif /* __IMX_HDMI_H__ */ |