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1c248b7d ID |
1 | /* exynos_drm.h |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authors: | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
7 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
8 | * | |
9 | * Permission is hereby granted, free of charge, to any person obtaining a | |
10 | * copy of this software and associated documentation files (the "Software"), | |
11 | * to deal in the Software without restriction, including without limitation | |
12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
13 | * and/or sell copies of the Software, and to permit persons to whom the | |
14 | * Software is furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice (including the next | |
17 | * paragraph) shall be included in all copies or substantial portions of the | |
18 | * Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
23 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
24 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
25 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
26 | * OTHER DEALINGS IN THE SOFTWARE. | |
27 | */ | |
1c248b7d ID |
28 | #ifndef _EXYNOS_DRM_H_ |
29 | #define _EXYNOS_DRM_H_ | |
30 | ||
718dcedd | 31 | #include <uapi/drm/exynos_drm.h> |
d7f1642c | 32 | |
1c248b7d | 33 | /** |
607c50d4 | 34 | * A structure for lcd panel information. |
1c248b7d ID |
35 | * |
36 | * @timing: default video mode for initializing | |
607c50d4 ECK |
37 | * @width_mm: physical size of lcd width. |
38 | * @height_mm: physical size of lcd height. | |
39 | */ | |
40 | struct exynos_drm_panel_info { | |
41 | struct fb_videomode timing; | |
42 | u32 width_mm; | |
43 | u32 height_mm; | |
44 | }; | |
45 | ||
46 | /** | |
47 | * Platform Specific Structure for DRM based FIMD. | |
48 | * | |
49 | * @panel: default panel info for initializing | |
1c248b7d ID |
50 | * @default_win: default window layer number to be used for UI. |
51 | * @bpp: default bit per pixel. | |
52 | */ | |
53 | struct exynos_drm_fimd_pdata { | |
607c50d4 | 54 | struct exynos_drm_panel_info panel; |
1c248b7d ID |
55 | u32 vidcon0; |
56 | u32 vidcon1; | |
57 | unsigned int default_win; | |
58 | unsigned int bpp; | |
59 | }; | |
60 | ||
d8408326 SWK |
61 | /** |
62 | * Platform Specific Structure for DRM based HDMI. | |
63 | * | |
64 | * @hdmi_dev: device point to specific hdmi driver. | |
65 | * @mixer_dev: device point to specific mixer driver. | |
66 | * | |
67 | * this structure is used for common hdmi driver and each device object | |
68 | * would be used to access specific device driver(hdmi or mixer driver) | |
69 | */ | |
70 | struct exynos_drm_common_hdmi_pd { | |
71 | struct device *hdmi_dev; | |
72 | struct device *mixer_dev; | |
73 | }; | |
74 | ||
75 | /** | |
76 | * Platform Specific Structure for DRM based HDMI core. | |
77 | * | |
3ecd70b1 | 78 | * @is_v13: set if hdmi version 13 is. |
7ecd34e8 JS |
79 | * @cfg_hpd: function pointer to configure hdmi hotplug detection pin |
80 | * @get_hpd: function pointer to get value of hdmi hotplug detection pin | |
d8408326 SWK |
81 | */ |
82 | struct exynos_drm_hdmi_pdata { | |
7ecd34e8 JS |
83 | bool is_v13; |
84 | void (*cfg_hpd)(bool external); | |
85 | int (*get_hpd)(void); | |
d8408326 SWK |
86 | }; |
87 | ||
16102edb EK |
88 | /** |
89 | * Platform Specific Structure for DRM based IPP. | |
90 | * | |
91 | * @inv_pclk: if set 1. invert pixel clock | |
92 | * @inv_vsync: if set 1. invert vsync signal for wb | |
93 | * @inv_href: if set 1. invert href signal | |
94 | * @inv_hsync: if set 1. invert hsync signal for wb | |
95 | */ | |
96 | struct exynos_drm_ipp_pol { | |
97 | unsigned int inv_pclk; | |
98 | unsigned int inv_vsync; | |
99 | unsigned int inv_href; | |
100 | unsigned int inv_hsync; | |
101 | }; | |
102 | ||
103 | /** | |
104 | * Platform Specific Structure for DRM based FIMC. | |
105 | * | |
106 | * @pol: current hardware block polarity settings. | |
107 | * @clk_rate: current hardware clock rate. | |
108 | */ | |
109 | struct exynos_drm_fimc_pdata { | |
110 | struct exynos_drm_ipp_pol pol; | |
111 | int clk_rate; | |
112 | }; | |
113 | ||
265da78a | 114 | #endif /* _EXYNOS_DRM_H_ */ |