Commit | Line | Data |
---|---|---|
5922befa LM |
1 | /* AMDGCN ELF support for BFD. |
2 | ||
4e5106e6 LM |
3 | Copyright (C) 2019-2020 Free Software Foundation, Inc. |
4 | Copyright (C) 2019-2020 Advanced Micro Devices, Inc. All rights reserved. | |
5922befa LM |
5 | |
6 | This file is part of BFD, the Binary File Descriptor library. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #ifndef _ELF_AMDGCN_H | |
22 | #define _ELF_AMDGCN_H | |
23 | ||
24 | #include "elf/reloc-macros.h" | |
25 | ||
26 | /* Bits in the e_flags field of the Elf64_Ehdr: */ | |
27 | ||
28 | #define EF_AMDGPU_MACH 0x0ff /* Processor selection mask for EF_AMDGPU_MACH_* values. */ | |
29 | #define EF_AMDGPU_MACH_NONE 0x000 /* Not specified processor */ | |
30 | ||
31 | /* R600-based processors. */ | |
32 | ||
33 | /* Radeon HD 2000/3000 Series (R600). */ | |
34 | #define EF_AMDGPU_MACH_R600_R600 0x001 | |
35 | #define EF_AMDGPU_MACH_R600_R630 0x002 | |
36 | #define EF_AMDGPU_MACH_R600_RS880 0x003 | |
37 | #define EF_AMDGPU_MACH_R600_RV670 0x004 | |
38 | /* Radeon HD 4000 Series (R700). */ | |
39 | #define EF_AMDGPU_MACH_R600_RV710 0x005 | |
40 | #define EF_AMDGPU_MACH_R600_RV730 0x006 | |
41 | #define EF_AMDGPU_MACH_R600_RV770 0x007 | |
42 | /* Radeon HD 5000 Series (Evergreen). */ | |
43 | #define EF_AMDGPU_MACH_R600_CEDAR 0x008 | |
44 | #define EF_AMDGPU_MACH_R600_CYPRESS 0x009 | |
45 | #define EF_AMDGPU_MACH_R600_JUNIPER 0x00a | |
46 | #define EF_AMDGPU_MACH_R600_REDWOOD 0x00b | |
47 | #define EF_AMDGPU_MACH_R600_SUMO 0x00c | |
48 | /* Radeon HD 6000 Series (Northern Islands). */ | |
49 | #define EF_AMDGPU_MACH_R600_BARTS 0x00d | |
50 | #define EF_AMDGPU_MACH_R600_CAICOS 0x00e | |
51 | #define EF_AMDGPU_MACH_R600_CAYMAN 0x00f | |
52 | #define EF_AMDGPU_MACH_R600_TURKS 0x010 | |
53 | ||
54 | /* Reserved for R600-based processors. */ | |
55 | #define EF_AMDGPU_MACH_R600_RESERVED_FIRST 0x011 | |
56 | #define EF_AMDGPU_MACH_R600_RESERVED_LAST 0x01f | |
57 | ||
58 | /* First/last R600-based processors. */ | |
59 | #define EF_AMDGPU_MACH_R600_FIRST EF_AMDGPU_MACH_R600_R600 | |
60 | #define EF_AMDGPU_MACH_R600_LAST EF_AMDGPU_MACH_R600_TURKS | |
61 | ||
62 | /* AMDGCN-based processors. */ | |
63 | ||
64 | /* AMDGCN GFX6. */ | |
65 | #define EF_AMDGPU_MACH_AMDGCN_GFX600 0x020 | |
66 | #define EF_AMDGPU_MACH_AMDGCN_GFX601 0x021 | |
67 | /* AMDGCN GFX7. */ | |
68 | #define EF_AMDGPU_MACH_AMDGCN_GFX700 0x022 | |
69 | #define EF_AMDGPU_MACH_AMDGCN_GFX701 0x023 | |
70 | #define EF_AMDGPU_MACH_AMDGCN_GFX702 0x024 | |
71 | #define EF_AMDGPU_MACH_AMDGCN_GFX703 0x025 | |
72 | #define EF_AMDGPU_MACH_AMDGCN_GFX704 0x026 | |
73 | /* AMDGCN GFX8. */ | |
74 | #define EF_AMDGPU_MACH_AMDGCN_GFX801 0x028 | |
75 | #define EF_AMDGPU_MACH_AMDGCN_GFX802 0x029 | |
76 | #define EF_AMDGPU_MACH_AMDGCN_GFX803 0x02a | |
77 | #define EF_AMDGPU_MACH_AMDGCN_GFX810 0x02b | |
78 | /* AMDGCN GFX9. */ | |
79 | #define EF_AMDGPU_MACH_AMDGCN_GFX900 0x02c | |
80 | #define EF_AMDGPU_MACH_AMDGCN_GFX902 0x02d | |
81 | #define EF_AMDGPU_MACH_AMDGCN_GFX904 0x02e | |
82 | #define EF_AMDGPU_MACH_AMDGCN_GFX906 0x02f | |
83 | #define EF_AMDGPU_MACH_AMDGCN_GFX908 0x030 | |
84 | #define EF_AMDGPU_MACH_AMDGCN_GFX909 0x031 | |
85 | ||
86 | /* Reserved for AMDGCN-based processors. */ | |
87 | #define EF_AMDGPU_MACH_AMDGCN_RESERVED0 0x027 | |
88 | #define EF_AMDGPU_MACH_AMDGCN_RESERVED1 0x030 | |
89 | ||
90 | /* First/last AMDGCN-based processors. */ | |
91 | #define EF_AMDGPU_MACH_AMDGCN_FIRST EF_AMDGPU_MACH_AMDGCN_GFX600 | |
92 | #define EF_AMDGPU_MACH_AMDGCN_LAST EF_AMDGPU_MACH_AMDGCN_GFX909 | |
93 | ||
94 | /* Indicates if the "xnack" target feature is enabled for all code contained */ | |
95 | /* in the object. */ | |
96 | #define EF_AMDGPU_XNACK 0x100 | |
97 | /* Indicates if the "sram-ecc" target feature is enabled for all code */ | |
98 | /* contained in the object. */ | |
99 | #define EF_AMDGPU_SRAM_ECC 0x200 | |
100 | ||
101 | ||
102 | /* Additional symbol types for AMDGCN. */ | |
103 | ||
104 | #define STT_AMDGPU_HSA_KERNEL 10 /* Symbol is a kernel descriptor */ | |
105 | ||
106 | ||
107 | /* Note segments. */ | |
108 | ||
109 | #define NT_AMDGPU_HSA_RESERVED_0 0 | |
110 | #define NT_AMDGPU_HSA_CODE_OBJECT_VERSION 1 | |
111 | #define NT_AMDGPU_HSA_HSAIL 2 | |
112 | #define NT_AMDGPU_HSA_ISA 3 | |
113 | #define NT_AMDGPU_HSA_PRODUCER 4 | |
114 | #define NT_AMDGPU_HSA_PRODUCER_OPTIONS 5 | |
115 | #define NT_AMDGPU_HSA_EXTENSION 6 | |
116 | #define NT_AMDGPU_HSA_RESERVED_7 7 | |
117 | #define NT_AMDGPU_HSA_RESERVED_8 8 | |
118 | #define NT_AMDGPU_HSA_RESERVED_9 9 | |
119 | ||
120 | /* Code Object V2. */ | |
121 | /* Note types with values between 0 and 9 (inclusive) are reserved. */ | |
122 | #define NT_AMDGPU_HSA_METADATA 10 | |
123 | #define NT_AMDGPU_ISA 11 | |
124 | #define NT_AMDGPU_PAL_METADATA 12 | |
125 | ||
126 | /* Code Object V3. */ | |
127 | /* Note types with values between 0 and 31 (inclusive) are reserved. */ | |
128 | #define NT_AMDGPU_METADATA 32 | |
129 | ||
130 | /* Other */ | |
131 | #define NT_AMDGPU_HSA_HLDEBUG_DEBUG 101 | |
132 | #define NT_AMDGPU_HSA_HLDEBUG_TARGET 102 | |
133 | ||
134 | /* Relocation types. */ | |
135 | ||
136 | START_RELOC_NUMBERS (elf_amdgcn_reloc_type) | |
137 | RELOC_NUMBER (R_AMDGPU_NONE, 0) | |
138 | RELOC_NUMBER (R_AMDGPU_ABS32_LO, 1) | |
139 | RELOC_NUMBER (R_AMDGPU_ABS32_HI, 2) | |
140 | RELOC_NUMBER (R_AMDGPU_ABS64, 3) | |
141 | RELOC_NUMBER (R_AMDGPU_REL32, 4) | |
142 | RELOC_NUMBER (R_AMDGPU_REL64, 5) | |
143 | RELOC_NUMBER (R_AMDGPU_ABS32, 6) | |
144 | RELOC_NUMBER (R_AMDGPU_GOTPCREL, 7) | |
145 | RELOC_NUMBER (R_AMDGPU_GOTPCREL32_LO, 8) | |
146 | RELOC_NUMBER (R_AMDGPU_GOTPCREL32_HI, 9) | |
147 | RELOC_NUMBER (R_AMDGPU_REL32_LO, 10) | |
148 | RELOC_NUMBER (R_AMDGPU_REL32_HI, 11) | |
149 | RELOC_NUMBER (R_AMDGPU_RELATIVE64, 13) | |
150 | END_RELOC_NUMBERS (R_AMDGPU_max) | |
151 | ||
152 | ||
153 | #endif /* _ELF_AMDGCN_H */ |