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1da177e4 LT |
1 | /* |
2 | * include/linux/fsl_devices.h | |
3 | * | |
4 | * Definitions for any platform device related flags or structures for | |
5 | * Freescale processor devices | |
6 | * | |
4c8d3d99 | 7 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> |
1da177e4 LT |
8 | * |
9 | * Copyright 2004 Freescale Semiconductor, Inc | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
15 | */ | |
16 | ||
17 | #ifdef __KERNEL__ | |
18 | #ifndef _FSL_DEVICE_H_ | |
19 | #define _FSL_DEVICE_H_ | |
20 | ||
21 | #include <linux/types.h> | |
22 | ||
23 | /* | |
24 | * Some conventions on how we handle peripherals on Freescale chips | |
25 | * | |
26 | * unique device: a platform_device entry in fsl_plat_devs[] plus | |
27 | * associated device information in its platform_data structure. | |
28 | * | |
29 | * A chip is described by a set of unique devices. | |
30 | * | |
31 | * Each sub-arch has its own master list of unique devices and | |
32 | * enumerates them by enum fsl_devices in a sub-arch specific header | |
33 | * | |
34 | * The platform data structure is broken into two parts. The | |
35 | * first is device specific information that help identify any | |
36 | * unique features of a peripheral. The second is any | |
37 | * information that may be defined by the board or how the device | |
38 | * is connected externally of the chip. | |
39 | * | |
40 | * naming conventions: | |
41 | * - platform data structures: <driver>_platform_data | |
42 | * - platform data device flags: FSL_<driver>_DEV_<FLAG> | |
43 | * - platform data board flags: FSL_<driver>_BRD_<FLAG> | |
44 | * | |
45 | */ | |
46 | ||
47 | struct gianfar_platform_data { | |
48 | /* device specific information */ | |
98658538 | 49 | u32 device_flags; |
1da177e4 | 50 | /* board specific information */ |
98658538 LY |
51 | u32 board_flags; |
52 | u32 bus_id; | |
53 | u32 phy_id; | |
54 | u8 mac_addr[6]; | |
1da177e4 LT |
55 | }; |
56 | ||
b37665e0 | 57 | struct gianfar_mdio_data { |
b37665e0 | 58 | /* board specific information */ |
98658538 | 59 | int irq[32]; |
b37665e0 AF |
60 | }; |
61 | ||
1da177e4 LT |
62 | /* Flags related to gianfar device features */ |
63 | #define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001 | |
64 | #define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002 | |
65 | #define FSL_GIANFAR_DEV_HAS_RMON 0x00000004 | |
66 | #define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008 | |
5b37b700 KG |
67 | #define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010 |
68 | #define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020 | |
69 | #define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040 | |
70 | #define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080 | |
1da177e4 LT |
71 | |
72 | /* Flags in gianfar_platform_data */ | |
5b37b700 KG |
73 | #define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */ |
74 | #define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */ | |
1da177e4 LT |
75 | |
76 | struct fsl_i2c_platform_data { | |
77 | /* device specific information */ | |
98658538 | 78 | u32 device_flags; |
1da177e4 LT |
79 | }; |
80 | ||
81 | /* Flags related to I2C device features */ | |
82 | #define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001 | |
83 | #define FSL_I2C_DEV_CLOCK_5200 0x00000002 | |
84 | ||
80cb9aee RV |
85 | enum fsl_usb2_operating_modes { |
86 | FSL_USB2_MPH_HOST, | |
87 | FSL_USB2_DR_HOST, | |
88 | FSL_USB2_DR_DEVICE, | |
89 | FSL_USB2_DR_OTG, | |
90 | }; | |
91 | ||
92 | enum fsl_usb2_phy_modes { | |
93 | FSL_USB2_PHY_NONE, | |
94 | FSL_USB2_PHY_ULPI, | |
95 | FSL_USB2_PHY_UTMI, | |
96 | FSL_USB2_PHY_UTMI_WIDE, | |
97 | FSL_USB2_PHY_SERIAL, | |
98 | }; | |
99 | ||
100 | struct fsl_usb2_platform_data { | |
101 | /* board specific information */ | |
98658538 LY |
102 | enum fsl_usb2_operating_modes operating_mode; |
103 | enum fsl_usb2_phy_modes phy_mode; | |
104 | unsigned int port_enables; | |
80cb9aee RV |
105 | }; |
106 | ||
107 | /* Flags in fsl_usb2_mph_platform_data */ | |
108 | #define FSL_USB2_PORT0_ENABLED 0x00000001 | |
109 | #define FSL_USB2_PORT1_ENABLED 0x00000002 | |
110 | ||
ccf06998 KG |
111 | struct fsl_spi_platform_data { |
112 | u32 initial_spmode; /* initial SPMODE value */ | |
113 | u16 bus_num; | |
114 | ||
115 | /* board specific information */ | |
116 | u16 max_chipselect; | |
117 | void (*activate_cs)(u8 cs, u8 polarity); | |
118 | void (*deactivate_cs)(u8 cs, u8 polarity); | |
119 | u32 sysclk; | |
120 | }; | |
121 | ||
98658538 LY |
122 | /* Ethernet interface (phy management and speed) |
123 | */ | |
124 | enum enet_interface { | |
125 | ENET_10_MII, /* 10 Base T, MII interface */ | |
126 | ENET_10_RMII, /* 10 Base T, RMII interface */ | |
127 | ENET_10_RGMII, /* 10 Base T, RGMII interface */ | |
128 | ENET_100_MII, /* 100 Base T, MII interface */ | |
129 | ENET_100_RMII, /* 100 Base T, RMII interface */ | |
130 | ENET_100_RGMII, /* 100 Base T, RGMII interface */ | |
131 | ENET_1000_GMII, /* 1000 Base T, GMII interface */ | |
132 | ENET_1000_RGMII, /* 1000 Base T, RGMII interface */ | |
133 | ENET_1000_TBI, /* 1000 Base T, TBI interface */ | |
134 | ENET_1000_RTBI /* 1000 Base T, RTBI interface */ | |
135 | }; | |
136 | ||
137 | struct ucc_geth_platform_data { | |
138 | /* device specific information */ | |
139 | u32 device_flags; | |
140 | u32 phy_reg_addr; | |
141 | ||
142 | /* board specific information */ | |
143 | u32 board_flags; | |
144 | u8 rx_clock; | |
145 | u8 tx_clock; | |
146 | u32 phy_id; | |
147 | enum enet_interface phy_interface; | |
148 | u32 phy_interrupt; | |
149 | u8 mac_addr[6]; | |
150 | }; | |
151 | ||
152 | /* Flags related to UCC Gigabit Ethernet device features */ | |
153 | #define FSL_UGETH_DEV_HAS_GIGABIT 0x00000001 | |
154 | #define FSL_UGETH_DEV_HAS_COALESCE 0x00000002 | |
155 | #define FSL_UGETH_DEV_HAS_RMON 0x00000004 | |
156 | ||
157 | /* Flags in ucc_geth_platform_data */ | |
158 | #define FSL_UGETH_BRD_HAS_PHY_INTR 0x00000001 | |
159 | /* if not set use a timer */ | |
160 | ||
161 | #endif /* _FSL_DEVICE_H_ */ | |
162 | #endif /* __KERNEL__ */ |