mm: move definition for LRU isolation modes to a header
[deliverable/linux.git] / include / linux / hardirq.h
CommitLineData
1da177e4
LT
1#ifndef LINUX_HARDIRQ_H
2#define LINUX_HARDIRQ_H
3
67bc4eb0 4#include <linux/preempt.h>
405f5571 5#ifdef CONFIG_PREEMPT
1da177e4 6#include <linux/smp_lock.h>
405f5571 7#endif
fbb9ce95 8#include <linux/lockdep.h>
6a60dd12 9#include <linux/ftrace_irq.h>
1da177e4
LT
10#include <asm/hardirq.h>
11#include <asm/system.h>
12
13/*
14 * We put the hardirq and softirq counter into the preemption
15 * counter. The bitmask has the following meaning:
16 *
17 * - bits 0-7 are the preemption count (max preemption depth: 256)
18 * - bits 8-15 are the softirq count (max # of softirqs: 256)
19 *
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SR
20 * The hardirq count can in theory reach the same as NR_IRQS.
21 * In reality, the number of nested IRQS is limited to the stack
22 * size as well. For archs with over 1000 IRQS it is not practical
23 * to expect that they will all nest. We give a max of 10 bits for
24 * hardirq nesting. An arch may choose to give less than 10 bits.
25 * m68k expects it to be 8.
1da177e4 26 *
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SR
27 * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
28 * - bit 26 is the NMI_MASK
29 * - bit 28 is the PREEMPT_ACTIVE flag
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LT
30 *
31 * PREEMPT_MASK: 0x000000ff
32 * SOFTIRQ_MASK: 0x0000ff00
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SR
33 * HARDIRQ_MASK: 0x03ff0000
34 * NMI_MASK: 0x04000000
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LT
35 */
36#define PREEMPT_BITS 8
37#define SOFTIRQ_BITS 8
5a5fb7db 38#define NMI_BITS 1
1da177e4 39
5a5fb7db 40#define MAX_HARDIRQ_BITS 10
23d0b8b0 41
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SR
42#ifndef HARDIRQ_BITS
43# define HARDIRQ_BITS MAX_HARDIRQ_BITS
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EB
44#endif
45
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SR
46#if HARDIRQ_BITS > MAX_HARDIRQ_BITS
47#error HARDIRQ_BITS too high!
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LT
48#endif
49
50#define PREEMPT_SHIFT 0
51#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
52#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
5a5fb7db 53#define NMI_SHIFT (HARDIRQ_SHIFT + HARDIRQ_BITS)
1da177e4
LT
54
55#define __IRQ_MASK(x) ((1UL << (x))-1)
56
57#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
1da177e4 58#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
8f28e8fa 59#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
5a5fb7db 60#define NMI_MASK (__IRQ_MASK(NMI_BITS) << NMI_SHIFT)
1da177e4
LT
61
62#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
63#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
64#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
5a5fb7db 65#define NMI_OFFSET (1UL << NMI_SHIFT)
1da177e4 66
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AB
67#ifndef PREEMPT_ACTIVE
68#define PREEMPT_ACTIVE_BITS 1
69#define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
70#define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT)
71#endif
72
5a5fb7db 73#if PREEMPT_ACTIVE < (1 << (NMI_SHIFT + NMI_BITS))
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PBG
74#error PREEMPT_ACTIVE is too low!
75#endif
76
1da177e4
LT
77#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
78#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
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79#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \
80 | NMI_MASK))
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LT
81
82/*
83 * Are we doing bottom half or hardware interrupt processing?
84 * Are we in a softirq context? Interrupt context?
85 */
86#define in_irq() (hardirq_count())
87#define in_softirq() (softirq_count())
88#define in_interrupt() (irq_count())
89
375b38b4
SR
90/*
91 * Are we in NMI context?
92 */
5a5fb7db 93#define in_nmi() (preempt_count() & NMI_MASK)
375b38b4 94
8e3e076c
LT
95#if defined(CONFIG_PREEMPT)
96# define PREEMPT_INATOMIC_BASE kernel_locked()
97# define PREEMPT_CHECK_OFFSET 1
98#else
99# define PREEMPT_INATOMIC_BASE 0
100# define PREEMPT_CHECK_OFFSET 0
101#endif
102
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JC
103/*
104 * Are we running in atomic context? WARNING: this macro cannot
105 * always detect atomic context; in particular, it cannot know about
106 * held spinlocks in non-preemptible kernels. Thus it should not be
107 * used in the general case to determine whether sleeping is possible.
108 * Do not use in_atomic() in driver code.
109 */
8e3e076c 110#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)
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IM
111
112/*
113 * Check whether we were atomic before we did preempt_disable():
8e3e076c 114 * (used by the scheduler, *after* releasing the kernel lock)
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IM
115 */
116#define in_atomic_preempt_off() \
117 ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
118
1da177e4
LT
119#ifdef CONFIG_PREEMPT
120# define preemptible() (preempt_count() == 0 && !irqs_disabled())
121# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
122#else
123# define preemptible() 0
124# define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
125#endif
126
3aa551c9 127#if defined(CONFIG_SMP) || defined(CONFIG_GENERIC_HARDIRQS)
1da177e4
LT
128extern void synchronize_irq(unsigned int irq);
129#else
130# define synchronize_irq(irq) barrier()
131#endif
132
f037360f
AV
133struct task_struct;
134
1da177e4 135#ifndef CONFIG_VIRT_CPU_ACCOUNTING
1da177e4
LT
136static inline void account_system_vtime(struct task_struct *tsk)
137{
138}
139#endif
140
b560d8ad 141#if defined(CONFIG_NO_HZ)
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PM
142#if defined(CONFIG_TINY_RCU)
143extern void rcu_enter_nohz(void);
144extern void rcu_exit_nohz(void);
145
146static inline void rcu_irq_enter(void)
147{
148 rcu_exit_nohz();
149}
150
151static inline void rcu_irq_exit(void)
152{
153 rcu_enter_nohz();
154}
155
156static inline void rcu_nmi_enter(void)
157{
158}
159
160static inline void rcu_nmi_exit(void)
161{
162}
163
164#else
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165extern void rcu_irq_enter(void);
166extern void rcu_irq_exit(void);
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167extern void rcu_nmi_enter(void);
168extern void rcu_nmi_exit(void);
9b1d82fa 169#endif
2232c2d8
SR
170#else
171# define rcu_irq_enter() do { } while (0)
172# define rcu_irq_exit() do { } while (0)
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PM
173# define rcu_nmi_enter() do { } while (0)
174# define rcu_nmi_exit() do { } while (0)
b560d8ad 175#endif /* #if defined(CONFIG_NO_HZ) */
2232c2d8 176
de30a2b3
IM
177/*
178 * It is safe to do non-atomic ops on ->hardirq_context,
179 * because NMI handlers may not preempt and the ops are
180 * always balanced, so the interrupted value of ->hardirq_context
181 * will always be restored.
182 */
79bf2bb3
TG
183#define __irq_enter() \
184 do { \
185 account_system_vtime(current); \
186 add_preempt_count(HARDIRQ_OFFSET); \
187 trace_hardirq_enter(); \
188 } while (0)
189
190/*
191 * Enter irq context (on NO_HZ, update jiffies):
192 */
dde4b2b5 193extern void irq_enter(void);
de30a2b3
IM
194
195/*
196 * Exit irq context without processing softirqs:
197 */
198#define __irq_exit() \
199 do { \
200 trace_hardirq_exit(); \
201 account_system_vtime(current); \
202 sub_preempt_count(HARDIRQ_OFFSET); \
1da177e4
LT
203 } while (0)
204
de30a2b3
IM
205/*
206 * Exit irq context and process softirqs if needed:
207 */
1da177e4
LT
208extern void irq_exit(void);
209
2a7b8df0
SR
210#define nmi_enter() \
211 do { \
212 ftrace_nmi_enter(); \
213 BUG_ON(in_nmi()); \
214 add_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
215 lockdep_off(); \
216 rcu_nmi_enter(); \
217 trace_hardirq_enter(); \
17666f02 218 } while (0)
5f34fe1c 219
2a7b8df0
SR
220#define nmi_exit() \
221 do { \
222 trace_hardirq_exit(); \
223 rcu_nmi_exit(); \
224 lockdep_on(); \
225 BUG_ON(!in_nmi()); \
226 sub_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
227 ftrace_nmi_exit(); \
17666f02 228 } while (0)
de30a2b3 229
1da177e4 230#endif /* LINUX_HARDIRQ_H */
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