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1da177e4 LT |
1 | #ifndef LINUX_HARDIRQ_H |
2 | #define LINUX_HARDIRQ_H | |
3 | ||
67bc4eb0 | 4 | #include <linux/preempt.h> |
1da177e4 | 5 | #include <linux/smp_lock.h> |
fbb9ce95 | 6 | #include <linux/lockdep.h> |
6a60dd12 | 7 | #include <linux/ftrace_irq.h> |
1da177e4 LT |
8 | #include <asm/hardirq.h> |
9 | #include <asm/system.h> | |
10 | ||
11 | /* | |
12 | * We put the hardirq and softirq counter into the preemption | |
13 | * counter. The bitmask has the following meaning: | |
14 | * | |
15 | * - bits 0-7 are the preemption count (max preemption depth: 256) | |
16 | * - bits 8-15 are the softirq count (max # of softirqs: 256) | |
17 | * | |
18 | * The hardirq count can be overridden per architecture, the default is: | |
19 | * | |
20 | * - bits 16-27 are the hardirq count (max # of hardirqs: 4096) | |
21 | * - ( bit 28 is the PREEMPT_ACTIVE flag. ) | |
22 | * | |
23 | * PREEMPT_MASK: 0x000000ff | |
24 | * SOFTIRQ_MASK: 0x0000ff00 | |
25 | * HARDIRQ_MASK: 0x0fff0000 | |
26 | */ | |
27 | #define PREEMPT_BITS 8 | |
28 | #define SOFTIRQ_BITS 8 | |
29 | ||
30 | #ifndef HARDIRQ_BITS | |
31 | #define HARDIRQ_BITS 12 | |
23d0b8b0 EB |
32 | |
33 | #ifndef MAX_HARDIRQS_PER_CPU | |
34 | #define MAX_HARDIRQS_PER_CPU NR_IRQS | |
35 | #endif | |
36 | ||
1da177e4 LT |
37 | /* |
38 | * The hardirq mask has to be large enough to have space for potentially | |
39 | * all IRQ sources in the system nesting on a single CPU. | |
40 | */ | |
23d0b8b0 | 41 | #if (1 << HARDIRQ_BITS) < MAX_HARDIRQS_PER_CPU |
1da177e4 LT |
42 | # error HARDIRQ_BITS is too low! |
43 | #endif | |
44 | #endif | |
45 | ||
46 | #define PREEMPT_SHIFT 0 | |
47 | #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS) | |
48 | #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS) | |
49 | ||
50 | #define __IRQ_MASK(x) ((1UL << (x))-1) | |
51 | ||
52 | #define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT) | |
1da177e4 | 53 | #define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT) |
8f28e8fa | 54 | #define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT) |
1da177e4 LT |
55 | |
56 | #define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT) | |
57 | #define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT) | |
58 | #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT) | |
59 | ||
8f28e8fa PBG |
60 | #if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS)) |
61 | #error PREEMPT_ACTIVE is too low! | |
62 | #endif | |
63 | ||
1da177e4 LT |
64 | #define hardirq_count() (preempt_count() & HARDIRQ_MASK) |
65 | #define softirq_count() (preempt_count() & SOFTIRQ_MASK) | |
66 | #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK)) | |
67 | ||
68 | /* | |
69 | * Are we doing bottom half or hardware interrupt processing? | |
70 | * Are we in a softirq context? Interrupt context? | |
71 | */ | |
72 | #define in_irq() (hardirq_count()) | |
73 | #define in_softirq() (softirq_count()) | |
74 | #define in_interrupt() (irq_count()) | |
75 | ||
8e3e076c LT |
76 | #if defined(CONFIG_PREEMPT) |
77 | # define PREEMPT_INATOMIC_BASE kernel_locked() | |
78 | # define PREEMPT_CHECK_OFFSET 1 | |
79 | #else | |
80 | # define PREEMPT_INATOMIC_BASE 0 | |
81 | # define PREEMPT_CHECK_OFFSET 0 | |
82 | #endif | |
83 | ||
8c703d35 JC |
84 | /* |
85 | * Are we running in atomic context? WARNING: this macro cannot | |
86 | * always detect atomic context; in particular, it cannot know about | |
87 | * held spinlocks in non-preemptible kernels. Thus it should not be | |
88 | * used in the general case to determine whether sleeping is possible. | |
89 | * Do not use in_atomic() in driver code. | |
90 | */ | |
8e3e076c | 91 | #define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE) |
4da1ce6d IM |
92 | |
93 | /* | |
94 | * Check whether we were atomic before we did preempt_disable(): | |
8e3e076c | 95 | * (used by the scheduler, *after* releasing the kernel lock) |
4da1ce6d IM |
96 | */ |
97 | #define in_atomic_preempt_off() \ | |
98 | ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET) | |
99 | ||
1da177e4 LT |
100 | #ifdef CONFIG_PREEMPT |
101 | # define preemptible() (preempt_count() == 0 && !irqs_disabled()) | |
102 | # define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1) | |
103 | #else | |
104 | # define preemptible() 0 | |
105 | # define IRQ_EXIT_OFFSET HARDIRQ_OFFSET | |
106 | #endif | |
107 | ||
108 | #ifdef CONFIG_SMP | |
109 | extern void synchronize_irq(unsigned int irq); | |
110 | #else | |
111 | # define synchronize_irq(irq) barrier() | |
112 | #endif | |
113 | ||
f037360f AV |
114 | struct task_struct; |
115 | ||
1da177e4 | 116 | #ifndef CONFIG_VIRT_CPU_ACCOUNTING |
1da177e4 LT |
117 | static inline void account_system_vtime(struct task_struct *tsk) |
118 | { | |
119 | } | |
120 | #endif | |
121 | ||
64db4cff | 122 | #if defined(CONFIG_NO_HZ) && !defined(CONFIG_CLASSIC_RCU) |
2232c2d8 SR |
123 | extern void rcu_irq_enter(void); |
124 | extern void rcu_irq_exit(void); | |
64db4cff PM |
125 | extern void rcu_nmi_enter(void); |
126 | extern void rcu_nmi_exit(void); | |
2232c2d8 SR |
127 | #else |
128 | # define rcu_irq_enter() do { } while (0) | |
129 | # define rcu_irq_exit() do { } while (0) | |
64db4cff PM |
130 | # define rcu_nmi_enter() do { } while (0) |
131 | # define rcu_nmi_exit() do { } while (0) | |
132 | #endif /* #if defined(CONFIG_NO_HZ) && !defined(CONFIG_CLASSIC_RCU) */ | |
2232c2d8 | 133 | |
de30a2b3 IM |
134 | /* |
135 | * It is safe to do non-atomic ops on ->hardirq_context, | |
136 | * because NMI handlers may not preempt and the ops are | |
137 | * always balanced, so the interrupted value of ->hardirq_context | |
138 | * will always be restored. | |
139 | */ | |
79bf2bb3 TG |
140 | #define __irq_enter() \ |
141 | do { \ | |
142 | account_system_vtime(current); \ | |
143 | add_preempt_count(HARDIRQ_OFFSET); \ | |
144 | trace_hardirq_enter(); \ | |
145 | } while (0) | |
146 | ||
147 | /* | |
148 | * Enter irq context (on NO_HZ, update jiffies): | |
149 | */ | |
dde4b2b5 | 150 | extern void irq_enter(void); |
de30a2b3 IM |
151 | |
152 | /* | |
153 | * Exit irq context without processing softirqs: | |
154 | */ | |
155 | #define __irq_exit() \ | |
156 | do { \ | |
157 | trace_hardirq_exit(); \ | |
158 | account_system_vtime(current); \ | |
159 | sub_preempt_count(HARDIRQ_OFFSET); \ | |
1da177e4 LT |
160 | } while (0) |
161 | ||
de30a2b3 IM |
162 | /* |
163 | * Exit irq context and process softirqs if needed: | |
164 | */ | |
1da177e4 LT |
165 | extern void irq_exit(void); |
166 | ||
17666f02 SR |
167 | #define nmi_enter() \ |
168 | do { \ | |
169 | ftrace_nmi_enter(); \ | |
170 | lockdep_off(); \ | |
5f34fe1c | 171 | rcu_nmi_enter(); \ |
17666f02 SR |
172 | __irq_enter(); \ |
173 | } while (0) | |
5f34fe1c | 174 | |
17666f02 SR |
175 | #define nmi_exit() \ |
176 | do { \ | |
177 | __irq_exit(); \ | |
5f34fe1c | 178 | rcu_nmi_exit(); \ |
17666f02 SR |
179 | lockdep_on(); \ |
180 | ftrace_nmi_exit(); \ | |
181 | } while (0) | |
de30a2b3 | 182 | |
1da177e4 | 183 | #endif /* LINUX_HARDIRQ_H */ |