ide: factor out completion of taskfile from ide_end_drive_cmd()
[deliverable/linux.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
3ceca727 11#include <linux/ata.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
feb22b7f 20#include <linux/pm.h>
e3a59b4d
HR
21#ifdef CONFIG_BLK_DEV_IDEACPI
22#include <acpi/acpi.h>
23#endif
1da177e4
LT
24#include <asm/byteorder.h>
25#include <asm/system.h>
26#include <asm/io.h>
f9383c42 27#include <asm/mutex.h>
1da177e4 28
d45b70ab 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) || defined(CONFIG_MN10300)
4ee06b7e
BZ
30# define SUPPORT_VLB_SYNC 0
31#else
32# define SUPPORT_VLB_SYNC 1
1da177e4
LT
33#endif
34
1da177e4
LT
35/*
36 * Probably not wise to fiddle with these
37 */
b40d1b88 38#define IDE_DEFAULT_MAX_FAILURES 1
1da177e4
LT
39#define ERROR_MAX 8 /* Max read/write errors per sector */
40#define ERROR_RESET 3 /* Reset controller every 4th retry */
41#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
42
1da177e4
LT
43/*
44 * Definitions for accessing IDE controller registers
45 */
46#define IDE_NR_PORTS (10)
47
4c3032d8
BZ
48struct ide_io_ports {
49 unsigned long data_addr;
50
51 union {
52 unsigned long error_addr; /* read: error */
53 unsigned long feature_addr; /* write: feature */
54 };
55
56 unsigned long nsect_addr;
57 unsigned long lbal_addr;
58 unsigned long lbam_addr;
59 unsigned long lbah_addr;
60
61 unsigned long device_addr;
62
63 union {
64 unsigned long status_addr; /*  read: status  */
65 unsigned long command_addr; /* write: command */
66 };
67
68 unsigned long ctl_addr;
69
70 unsigned long irq_addr;
71};
1da177e4
LT
72
73#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
1da177e4 74
3a7d2484
BZ
75#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
76#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
77#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
78#define DRIVE_READY (ATA_DRDY | ATA_DSC)
79
80#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
1da177e4
LT
81
82#define SATA_NR_PORTS (3) /* 16 possible ?? */
83
84#define SATA_STATUS_OFFSET (0)
1da177e4 85#define SATA_ERROR_OFFSET (1)
1da177e4 86#define SATA_CONTROL_OFFSET (2)
1da177e4 87
1da177e4
LT
88/*
89 * Our Physical Region Descriptor (PRD) table should be large enough
90 * to handle the biggest I/O request we are likely to see. Since requests
91 * can have no more than 256 sectors, and since the typical blocksize is
92 * two or more sectors, we could get by with a limit of 128 entries here for
93 * the usual worst case. Most requests seem to include some contiguous blocks,
94 * further reducing the number of table entries required.
95 *
96 * The driver reverts to PIO mode for individual requests that exceed
97 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
98 * 100% of all crazy scenarios here is not necessary.
99 *
100 * As it turns out though, we must allocate a full 4KB page for this,
101 * so the two PRD tables (ide0 & ide1) will each get half of that,
102 * allowing each to have about 256 entries (8 bytes each) from this.
103 */
104#define PRD_BYTES 8
105#define PRD_ENTRIES 256
106
107/*
108 * Some more useful definitions
109 */
110#define PARTN_BITS 6 /* number of minor dev bits for partitions */
111#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
112#define SECTOR_SIZE 512
151a6701 113
1da177e4
LT
114/*
115 * Timeouts for various operations:
116 */
d6e2955a
BZ
117enum {
118 /* spec allows up to 20ms */
119 WAIT_DRQ = HZ / 10, /* 100ms */
120 /* some laptops are very slow */
121 WAIT_READY = 5 * HZ, /* 5s */
122 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
123 WAIT_PIDENTIFY = 10 * HZ, /* 10s */
124 /* worst case when spinning up */
125 WAIT_WORSTCASE = 30 * HZ, /* 30s */
126 /* maximum wait for an IRQ to happen */
127 WAIT_CMD = 10 * HZ, /* 10s */
128 /* Some drives require a longer IRQ timeout. */
129 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
130 /*
131 * Some drives (for example, Seagate STT3401A Travan) require a very
132 * long timeout, because they don't return an interrupt or clear their
133 * BSY bit until after the command completes (even retension commands).
134 */
135 WAIT_TAPE_CMD = 900 * HZ, /* 900s */
136 /* minimum sleep time */
137 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
138};
1da177e4 139
79e36a9f
EO
140/*
141 * Op codes for special requests to be handled by ide_special_rq().
142 * Values should be in the range of 0x20 to 0x3f.
143 */
144#define REQ_DRIVE_RESET 0x20
92f1f8fd 145#define REQ_DEVSET_EXEC 0x21
4abdc6ee
EO
146#define REQ_PARK_HEADS 0x22
147#define REQ_UNPARK_HEADS 0x23
79e36a9f 148
1da177e4
LT
149/*
150 * Check for an interrupt and acknowledge the interrupt status
151 */
152struct hwif_s;
153typedef int (ide_ack_intr_t)(struct hwif_s *);
154
1da177e4
LT
155/*
156 * hwif_chipset_t is used to keep track of the specific hardware
157 * chipset used by each IDE interface, if known.
158 */
528a572d 159enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
160 ide_cmd640, ide_dtc2278, ide_ali14xx,
161 ide_qd65xx, ide_umc8672, ide_ht6560b,
b7876a6f 162 ide_4drives, ide_pmac, ide_acorn,
9a0e77f2 163 ide_au1xxx, ide_palm3710
528a572d
BZ
164};
165
166typedef u8 hwif_chipset_t;
1da177e4
LT
167
168/*
169 * Structure to hold all information about the location of this port
170 */
171typedef struct hw_regs_s {
4c3032d8
BZ
172 union {
173 struct ide_io_ports io_ports;
174 unsigned long io_ports_array[IDE_NR_PORTS];
175 };
176
1da177e4 177 int irq; /* our irq number */
1da177e4
LT
178 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
179 hwif_chipset_t chipset;
c56c5648 180 struct device *dev, *parent;
d6276b5f 181 unsigned long config;
1da177e4
LT
182} hw_regs_t;
183
1da177e4
LT
184static inline void ide_std_init_ports(hw_regs_t *hw,
185 unsigned long io_addr,
186 unsigned long ctl_addr)
187{
188 unsigned int i;
189
4c3032d8
BZ
190 for (i = 0; i <= 7; i++)
191 hw->io_ports_array[i] = io_addr++;
1da177e4 192
4c3032d8 193 hw->io_ports.ctl_addr = ctl_addr;
1da177e4
LT
194}
195
c5bfc375 196#define MAX_HWIFS 10
83ae20c8 197
1da177e4
LT
198/*
199 * Now for the data we need to maintain per-drive: ide_drive_t
200 */
201
202#define ide_scsi 0x21
203#define ide_disk 0x20
204#define ide_optical 0x7
205#define ide_cdrom 0x5
206#define ide_tape 0x1
207#define ide_floppy 0x0
208
209/*
210 * Special Driver Flags
211 *
212 * set_geometry : respecify drive geometry
213 * recalibrate : seek to cyl 0
214 * set_multmode : set multmode count
1da177e4
LT
215 * reserved : unused
216 */
217typedef union {
218 unsigned all : 8;
219 struct {
1da177e4
LT
220 unsigned set_geometry : 1;
221 unsigned recalibrate : 1;
222 unsigned set_multmode : 1;
6982daf7 223 unsigned reserved : 5;
1da177e4
LT
224 } b;
225} special_t;
226
1da177e4
LT
227/*
228 * Status returned from various ide_ functions
229 */
230typedef enum {
231 ide_stopped, /* no drive operation was started */
232 ide_started, /* a drive operation was started, handler was set */
233} ide_startstop_t;
234
d6ff9f64
BZ
235enum {
236 IDE_TFLAG_LBA48 = (1 << 0),
19710d25
BZ
237 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 1),
238 IDE_TFLAG_OUT_HOB_NSECT = (1 << 2),
239 IDE_TFLAG_OUT_HOB_LBAL = (1 << 3),
240 IDE_TFLAG_OUT_HOB_LBAM = (1 << 4),
241 IDE_TFLAG_OUT_HOB_LBAH = (1 << 5),
d6ff9f64
BZ
242 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
243 IDE_TFLAG_OUT_HOB_NSECT |
244 IDE_TFLAG_OUT_HOB_LBAL |
245 IDE_TFLAG_OUT_HOB_LBAM |
246 IDE_TFLAG_OUT_HOB_LBAH,
19710d25
BZ
247 IDE_TFLAG_OUT_FEATURE = (1 << 6),
248 IDE_TFLAG_OUT_NSECT = (1 << 7),
249 IDE_TFLAG_OUT_LBAL = (1 << 8),
250 IDE_TFLAG_OUT_LBAM = (1 << 9),
251 IDE_TFLAG_OUT_LBAH = (1 << 10),
d6ff9f64
BZ
252 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
253 IDE_TFLAG_OUT_NSECT |
254 IDE_TFLAG_OUT_LBAL |
255 IDE_TFLAG_OUT_LBAM |
256 IDE_TFLAG_OUT_LBAH,
19710d25
BZ
257 IDE_TFLAG_OUT_DEVICE = (1 << 11),
258 IDE_TFLAG_WRITE = (1 << 12),
259 IDE_TFLAG_CUSTOM_HANDLER = (1 << 13),
260 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 14),
261 IDE_TFLAG_IN_HOB_FEATURE = (1 << 15),
262 IDE_TFLAG_IN_HOB_NSECT = (1 << 16),
263 IDE_TFLAG_IN_HOB_LBAL = (1 << 17),
264 IDE_TFLAG_IN_HOB_LBAM = (1 << 18),
265 IDE_TFLAG_IN_HOB_LBAH = (1 << 19),
d6ff9f64
BZ
266 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
267 IDE_TFLAG_IN_HOB_LBAM |
268 IDE_TFLAG_IN_HOB_LBAH,
269 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
270 IDE_TFLAG_IN_HOB_NSECT |
271 IDE_TFLAG_IN_HOB_LBA,
19710d25
BZ
272 IDE_TFLAG_IN_FEATURE = (1 << 20),
273 IDE_TFLAG_IN_NSECT = (1 << 21),
274 IDE_TFLAG_IN_LBAL = (1 << 22),
275 IDE_TFLAG_IN_LBAM = (1 << 23),
276 IDE_TFLAG_IN_LBAH = (1 << 24),
d6ff9f64
BZ
277 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
278 IDE_TFLAG_IN_LBAM |
279 IDE_TFLAG_IN_LBAH,
280 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
281 IDE_TFLAG_IN_LBA,
19710d25 282 IDE_TFLAG_IN_DEVICE = (1 << 25),
d6ff9f64
BZ
283 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
284 IDE_TFLAG_IN_HOB,
285 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
286 IDE_TFLAG_IN_TF,
287 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
288 IDE_TFLAG_IN_DEVICE,
289 /* force 16-bit I/O operations */
19710d25 290 IDE_TFLAG_IO_16BIT = (1 << 26),
d6ff9f64 291 /* ide_task_t was allocated using kmalloc() */
19710d25
BZ
292 IDE_TFLAG_DYN = (1 << 27),
293};
294
295enum {
296 IDE_FTFLAG_FLAGGED = (1 << 0),
297 IDE_FTFLAG_SET_IN_FLAGS = (1 << 1),
298 IDE_FTFLAG_OUT_DATA = (1 << 2),
299 IDE_FTFLAG_IN_DATA = (1 << 3),
d6ff9f64
BZ
300};
301
302struct ide_taskfile {
303 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
304
305 u8 hob_feature; /* 1-5: additional data to support LBA48 */
306 u8 hob_nsect;
307 u8 hob_lbal;
308 u8 hob_lbam;
309 u8 hob_lbah;
310
311 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
312
313 union { /*  7: */
314 u8 error; /* read: error */
315 u8 feature; /* write: feature */
316 };
317
318 u8 nsect; /* 8: number of sectors */
319 u8 lbal; /* 9: LBA low */
320 u8 lbam; /* 10: LBA mid */
321 u8 lbah; /* 11: LBA high */
322
323 u8 device; /* 12: device select */
324
325 union { /* 13: */
326 u8 status; /*  read: status  */
327 u8 command; /* write: command */
328 };
329};
330
331typedef struct ide_task_s {
332 union {
333 struct ide_taskfile tf;
334 u8 tf_array[14];
335 };
19710d25 336 u8 ftf_flags; /* for TASKFILE ioctl */
d6ff9f64
BZ
337 u32 tf_flags;
338 int data_phase;
339 struct request *rq; /* copy of request */
340 void *special; /* valid_t generally */
341} ide_task_t;
342
67c56364
BZ
343/* ATAPI packet command flags */
344enum {
345 /* set when an error is considered normal - no retry (ide-tape) */
346 PC_FLAG_ABORT = (1 << 0),
347 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
348 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
349 PC_FLAG_DMA_OK = (1 << 3),
350 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
351 PC_FLAG_DMA_ERROR = (1 << 5),
352 PC_FLAG_WRITING = (1 << 6),
353 /* command timed out */
354 PC_FLAG_TIMEDOUT = (1 << 7),
355};
356
357/*
358 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
359 * This is used for several packet commands (not for READ/WRITE commands).
360 */
361#define IDE_PC_BUFFER_SIZE 256
4cad085e 362#define ATAPI_WAIT_PC (60 * HZ)
67c56364
BZ
363
364struct ide_atapi_pc {
365 /* actual packet bytes */
366 u8 c[12];
367 /* incremented on each retry */
368 int retries;
369 int error;
370
371 /* bytes to transfer */
372 int req_xfer;
373 /* bytes actually transferred */
374 int xferred;
375
376 /* data buffer */
377 u8 *buf;
378 /* current buffer position */
379 u8 *cur_pos;
380 int buf_size;
381 /* missing/available data on the current buffer */
382 int b_count;
383
384 /* the corresponding request */
385 struct request *rq;
386
387 unsigned long flags;
388
389 /*
390 * those are more or less driver-specific and some of them are subject
391 * to change/removal later.
392 */
393 u8 pc_buf[IDE_PC_BUFFER_SIZE];
394
395 /* idetape only */
396 struct idetape_bh *bh;
397 char *b_data;
398
67c56364
BZ
399 struct scatterlist *sg;
400 unsigned int sg_cnt;
401
67c56364
BZ
402 unsigned long timeout;
403};
404
8185d5aa 405struct ide_devset;
7f3c868b 406struct ide_driver;
1da177e4 407
e3a59b4d
HR
408#ifdef CONFIG_BLK_DEV_IDEACPI
409struct ide_acpi_drive_link;
410struct ide_acpi_hwif_link;
411#endif
412
806f80a6
BZ
413struct ide_drive_s;
414
415struct ide_disk_ops {
416 int (*check)(struct ide_drive_s *, const char *);
417 int (*get_capacity)(struct ide_drive_s *);
418 void (*setup)(struct ide_drive_s *);
419 void (*flush)(struct ide_drive_s *);
420 int (*init_media)(struct ide_drive_s *, struct gendisk *);
421 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
422 int);
423 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
424 sector_t);
425 int (*end_request)(struct ide_drive_s *, int, int);
badf8082
AV
426 int (*ioctl)(struct ide_drive_s *, struct block_device *,
427 fmode_t, unsigned int, unsigned long);
806f80a6
BZ
428};
429
3b8ac539
BP
430/* ATAPI device flags */
431enum {
432 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
0578042d
BZ
433
434 /* ide-cd */
3b8ac539 435 /* Drive cannot eject the disc. */
bf64741f 436 IDE_AFLAG_NO_EJECT = (1 << 1),
3b8ac539 437 /* Drive is a pre ATAPI 1.2 drive. */
bf64741f 438 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
3b8ac539 439 /* TOC addresses are in BCD. */
bf64741f 440 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
3b8ac539 441 /* TOC track numbers are in BCD. */
bf64741f 442 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
3b8ac539
BP
443 /*
444 * Drive does not provide data in multiples of SECTOR_SIZE
445 * when more than one interrupt is needed.
446 */
bf64741f 447 IDE_AFLAG_LIMIT_NFRAMES = (1 << 5),
3b8ac539 448 /* Saved TOC information is current. */
bf64741f 449 IDE_AFLAG_TOC_VALID = (1 << 6),
3b8ac539 450 /* We think that the drive door is locked. */
bf64741f 451 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
3b8ac539 452 /* SET_CD_SPEED command is unsupported. */
bf64741f
BP
453 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
454 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
455 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
456 IDE_AFLAG_SANYO_3CD = (1 << 11),
457 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
458 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
459 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
3b8ac539
BP
460
461 /* ide-floppy */
3b8ac539 462 /* Avoid commands not supported in Clik drive */
bf64741f 463 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
3b8ac539 464 /* Requires BH algorithm for packets */
bf64741f 465 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
49cac39e 466 /* Supports format progress report */
bf64741f 467 IDE_AFLAG_SRFP = (1 << 17),
3b8ac539
BP
468
469 /* ide-tape */
bf64741f 470 IDE_AFLAG_IGNORE_DSC = (1 << 18),
3b8ac539 471 /* 0 When the tape position is unknown */
bf64741f 472 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
3b8ac539 473 /* Device already opened */
bf64741f 474 IDE_AFLAG_BUSY = (1 << 20),
3b8ac539 475 /* Attempt to auto-detect the current user block size */
bf64741f 476 IDE_AFLAG_DETECT_BS = (1 << 21),
3b8ac539 477 /* Currently on a filemark */
bf64741f 478 IDE_AFLAG_FILEMARK = (1 << 22),
3b8ac539 479 /* 0 = no tape is loaded, so we don't rewind after ejecting */
bf64741f 480 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
f20f2586 481
bf64741f 482 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
3b8ac539
BP
483};
484
97100fc8
BZ
485/* device flags */
486enum {
487 /* restore settings after device reset */
488 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
489 /* device is using DMA for read/write */
490 IDE_DFLAG_USING_DMA = (1 << 1),
491 /* okay to unmask other IRQs */
492 IDE_DFLAG_UNMASK = (1 << 2),
493 /* don't attempt flushes */
494 IDE_DFLAG_NOFLUSH = (1 << 3),
495 /* DSC overlap */
496 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
497 /* give potential excess bandwidth */
498 IDE_DFLAG_NICE1 = (1 << 5),
499 /* device is physically present */
500 IDE_DFLAG_PRESENT = (1 << 6),
97100fc8
BZ
501 /* id read from device (synthetic if not set) */
502 IDE_DFLAG_ID_READ = (1 << 8),
503 IDE_DFLAG_NOPROBE = (1 << 9),
504 /* need to do check_media_change() */
505 IDE_DFLAG_REMOVABLE = (1 << 10),
506 /* needed for removable devices */
507 IDE_DFLAG_ATTACH = (1 << 11),
508 IDE_DFLAG_FORCED_GEOM = (1 << 12),
509 /* disallow setting unmask bit */
510 IDE_DFLAG_NO_UNMASK = (1 << 13),
511 /* disallow enabling 32-bit I/O */
512 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
513 /* for removable only: door lock/unlock works */
514 IDE_DFLAG_DOORLOCKING = (1 << 15),
515 /* disallow DMA */
516 IDE_DFLAG_NODMA = (1 << 16),
517 /* powermanagment told us not to do anything, so sleep nicely */
518 IDE_DFLAG_BLOCKED = (1 << 17),
97100fc8 519 /* sleeping & sleep field valid */
5317464d
BP
520 IDE_DFLAG_SLEEPING = (1 << 18),
521 IDE_DFLAG_POST_RESET = (1 << 19),
522 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
523 IDE_DFLAG_LBA48 = (1 << 21),
97100fc8 524 /* status of write cache */
5317464d 525 IDE_DFLAG_WCACHE = (1 << 22),
97100fc8 526 /* used for ignoring ATA_DF */
5317464d 527 IDE_DFLAG_NOWERR = (1 << 23),
c3922048 528 /* retrying in PIO */
5317464d
BP
529 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
530 IDE_DFLAG_LBA = (1 << 25),
4abdc6ee 531 /* don't unload heads */
5317464d 532 IDE_DFLAG_NO_UNLOAD = (1 << 26),
4abdc6ee 533 /* heads unloaded, please don't reset port */
5317464d
BP
534 IDE_DFLAG_PARKED = (1 << 27),
535 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
da167876 536 /* write protect */
5317464d
BP
537 IDE_DFLAG_WP = (1 << 29),
538 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
97100fc8
BZ
539};
540
d7c26ebb 541struct ide_drive_s {
1da177e4
LT
542 char name[4]; /* drive name, such as "hda" */
543 char driver_req[10]; /* requests specific driver */
544
165125e1 545 struct request_queue *queue; /* request queue */
1da177e4
LT
546
547 struct request *rq; /* current request */
1da177e4 548 void *driver_data; /* extra driver data */
48fb2688 549 u16 *id; /* identification info */
7662d046 550#ifdef CONFIG_IDE_PROC_FS
1da177e4 551 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
92f1f8fd 552 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
7662d046 553#endif
1da177e4
LT
554 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
555
806f80a6
BZ
556 const struct ide_disk_ops *disk_ops;
557
97100fc8
BZ
558 unsigned long dev_flags;
559
1da177e4 560 unsigned long sleep; /* sleep until this time */
1da177e4
LT
561 unsigned long timeout; /* max time to wait for irq */
562
563 special_t special; /* special action flags */
1da177e4 564
7f612f27 565 u8 select; /* basic drive/head select reg value */
1da177e4 566 u8 retry_pio; /* retrying dma capable host in pio */
1da177e4 567 u8 waiting_for_dma; /* dma currently in progress */
0a9b6f88 568 u8 dma; /* atapi dma flag */
1da177e4 569
1da177e4
LT
570 u8 quirk_list; /* considered quirky, set for a specific host */
571 u8 init_speed; /* transfer rate set at boot */
1da177e4 572 u8 current_speed; /* current transfer rate set */
513daadd 573 u8 desired_speed; /* desired transfer rate set */
1da177e4 574 u8 dn; /* now wide spread use */
1da177e4
LT
575 u8 acoustic; /* acoustic management */
576 u8 media; /* disk, cdrom, tape, floppy, ... */
1da177e4
LT
577 u8 ready_stat; /* min status value for drive ready */
578 u8 mult_count; /* current multiple sector setting */
579 u8 mult_req; /* requested multiple sector setting */
1da177e4 580 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
3a7d2484 581 u8 bad_wstat; /* used for ignoring ATA_DF */
1da177e4
LT
582 u8 head; /* "real" number of heads */
583 u8 sect; /* "real" sectors per track */
584 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
585 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
586
baf08f0b
BZ
587 /* delay this long before sending packet command */
588 u8 pc_delay;
589
1da177e4
LT
590 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
591 unsigned int cyl; /* "real" number of cyls */
26bcb879 592 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
593 unsigned int failures; /* current failure count */
594 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 595 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
596
597 u64 capacity64; /* total number of sectors */
598
599 int lun; /* logical unit */
600 int crc_count; /* crc counter to reduce drive speed */
b22b2ca4
BP
601
602 unsigned long debug_mask; /* debugging levels switch */
603
e3a59b4d
HR
604#ifdef CONFIG_BLK_DEV_IDEACPI
605 struct ide_acpi_drive_link *acpidata;
606#endif
1da177e4
LT
607 struct list_head list;
608 struct device gendev;
f36d4024 609 struct completion gendev_rel_comp; /* to deal with device release() */
d7c26ebb 610
2b9efba4
BZ
611 /* current packet command */
612 struct ide_atapi_pc *pc;
613
d7c26ebb 614 /* callback for packet commands */
b14c7212 615 void (*pc_callback)(struct ide_drive_s *, int);
3b8ac539 616
85e39035
BZ
617 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
618 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
619 unsigned int, int);
620
d6251d44
BP
621 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
622
3b8ac539 623 unsigned long atapi_flags;
67c56364
BZ
624
625 struct ide_atapi_pc request_sense_pc;
626 struct request request_sense_rq;
d7c26ebb
BP
627};
628
629typedef struct ide_drive_s ide_drive_t;
1da177e4 630
5aeddf90
BP
631#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
632
633#define to_ide_drv(obj, cont_type) \
8fed4368 634 container_of(obj, struct cont_type, dev)
5aeddf90
BP
635
636#define ide_drv_g(disk, cont_type) \
637 container_of((disk)->private_data, struct cont_type, driver)
8604affd 638
039788e1 639struct ide_port_info;
1da177e4 640
374e042c
BZ
641struct ide_tp_ops {
642 void (*exec_command)(struct hwif_s *, u8);
643 u8 (*read_status)(struct hwif_s *);
644 u8 (*read_altstatus)(struct hwif_s *);
374e042c
BZ
645
646 void (*set_irq)(struct hwif_s *, int);
647
648 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
649 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
650
651 void (*input_data)(ide_drive_t *, struct request *, void *,
652 unsigned int);
653 void (*output_data)(ide_drive_t *, struct request *, void *,
654 unsigned int);
655};
656
657extern const struct ide_tp_ops default_tp_ops;
658
39b986a6
BZ
659/**
660 * struct ide_port_ops - IDE port operations
661 *
662 * @init_dev: host specific initialization of a device
663 * @set_pio_mode: routine to program host for PIO mode
664 * @set_dma_mode: routine to program host for DMA mode
665 * @selectproc: tweaks hardware to select drive
666 * @reset_poll: chipset polling based on hba specifics
667 * @pre_reset: chipset specific changes to default for device-hba resets
668 * @resetproc: routine to reset controller after a disk reset
669 * @maskproc: special host masking for drive selection
670 * @quirkproc: check host's drive quirk list
bfa7d8e5 671 * @clear_irq: clear IRQ
39b986a6
BZ
672 *
673 * @mdma_filter: filter MDMA modes
674 * @udma_filter: filter UDMA modes
675 *
676 * @cable_detect: detect cable type
677 */
ac95beed 678struct ide_port_ops {
e6d95bd1 679 void (*init_dev)(ide_drive_t *);
ac95beed 680 void (*set_pio_mode)(ide_drive_t *, const u8);
ac95beed 681 void (*set_dma_mode)(ide_drive_t *, const u8);
ac95beed 682 void (*selectproc)(ide_drive_t *);
ac95beed 683 int (*reset_poll)(ide_drive_t *);
ac95beed 684 void (*pre_reset)(ide_drive_t *);
ac95beed 685 void (*resetproc)(ide_drive_t *);
ac95beed 686 void (*maskproc)(ide_drive_t *, int);
ac95beed 687 void (*quirkproc)(ide_drive_t *);
bfa7d8e5 688 void (*clear_irq)(ide_drive_t *);
ac95beed
BZ
689
690 u8 (*mdma_filter)(ide_drive_t *);
691 u8 (*udma_filter)(ide_drive_t *);
692
693 u8 (*cable_detect)(struct hwif_s *);
694};
695
5e37bdc0
BZ
696struct ide_dma_ops {
697 void (*dma_host_set)(struct ide_drive_s *, int);
698 int (*dma_setup)(struct ide_drive_s *);
699 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
700 void (*dma_start)(struct ide_drive_s *);
701 int (*dma_end)(struct ide_drive_s *);
702 int (*dma_test_irq)(struct ide_drive_s *);
703 void (*dma_lost_irq)(struct ide_drive_s *);
704 void (*dma_timeout)(struct ide_drive_s *);
592b5315
SS
705 /*
706 * The following method is optional and only required to be
707 * implemented for the SFF-8038i compatible controllers.
708 */
709 u8 (*dma_sff_read_status)(struct hwif_s *);
5e37bdc0
BZ
710};
711
08da591e
BZ
712struct ide_host;
713
1da177e4 714typedef struct hwif_s {
1da177e4 715 struct hwif_s *mate; /* other hwif from same PCI chip */
1da177e4
LT
716 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
717
08da591e
BZ
718 struct ide_host *host;
719
1da177e4
LT
720 char name[6]; /* name of interface, eg. "ide0" */
721
4c3032d8
BZ
722 struct ide_io_ports io_ports;
723
1da177e4 724 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 725
2bd24a1c 726 ide_drive_t *devices[MAX_DRIVES + 1];
1da177e4
LT
727
728 u8 major; /* our major number */
729 u8 index; /* 0 for ide0; 1 for ide1; ... */
730 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4 731
e95d9c6b 732 u32 host_flags;
6a824c92 733
4099d143
BZ
734 u8 pio_mask;
735
1da177e4
LT
736 u8 ultra_mask;
737 u8 mwdma_mask;
738 u8 swdma_mask;
739
49521f97
BZ
740 u8 cbl; /* cable type */
741
1da177e4
LT
742 hwif_chipset_t chipset; /* sub-module for tuning.. */
743
36501650
BZ
744 struct device *dev;
745
18e181fe
BZ
746 ide_ack_intr_t *ack_intr;
747
1da177e4
LT
748 void (*rw_disk)(ide_drive_t *, struct request *);
749
374e042c 750 const struct ide_tp_ops *tp_ops;
ac95beed 751 const struct ide_port_ops *port_ops;
f37afdac 752 const struct ide_dma_ops *dma_ops;
bfa14b42 753
1da177e4
LT
754 /* dma physical region descriptor table (cpu view) */
755 unsigned int *dmatable_cpu;
756 /* dma physical region descriptor table (dma view) */
757 dma_addr_t dmatable_dma;
2bbd57ca
BZ
758
759 /* maximum number of PRD table entries */
760 int prd_max_nents;
761 /* PRD entry size in bytes */
762 int prd_ent_size;
763
1da177e4
LT
764 /* Scatter-gather list used to build the above */
765 struct scatterlist *sg_table;
766 int sg_max_nents; /* Maximum number of entries in it */
767 int sg_nents; /* Current number of entries in it */
5d82720a 768 int orig_sg_nents;
1da177e4
LT
769 int sg_dma_direction; /* dma transfer direction */
770
771 /* data phase of the active command (currently only valid for PIO/DMA) */
772 int data_phase;
773
d6ff9f64
BZ
774 struct ide_task_s task; /* current command */
775
1da177e4
LT
776 unsigned int nsect;
777 unsigned int nleft;
55c16a70 778 struct scatterlist *cursg;
1da177e4
LT
779 unsigned int cursg_ofs;
780
1da177e4
LT
781 int rqsize; /* max sectors per request */
782 int irq; /* our irq number */
783
1da177e4 784 unsigned long dma_base; /* base addr for dma ports */
1da177e4 785
1da177e4
LT
786 unsigned long config_data; /* for use by chipset-specific code */
787 unsigned long select_data; /* for use by chipset-specific code */
788
020e322d
SS
789 unsigned long extra_base; /* extra addr for dma ports */
790 unsigned extra_ports; /* number of extra dma ports */
791
1da177e4 792 unsigned present : 1; /* this interface exists */
5b31f855 793 unsigned busy : 1; /* serializes devices on a port */
1da177e4 794
f74c9141
BZ
795 struct device gendev;
796 struct device *portdev;
797
f36d4024 798 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
799
800 void *hwif_data; /* extra hwif data */
801
e3a59b4d
HR
802#ifdef CONFIG_BLK_DEV_IDEACPI
803 struct ide_acpi_hwif_link *acpidata;
804#endif
b65fac32
BZ
805
806 /* IRQ handler, if active */
807 ide_startstop_t (*handler)(ide_drive_t *);
808
809 /* BOOL: polling active & poll_timeout field valid */
810 unsigned int polling : 1;
811
812 /* current drive */
813 ide_drive_t *cur_dev;
814
815 /* current request */
816 struct request *rq;
817
818 /* failsafe timer */
819 struct timer_list timer;
820 /* timeout value during long polls */
821 unsigned long poll_timeout;
822 /* queried upon timeouts */
823 int (*expiry)(ide_drive_t *);
824
825 int req_gen;
826 int req_gen_timer;
827
828 spinlock_t lock;
22fc6ecc 829} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4 830
a36223b0
BZ
831#define MAX_HOST_PORTS 4
832
48c3c107 833struct ide_host {
2bd24a1c 834 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
48c3c107 835 unsigned int n_ports;
6cdf6eb3 836 struct device *dev[2];
e354c1d8 837
2ed0ef54 838 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
839
840 void (*get_lock)(irq_handler_t, void *);
841 void (*release_lock)(void);
842
849d7130 843 irq_handler_t irq_handler;
e354c1d8 844
ef0b0427 845 unsigned long host_flags;
255115fb
BZ
846
847 int irq_flags;
848
6cdf6eb3 849 void *host_priv;
bd53cbcc 850 ide_hwif_t *cur_port; /* for hosts requiring serialization */
5b31f855
BZ
851
852 /* used for hosts requiring serialization */
e720b9e4 853 volatile unsigned long host_busy;
48c3c107
BZ
854};
855
5b31f855
BZ
856#define IDE_HOST_BUSY 0
857
1da177e4
LT
858/*
859 * internal ide interrupt handler type
860 */
1da177e4
LT
861typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
862typedef int (ide_expiry_t)(ide_drive_t *);
863
0eea6458 864/* used by ide-cd, ide-floppy, etc. */
9567b349 865typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
0eea6458 866
f9383c42 867extern struct mutex ide_setting_mtx;
1da177e4 868
92f1f8fd
EO
869/*
870 * configurable drive settings
871 */
872
873#define DS_SYNC (1 << 0)
874
875struct ide_devset {
876 int (*get)(ide_drive_t *);
877 int (*set)(ide_drive_t *, int);
878 unsigned int flags;
879};
880
881#define __DEVSET(_flags, _get, _set) { \
882 .flags = _flags, \
883 .get = _get, \
884 .set = _set, \
885}
7662d046 886
8185d5aa 887#define ide_devset_get(name, field) \
92f1f8fd 888static int get_##name(ide_drive_t *drive) \
8185d5aa
BZ
889{ \
890 return drive->field; \
891}
892
893#define ide_devset_set(name, field) \
92f1f8fd 894static int set_##name(ide_drive_t *drive, int arg) \
8185d5aa
BZ
895{ \
896 drive->field = arg; \
897 return 0; \
898}
899
97100fc8
BZ
900#define ide_devset_get_flag(name, flag) \
901static int get_##name(ide_drive_t *drive) \
902{ \
903 return !!(drive->dev_flags & flag); \
904}
905
906#define ide_devset_set_flag(name, flag) \
907static int set_##name(ide_drive_t *drive, int arg) \
908{ \
909 if (arg) \
910 drive->dev_flags |= flag; \
911 else \
912 drive->dev_flags &= ~flag; \
913 return 0; \
914}
915
92f1f8fd
EO
916#define __IDE_DEVSET(_name, _flags, _get, _set) \
917const struct ide_devset ide_devset_##_name = \
918 __DEVSET(_flags, _get, _set)
919
920#define IDE_DEVSET(_name, _flags, _get, _set) \
921static __IDE_DEVSET(_name, _flags, _get, _set)
922
923#define ide_devset_rw(_name, _func) \
924IDE_DEVSET(_name, 0, get_##_func, set_##_func)
925
926#define ide_devset_w(_name, _func) \
927IDE_DEVSET(_name, 0, NULL, set_##_func)
928
f8790489
BZ
929#define ide_ext_devset_rw(_name, _func) \
930__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
931
932#define ide_ext_devset_rw_sync(_name, _func) \
933__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
92f1f8fd
EO
934
935#define ide_decl_devset(_name) \
936extern const struct ide_devset ide_devset_##_name
937
938ide_decl_devset(io_32bit);
939ide_decl_devset(keepsettings);
940ide_decl_devset(pio_mode);
941ide_decl_devset(unmaskirq);
942ide_decl_devset(using_dma);
943
7662d046 944#ifdef CONFIG_IDE_PROC_FS
1da177e4 945/*
92f1f8fd 946 * /proc/ide interface
1da177e4
LT
947 */
948
92f1f8fd
EO
949#define ide_devset_rw_field(_name, _field) \
950ide_devset_get(_name, _field); \
951ide_devset_set(_name, _field); \
952IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
953
97100fc8
BZ
954#define ide_devset_rw_flag(_name, _field) \
955ide_devset_get_flag(_name, _field); \
956ide_devset_set_flag(_name, _field); \
957IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
958
92f1f8fd
EO
959struct ide_proc_devset {
960 const char *name;
961 const struct ide_devset *setting;
962 int min, max;
963 int (*mulf)(ide_drive_t *);
964 int (*divf)(ide_drive_t *);
8185d5aa
BZ
965};
966
92f1f8fd
EO
967#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
968 .name = __stringify(_name), \
969 .setting = &ide_devset_##_name, \
970 .min = _min, \
971 .max = _max, \
972 .mulf = _mulf, \
973 .divf = _divf, \
8185d5aa
BZ
974}
975
92f1f8fd
EO
976#define IDE_PROC_DEVSET(_name, _min, _max) \
977__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
8185d5aa 978
1da177e4
LT
979typedef struct {
980 const char *name;
981 mode_t mode;
982 read_proc_t *read_proc;
983 write_proc_t *write_proc;
984} ide_proc_entry_t;
985
ecfd80e4
BZ
986void proc_ide_create(void);
987void proc_ide_destroy(void);
5cbf79cd 988void ide_proc_register_port(ide_hwif_t *);
d9270a3f 989void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 990void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 991void ide_proc_unregister_port(ide_hwif_t *);
7f3c868b
BZ
992void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
993void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
7662d046 994
1da177e4
LT
995read_proc_t proc_ide_read_capacity;
996read_proc_t proc_ide_read_geometry;
997
1da177e4
LT
998/*
999 * Standard exit stuff:
1000 */
1001#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
1002{ \
1003 len -= off; \
1004 if (len < count) { \
1005 *eof = 1; \
1006 if (len <= 0) \
1007 return 0; \
1008 } else \
1009 len = count; \
1010 *start = page + off; \
1011 return len; \
1012}
1013#else
ecfd80e4
BZ
1014static inline void proc_ide_create(void) { ; }
1015static inline void proc_ide_destroy(void) { ; }
5cbf79cd 1016static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 1017static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 1018static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 1019static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7f3c868b
BZ
1020static inline void ide_proc_register_driver(ide_drive_t *drive,
1021 struct ide_driver *driver) { ; }
1022static inline void ide_proc_unregister_driver(ide_drive_t *drive,
1023 struct ide_driver *driver) { ; }
1da177e4
LT
1024#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
1025#endif
1026
e1c7c464
BP
1027enum {
1028 /* enter/exit functions */
1029 IDE_DBG_FUNC = (1 << 0),
1030 /* sense key/asc handling */
1031 IDE_DBG_SENSE = (1 << 1),
1032 /* packet commands handling */
1033 IDE_DBG_PC = (1 << 2),
1034 /* request handling */
1035 IDE_DBG_RQ = (1 << 3),
1036 /* driver probing/setup */
1037 IDE_DBG_PROBE = (1 << 4),
1038};
1039
1040/* DRV_NAME has to be defined in the driver before using the macro below */
088b1b88
BP
1041#define __ide_debug_log(lvl, fmt, args...) \
1042{ \
1043 if (unlikely(drive->debug_mask & lvl)) \
1044 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1045 __func__, ## args); \
e1c7c464
BP
1046}
1047
1da177e4 1048/*
0d346ba0 1049 * Power Management state machine (rq->pm->pm_step).
1da177e4 1050 *
0d346ba0 1051 * For each step, the core calls ide_start_power_step() first.
1da177e4
LT
1052 * This can return:
1053 * - ide_stopped : In this case, the core calls us back again unless
1054 * step have been set to ide_power_state_completed.
1055 * - ide_started : In this case, the channel is left busy until an
1056 * async event (interrupt) occurs.
0d346ba0 1057 * Typically, ide_start_power_step() will issue a taskfile request with
1da177e4
LT
1058 * do_rw_taskfile().
1059 *
0d346ba0 1060 * Upon reception of the interrupt, the core will call ide_complete_power_step()
1da177e4
LT
1061 * with the error code if any. This routine should update the step value
1062 * and return. It should not start a new request. The core will call
0d346ba0
BZ
1063 * ide_start_power_step() for the new step value, unless step have been
1064 * set to IDE_PM_COMPLETED.
1da177e4 1065 */
1da177e4 1066enum {
0d346ba0
BZ
1067 IDE_PM_START_SUSPEND,
1068 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1069 IDE_PM_STANDBY,
1070
1071 IDE_PM_START_RESUME,
1072 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1073 IDE_PM_IDLE,
1074 IDE_PM_RESTORE_DMA,
1075
1076 IDE_PM_COMPLETED,
1da177e4
LT
1077};
1078
e2984c62
BZ
1079int generic_ide_suspend(struct device *, pm_message_t);
1080int generic_ide_resume(struct device *);
1081
1082void ide_complete_power_step(ide_drive_t *, struct request *);
1083ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
3616b653 1084void ide_complete_pm_rq(ide_drive_t *, struct request *);
e2984c62
BZ
1085void ide_check_pm_state(ide_drive_t *, struct request *);
1086
1da177e4
LT
1087/*
1088 * Subdrivers support.
4ef3b8f4
LR
1089 *
1090 * The gendriver.owner field should be set to the module owner of this driver.
1091 * The gendriver.name field should be set to the name of this driver
1da177e4 1092 */
7f3c868b 1093struct ide_driver {
1da177e4 1094 const char *version;
1da177e4
LT
1095 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1096 int (*end_request)(ide_drive_t *, int, int);
1da177e4 1097 struct device_driver gen_driver;
4031bbe4
RK
1098 int (*probe)(ide_drive_t *);
1099 void (*remove)(ide_drive_t *);
0d2157f7 1100 void (*resume)(ide_drive_t *);
4031bbe4 1101 void (*shutdown)(ide_drive_t *);
7662d046 1102#ifdef CONFIG_IDE_PROC_FS
79cb3803
BZ
1103 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1104 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
7662d046
BZ
1105#endif
1106};
1da177e4 1107
7f3c868b 1108#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
4031bbe4 1109
08da591e
BZ
1110int ide_device_get(ide_drive_t *);
1111void ide_device_put(ide_drive_t *);
1112
aa768773
BZ
1113struct ide_ioctl_devset {
1114 unsigned int get_ioctl;
1115 unsigned int set_ioctl;
92f1f8fd 1116 const struct ide_devset *setting;
aa768773
BZ
1117};
1118
1119int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1120 unsigned long, const struct ide_ioctl_devset *);
1121
1bddd9e6 1122int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1da177e4 1123
ebae41a5
BZ
1124extern int ide_vlb_clk;
1125extern int ide_pci_clk;
1126
327fa1c2
BZ
1127int ide_end_request(ide_drive_t *, int, int);
1128int ide_end_dequeued_request(ide_drive_t *, struct request *, int, int);
1129void ide_kill_rq(ide_drive_t *, struct request *);
1130
1131void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int,
1132 ide_expiry_t *);
1133void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int,
1134 ide_expiry_t *);
1da177e4 1135
cd2a2d96
BZ
1136void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
1137 ide_expiry_t *);
1da177e4 1138
1fc14258
BZ
1139void ide_execute_pkt_cmd(ide_drive_t *);
1140
9f87abe8
BZ
1141void ide_pad_transfer(ide_drive_t *, int, int);
1142
9892ec54 1143ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1da177e4 1144
4dde4492 1145void ide_fix_driveid(u16 *);
01745112 1146
1da177e4
LT
1147extern void ide_fixstring(u8 *, const int, const int);
1148
b163f46d
BZ
1149int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
1150
74af21cf 1151int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 1152
c4e66c36 1153ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
11938c92 1154ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
c4e66c36 1155
1da177e4
LT
1156extern ide_startstop_t ide_do_reset (ide_drive_t *);
1157
92f1f8fd
EO
1158extern int ide_devset_execute(ide_drive_t *drive,
1159 const struct ide_devset *setting, int arg);
1160
1da177e4
LT
1161extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
1162
089c5c7e 1163void ide_tf_dump(const char *, struct ide_taskfile *);
1da177e4 1164
374e042c
BZ
1165void ide_exec_command(ide_hwif_t *, u8);
1166u8 ide_read_status(ide_hwif_t *);
1167u8 ide_read_altstatus(ide_hwif_t *);
374e042c
BZ
1168
1169void ide_set_irq(ide_hwif_t *, int);
1170
1171void ide_tf_load(ide_drive_t *, ide_task_t *);
1172void ide_tf_read(ide_drive_t *, ide_task_t *);
1173
1174void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
1175void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
1176
acaa0f5f
BZ
1177int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
1178
1da177e4 1179extern void SELECT_DRIVE(ide_drive_t *);
ed4af48f 1180void SELECT_MASK(ide_drive_t *, int);
1da177e4 1181
92eb4380 1182u8 ide_read_error(ide_drive_t *);
1823649b 1183void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
92eb4380 1184
51509eec
BZ
1185int ide_check_atapi_device(ide_drive_t *, const char *);
1186
7bf7420a
BZ
1187void ide_init_pc(struct ide_atapi_pc *);
1188
4abdc6ee
EO
1189/* Disk head parking */
1190extern wait_queue_head_t ide_park_wq;
1191ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1192 char *buf);
1193ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1194 const char *buf, size_t len);
1195
7645c151
BZ
1196/*
1197 * Special requests for ide-tape block device strategy routine.
1198 *
1199 * In order to service a character device command, we add special requests to
1200 * the tail of our block device request queue and wait for their completion.
1201 */
1202enum {
1203 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
1204 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
1205 REQ_IDETAPE_READ = (1 << 2),
1206 REQ_IDETAPE_WRITE = (1 << 3),
1207};
1208
2ac07d92 1209int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
7645c151 1210
de699ad5 1211int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
0c8a6c7a 1212int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
0578042d 1213int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
6b0da28b
BZ
1214void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1215void ide_retry_pc(ide_drive_t *, struct gendisk *);
0578042d 1216
4cad085e 1217int ide_cd_expiry(ide_drive_t *);
844b9468 1218
392de1d5
BP
1219int ide_cd_get_xferlen(struct request *);
1220
28ad91db 1221ide_startstop_t ide_issue_pc(ide_drive_t *);
594c16d8 1222
f6e29e35 1223ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 1224
4d7a984b
TH
1225void task_end_request(ide_drive_t *, struct request *, u8);
1226
ac026ff2 1227int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
1228int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1229
1da177e4 1230int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1da177e4 1231
2ebe1d9e
BZ
1232int ide_dev_read_id(ide_drive_t *, u8, u16 *);
1233
1da177e4 1234extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
1235extern int ide_config_drive_speed(ide_drive_t *, u8);
1236extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
1237extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1238
1239extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1240
1da177e4
LT
1241extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1242
1da177e4 1243extern void ide_timer_expiry(unsigned long);
7d12e780 1244extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 1245extern void do_ide_request(struct request_queue *);
1da177e4
LT
1246
1247void ide_init_disk(struct gendisk *, ide_drive_t *);
1248
6d208b39 1249#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
1250extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1251#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
1252#else
1253#define ide_pci_register_driver(d) pci_register_driver(d)
1254#endif
1255
6636487e
BZ
1256static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1257{
1258 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1259 return 1;
1260 return 0;
1261}
1262
86ccf37c 1263void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
48c3c107 1264 hw_regs_t *, hw_regs_t **);
85620436 1265void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1266
8e882ba1 1267#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1268int ide_pci_set_master(struct pci_dev *, const char *);
1269unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
ebb00fb5 1270int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
b123f56e 1271int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1272#else
b123f56e
BZ
1273static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1274 const struct ide_port_info *d)
1275{
1276 return -EINVAL;
1277}
c413b9b9
BZ
1278#endif
1279
c0ae5023 1280struct ide_pci_enablebit {
1da177e4
LT
1281 u8 reg; /* byte pci reg holding the enable-bit */
1282 u8 mask; /* mask to isolate the enable-bit */
1283 u8 val; /* value of masked reg when "enabled" */
c0ae5023 1284};
1da177e4
LT
1285
1286enum {
1287 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1288 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1289 /* single port device */
a5d8c5c8 1290 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1291 /* don't use legacy PIO blacklist */
1292 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1293 /* set for the second port of QD65xx */
1294 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1295 /* use PIO8/9 for prefetch off/on */
1296 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1297 /* use PIO6/7 for fast-devsel off/on */
1298 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1299 /* use 100-102 and 200-202 PIO values to set DMA modes */
1300 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1301 /*
1302 * keep DMA setting when programming PIO mode, may be used only
1303 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1304 */
1305 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1306 /* program host for the transfer mode after programming device */
1307 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1308 /* don't program host/device for the transfer mode ("smart" hosts) */
1309 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1310 /* trust BIOS for programming chipset/device for DMA */
1311 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
cafa027b
BZ
1312 /* host is CS5510/CS5520 */
1313 IDE_HFLAG_CS5520 = (1 << 11),
33c1002e
BZ
1314 /* ATAPI DMA is unsupported */
1315 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1316 /* set if host is a "non-bootable" controller */
1317 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1318 /* host doesn't support DMA */
1319 IDE_HFLAG_NO_DMA = (1 << 14),
1320 /* check if host is PCI IDE device before allowing DMA */
1321 IDE_HFLAG_NO_AUTODMA = (1 << 15),
c5dd43ec
BZ
1322 /* host uses MMIO */
1323 IDE_HFLAG_MMIO = (1 << 16),
238e4f14
BZ
1324 /* no LBA48 */
1325 IDE_HFLAG_NO_LBA48 = (1 << 17),
1326 /* no LBA48 DMA */
1327 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1328 /* data FIFO is cleared by an error */
1329 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1330 /* serialize ports */
1331 IDE_HFLAG_SERIALIZE = (1 << 20),
2787cb8a
BZ
1332 /* host is DTC2278 */
1333 IDE_HFLAG_DTC2278 = (1 << 21),
c094ea07
BZ
1334 /* 4 devices on a single set of I/O ports */
1335 IDE_HFLAG_4DRIVES = (1 << 22),
1f66019b
BZ
1336 /* host is TRM290 */
1337 IDE_HFLAG_TRM290 = (1 << 23),
caea7602
BZ
1338 /* use 32-bit I/O ops */
1339 IDE_HFLAG_IO_32BIT = (1 << 24),
1340 /* unmask IRQs */
1341 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
6636487e 1342 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1fd18905
BZ
1343 /* serialize ports if DMA is possible (for sl82c105) */
1344 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1345 /* force host out of "simplex" mode */
1346 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1347 /* DSC overlap is unsupported */
1348 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1349 /* never use 32-bit I/O ops */
1350 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1351 /* never unmask IRQs */
1352 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1353};
1354
7cab14a7 1355#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1356# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1357#else
1358# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1359#endif
1360
039788e1 1361struct ide_port_info {
1da177e4 1362 char *name;
e354c1d8 1363
2ed0ef54 1364 int (*init_chipset)(struct pci_dev *);
e354c1d8
BZ
1365
1366 void (*get_lock)(irq_handler_t, void *);
1367 void (*release_lock)(void);
1368
1da177e4
LT
1369 void (*init_iops)(ide_hwif_t *);
1370 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1371 int (*init_dma)(ide_hwif_t *,
1372 const struct ide_port_info *);
ac95beed 1373
374e042c 1374 const struct ide_tp_ops *tp_ops;
ac95beed 1375 const struct ide_port_ops *port_ops;
f37afdac 1376 const struct ide_dma_ops *dma_ops;
ac95beed 1377
c0ae5023
BZ
1378 struct ide_pci_enablebit enablebits[2];
1379
528a572d 1380 hwif_chipset_t chipset;
6b492496
BZ
1381
1382 u16 max_sectors; /* if < than the default one */
1383
9ffcf364 1384 u32 host_flags;
255115fb
BZ
1385
1386 int irq_flags;
1387
4099d143 1388 u8 pio_mask;
5f8b6c34
BZ
1389 u8 swdma_mask;
1390 u8 mwdma_mask;
18137207 1391 u8 udma_mask;
039788e1 1392};
1da177e4 1393
6cdf6eb3
BZ
1394int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1395int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1396 const struct ide_port_info *, void *);
ef0b0427 1397void ide_pci_remove(struct pci_dev *);
1da177e4 1398
feb22b7f
BZ
1399#ifdef CONFIG_PM
1400int ide_pci_suspend(struct pci_dev *, pm_message_t);
1401int ide_pci_resume(struct pci_dev *);
1402#else
1403#define ide_pci_suspend NULL
1404#define ide_pci_resume NULL
1405#endif
1406
1da177e4
LT
1407void ide_map_sg(ide_drive_t *, struct request *);
1408void ide_init_sg_cmd(ide_drive_t *, struct request *);
1409
1410#define BAD_DMA_DRIVE 0
1411#define GOOD_DMA_DRIVE 1
1412
65e5f2e3
JC
1413struct drive_list_entry {
1414 const char *id_model;
1415 const char *id_firmware;
1416};
1417
4dde4492 1418int ide_in_drive_list(u16 *, const struct drive_list_entry *);
a5b7e70d
BZ
1419
1420#ifdef CONFIG_BLK_DEV_IDEDMA
2dbe7e91 1421int ide_dma_good_drive(ide_drive_t *);
1da177e4 1422int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1423int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1424
1425u8 ide_find_dma_mode(ide_drive_t *, u8);
1426
1427static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1428{
1429 return ide_find_dma_mode(drive, XFER_UDMA_6);
1430}
1431
4a546e04 1432void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1433void ide_dma_off(ide_drive_t *);
4a546e04 1434void ide_dma_on(ide_drive_t *);
3608b5d7 1435int ide_set_dma(ide_drive_t *);
578cfa0d 1436void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1437ide_startstop_t ide_dma_intr(ide_drive_t *);
1438
2bbd57ca
BZ
1439int ide_allocate_dma_engine(ide_hwif_t *);
1440void ide_release_dma_engine(ide_hwif_t *);
1441
062f9f02
BZ
1442int ide_build_sglist(ide_drive_t *, struct request *);
1443void ide_destroy_dmatable(ide_drive_t *);
1444
8e882ba1 1445#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
2dbe7e91 1446int config_drive_for_dma(ide_drive_t *);
1da177e4 1447extern int ide_build_dmatable(ide_drive_t *, struct request *);
15ce926a 1448void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1449extern int ide_dma_setup(ide_drive_t *);
f37afdac 1450void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4 1451extern void ide_dma_start(ide_drive_t *);
653bcf52 1452int ide_dma_end(ide_drive_t *);
f37afdac 1453int ide_dma_test_irq(ide_drive_t *);
592b5315 1454u8 ide_dma_sff_read_status(ide_hwif_t *);
71fc9fcc 1455extern const struct ide_dma_ops sff_dma_ops;
2dbe7e91
BZ
1456#else
1457static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
8e882ba1 1458#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4 1459
de23ec9c 1460void ide_dma_lost_irq(ide_drive_t *);
ffa15a69 1461void ide_dma_timeout(ide_drive_t *);
65ca5377 1462ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
de23ec9c 1463
1da177e4 1464#else
3ab7efe8 1465static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1466static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1467static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1468static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1469static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1470static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1471static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1472static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1473static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
65ca5377 1474static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
0d1bad21 1475static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
2bbd57ca 1476#endif /* CONFIG_BLK_DEV_IDEDMA */
1da177e4 1477
e3a59b4d 1478#ifdef CONFIG_BLK_DEV_IDEACPI
8b803bd1 1479int ide_acpi_init(void);
e3a59b4d
HR
1480extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1481extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1482extern void ide_acpi_push_timing(ide_hwif_t *hwif);
8b803bd1 1483void ide_acpi_init_port(ide_hwif_t *);
eafd88a3 1484void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1485extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d 1486#else
8b803bd1 1487static inline int ide_acpi_init(void) { return 0; }
e3a59b4d
HR
1488static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1489static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1490static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
8b803bd1 1491static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
eafd88a3 1492static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1493static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1494#endif
1495
1da177e4
LT
1496void ide_register_region(struct gendisk *);
1497void ide_unregister_region(struct gendisk *);
1498
f01393e4 1499void ide_undecoded_slave(ide_drive_t *);
1da177e4 1500
9fd91d95 1501void ide_port_apply_params(ide_hwif_t *);
ebdab07d 1502int ide_sysfs_register_port(ide_hwif_t *);
9fd91d95 1503
48c3c107 1504struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
8a69580e 1505void ide_host_free(struct ide_host *);
48c3c107
BZ
1506int ide_host_register(struct ide_host *, const struct ide_port_info *,
1507 hw_regs_t **);
6f904d01
BZ
1508int ide_host_add(const struct ide_port_info *, hw_regs_t **,
1509 struct ide_host **);
48c3c107 1510void ide_host_remove(struct ide_host *);
0bfeee7d 1511int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1512void ide_port_unregister_devices(ide_hwif_t *);
1513void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1514
1515static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1516{
1517 return hwif->hwif_data;
1518}
1519
1520static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1521{
1522 hwif->hwif_data = data;
1523}
1524
1da177e4 1525extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1da177e4 1526
a501633c 1527u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1528u8 ide_dump_status(ide_drive_t *, const char *, u8);
1529
3be53f3f
BZ
1530struct ide_timing {
1531 u8 mode;
1532 u8 setup; /* t1 */
1533 u16 act8b; /* t2 for 8-bit io */
1534 u16 rec8b; /* t2i for 8-bit io */
1535 u16 cyc8b; /* t0 for 8-bit io */
1536 u16 active; /* t2 or tD */
1537 u16 recover; /* t2i or tK */
1538 u16 cycle; /* t0 */
1539 u16 udma; /* t2CYCTYP/2 */
1540};
1541
1542enum {
1543 IDE_TIMING_SETUP = (1 << 0),
1544 IDE_TIMING_ACT8B = (1 << 1),
1545 IDE_TIMING_REC8B = (1 << 2),
1546 IDE_TIMING_CYC8B = (1 << 3),
1547 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1548 IDE_TIMING_CYC8B,
1549 IDE_TIMING_ACTIVE = (1 << 4),
1550 IDE_TIMING_RECOVER = (1 << 5),
1551 IDE_TIMING_CYCLE = (1 << 6),
1552 IDE_TIMING_UDMA = (1 << 7),
1553 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1554 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1555 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1556};
1557
f06ab340 1558struct ide_timing *ide_timing_find_mode(u8);
c9d6c1a2 1559u16 ide_pio_cycle_time(ide_drive_t *, u8);
f06ab340
BZ
1560void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1561 struct ide_timing *, unsigned int);
1562int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1563
7eeaaaa5 1564#ifdef CONFIG_IDE_XFER_MODE
9ad54093 1565int ide_scan_pio_blacklist(char *);
7eeaaaa5 1566const char *ide_xfer_verbose(u8);
2134758d 1567u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
88b2b32b
BZ
1568int ide_set_pio_mode(ide_drive_t *, u8);
1569int ide_set_dma_mode(ide_drive_t *, u8);
26bcb879 1570void ide_set_pio(ide_drive_t *, u8);
7eeaaaa5
BZ
1571int ide_set_xfer_rate(ide_drive_t *, u8);
1572#else
1573static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1574static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1575#endif
26bcb879
BZ
1576
1577static inline void ide_set_max_pio(ide_drive_t *drive)
1578{
1579 ide_set_pio(drive, 255);
1580}
1da177e4 1581
ebdab07d
BZ
1582char *ide_media_string(ide_drive_t *);
1583
1584extern struct device_attribute ide_dev_attrs[];
1da177e4 1585extern struct bus_type ide_bus_type;
f74c9141 1586extern struct class *ide_port_class;
1da177e4 1587
7b9f25b5
BZ
1588static inline void ide_dump_identify(u8 *id)
1589{
1590 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1591}
1592
86b37860
CL
1593static inline int hwif_to_node(ide_hwif_t *hwif)
1594{
96f80219 1595 return hwif->dev ? dev_to_node(hwif->dev) : -1;
86b37860
CL
1596}
1597
7e59ea21 1598static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1b678347 1599{
5e7f3a46 1600 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1b678347 1601
97100fc8 1602 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1b678347 1603}
2bd24a1c
BZ
1604
1605#define ide_port_for_each_dev(i, dev, port) \
1606 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1607
7ed5b157
BZ
1608#define ide_port_for_each_present_dev(i, dev, port) \
1609 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1610 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1611
2bd24a1c
BZ
1612#define ide_host_for_each_port(i, port, host) \
1613 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1614
1da177e4 1615#endif /* _IDE_H */
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