[PATCH] Intel ICH8 SATA: add PCI device IDs
[deliverable/linux.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT
24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT
33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
38 * compile-time options
39 */
40#undef ATA_DEBUG /* debugging output */
41#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
42#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
43#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT
44#undef ATA_ENABLE_PATA /* define to enable PATA support in some
45 * low-level drivers */
46#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
47
48
49/* note: prints function name for you */
50#ifdef ATA_DEBUG
51#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
52#ifdef ATA_VERBOSE_DEBUG
53#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
54#else
55#define VPRINTK(fmt, args...)
56#endif /* ATA_VERBOSE_DEBUG */
57#else
58#define DPRINTK(fmt, args...)
59#define VPRINTK(fmt, args...)
60#endif /* ATA_DEBUG */
61
2c13b7ce
JG
62#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
63
1da177e4
LT
64#ifdef ATA_NDEBUG
65#define assert(expr)
66#else
67#define assert(expr) \
68 if(unlikely(!(expr))) { \
69 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
70 #expr,__FILE__,__FUNCTION__,__LINE__); \
71 }
72#endif
73
74/* defines only for the constants which don't work well as enums */
75#define ATA_TAG_POISON 0xfafbfcfdU
76
77/* move to PCI layer? */
78static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
79{
80 return &pdev->dev;
81}
82
83enum {
84 /* various global constants */
85 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
86 ATA_MAX_PORTS = 8,
87 ATA_DEF_QUEUE = 1,
88 ATA_MAX_QUEUE = 1,
89 ATA_MAX_SECTORS = 200, /* FIXME */
90 ATA_MAX_BUS = 2,
91 ATA_DEF_BUSY_WAIT = 10000,
92 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
93
94 ATA_SHT_EMULATED = 1,
95 ATA_SHT_CMD_PER_LUN = 1,
96 ATA_SHT_THIS_ID = -1,
cf482935 97 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT
98
99 /* struct ata_device stuff */
100 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
101 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
102 ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */
8bf62ece 103 ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */
1da177e4
LT
104
105 ATA_DEV_UNKNOWN = 0, /* unknown device */
106 ATA_DEV_ATA = 1, /* ATA device */
107 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
108 ATA_DEV_ATAPI = 3, /* ATAPI device */
109 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
110 ATA_DEV_NONE = 5, /* no device */
111
112 /* struct ata_port flags */
113 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
114 /* (doesn't imply presence) */
115 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
116 ATA_FLAG_SATA = (1 << 3),
117 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
118 ATA_FLAG_SRST = (1 << 5), /* use ATA SRST, not E.D.D. */
119 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
120 ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */
121 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
c1389503
TH
122 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
123 * proper HSM is in place. */
2c13b7ce 124 ATA_FLAG_DEBUGMSG = (1 << 10),
50630195 125 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
1da177e4 126
9b847548
JA
127 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
128
1da177e4
LT
129 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
130 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
131 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
132 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
133
134 /* various lengths of time */
135 ATA_TMOUT_EDD = 5 * HZ, /* hueristic */
136 ATA_TMOUT_PIO = 30 * HZ,
137 ATA_TMOUT_BOOT = 30 * HZ, /* hueristic */
138 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* hueristic */
139 ATA_TMOUT_CDB = 30 * HZ,
140 ATA_TMOUT_CDB_QUICK = 5 * HZ,
a2a7a662
TH
141 ATA_TMOUT_INTERNAL = 30 * HZ,
142 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT
143
144 /* ATA bus states */
145 BUS_UNKNOWN = 0,
146 BUS_DMA = 1,
147 BUS_IDLE = 2,
148 BUS_NOINTR = 3,
149 BUS_NODATA = 4,
150 BUS_TIMER = 5,
151 BUS_PIO = 6,
152 BUS_EDD = 7,
153 BUS_IDENTIFY = 8,
154 BUS_PACKET = 9,
155
156 /* SATA port states */
157 PORT_UNKNOWN = 0,
158 PORT_ENABLED = 1,
159 PORT_DISABLED = 2,
160
161 /* encoding various smaller bitmaps into a single
162 * unsigned long bitmap
163 */
164 ATA_SHIFT_UDMA = 0,
165 ATA_SHIFT_MWDMA = 8,
166 ATA_SHIFT_PIO = 11,
cedc9a47
JG
167
168 /* size of buffer to pad xfers ending on unaligned boundaries */
169 ATA_DMA_PAD_SZ = 4,
170 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
47a86593
AC
171
172 /* Masks for port functions */
173 ATA_PORT_PRIMARY = (1 << 0),
174 ATA_PORT_SECONDARY = (1 << 1),
1da177e4
LT
175};
176
14be71f4
AL
177enum hsm_task_states {
178 HSM_ST_UNKNOWN,
179 HSM_ST_IDLE,
180 HSM_ST_POLL,
181 HSM_ST_TMOUT,
182 HSM_ST,
183 HSM_ST_LAST,
184 HSM_ST_LAST_POLL,
185 HSM_ST_ERR,
1da177e4
LT
186};
187
a7dac447
JG
188enum ata_completion_errors {
189 AC_ERR_OTHER = (1 << 0),
190 AC_ERR_DEV = (1 << 1),
191 AC_ERR_ATA_BUS = (1 << 2),
192 AC_ERR_HOST_BUS = (1 << 3),
193};
194
1da177e4
LT
195/* forward declarations */
196struct scsi_device;
197struct ata_port_operations;
198struct ata_port;
199struct ata_queued_cmd;
200
201/* typedefs */
a22e2eb0 202typedef int (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
1da177e4
LT
203
204struct ata_ioports {
205 unsigned long cmd_addr;
206 unsigned long data_addr;
207 unsigned long error_addr;
208 unsigned long feature_addr;
209 unsigned long nsect_addr;
210 unsigned long lbal_addr;
211 unsigned long lbam_addr;
212 unsigned long lbah_addr;
213 unsigned long device_addr;
214 unsigned long status_addr;
215 unsigned long command_addr;
216 unsigned long altstatus_addr;
217 unsigned long ctl_addr;
218 unsigned long bmdma_addr;
219 unsigned long scr_addr;
220};
221
222struct ata_probe_ent {
223 struct list_head node;
224 struct device *dev;
057ace5e 225 const struct ata_port_operations *port_ops;
193515d5 226 struct scsi_host_template *sht;
1da177e4
LT
227 struct ata_ioports port[ATA_MAX_PORTS];
228 unsigned int n_ports;
229 unsigned int hard_port_no;
230 unsigned int pio_mask;
231 unsigned int mwdma_mask;
232 unsigned int udma_mask;
233 unsigned int legacy_mode;
234 unsigned long irq;
235 unsigned int irq_flags;
236 unsigned long host_flags;
237 void __iomem *mmio_base;
238 void *private_data;
239};
240
241struct ata_host_set {
242 spinlock_t lock;
243 struct device *dev;
244 unsigned long irq;
245 void __iomem *mmio_base;
246 unsigned int n_ports;
247 void *private_data;
057ace5e 248 const struct ata_port_operations *ops;
1da177e4
LT
249 struct ata_port * ports[0];
250};
251
252struct ata_queued_cmd {
253 struct ata_port *ap;
254 struct ata_device *dev;
255
256 struct scsi_cmnd *scsicmd;
257 void (*scsidone)(struct scsi_cmnd *);
258
259 struct ata_taskfile tf;
260 u8 cdb[ATAPI_CDB_LEN];
261
262 unsigned long flags; /* ATA_QCFLAG_xxx */
263 unsigned int tag;
264 unsigned int n_elem;
cedc9a47 265 unsigned int orig_n_elem;
1da177e4
LT
266
267 int dma_dir;
268
cedc9a47
JG
269 unsigned int pad_len;
270
1da177e4
LT
271 unsigned int nsect;
272 unsigned int cursect;
273
274 unsigned int nbytes;
275 unsigned int curbytes;
276
277 unsigned int cursg;
278 unsigned int cursg_ofs;
279
280 struct scatterlist sgent;
cedc9a47 281 struct scatterlist pad_sgent;
1da177e4
LT
282 void *buf_virt;
283
cedc9a47
JG
284 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
285 struct scatterlist *__sg;
1da177e4 286
a22e2eb0
AL
287 unsigned int err_mask;
288
1da177e4
LT
289 ata_qc_cb_t complete_fn;
290
1da177e4
LT
291 void *private_data;
292};
293
294struct ata_host_stats {
295 unsigned long unhandled_irq;
296 unsigned long idle_irq;
297 unsigned long rw_reqbuf;
298};
299
300struct ata_device {
301 u64 n_sectors; /* size of device, if ATA */
302 unsigned long flags; /* ATA_DFLAG_xxx */
303 unsigned int class; /* ATA_DEV_xxx */
304 unsigned int devno; /* 0 or 1 */
305 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
306 u8 pio_mode;
307 u8 dma_mode;
308 u8 xfer_mode;
309 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
310
8cbd6df1
AL
311 unsigned int multi_count; /* sectors count for
312 READ/WRITE MULTIPLE */
8bf62ece
AL
313
314 /* for CHS addressing */
315 u16 cylinders; /* Number of cylinders */
316 u16 heads; /* Number of heads */
317 u16 sectors; /* Number of sectors per track */
1da177e4
LT
318};
319
320struct ata_port {
321 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 322 const struct ata_port_operations *ops;
1da177e4
LT
323 unsigned long flags; /* ATA_FLAG_xxx */
324 unsigned int id; /* unique id req'd by scsi midlyr */
325 unsigned int port_no; /* unique port #; from zero */
326 unsigned int hard_port_no; /* hardware port #; from zero */
327
328 struct ata_prd *prd; /* our SG list */
329 dma_addr_t prd_dma; /* and its DMA mapping */
330
cedc9a47
JG
331 void *pad; /* array of DMA pad buffers */
332 dma_addr_t pad_dma;
333
1da177e4
LT
334 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
335
336 u8 ctl; /* cache of ATA control register */
337 u8 last_ctl; /* Cache last written value */
1da177e4
LT
338 unsigned int pio_mask;
339 unsigned int mwdma_mask;
340 unsigned int udma_mask;
341 unsigned int cbl; /* cable type; ATA_CBL_xxx */
342 unsigned int cdb_len;
343
344 struct ata_device device[ATA_MAX_DEVICES];
345
346 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
347 unsigned long qactive;
348 unsigned int active_tag;
349
350 struct ata_host_stats stats;
351 struct ata_host_set *host_set;
352
353 struct work_struct packet_task;
354
355 struct work_struct pio_task;
14be71f4 356 unsigned int hsm_task_state;
1da177e4
LT
357 unsigned long pio_task_timeout;
358
359 void *private_data;
360};
361
362struct ata_port_operations {
363 void (*port_disable) (struct ata_port *);
364
365 void (*dev_config) (struct ata_port *, struct ata_device *);
366
367 void (*set_piomode) (struct ata_port *, struct ata_device *);
368 void (*set_dmamode) (struct ata_port *, struct ata_device *);
369
057ace5e 370 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
371 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
372
057ace5e 373 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
374 u8 (*check_status)(struct ata_port *ap);
375 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT
376 void (*dev_select)(struct ata_port *ap, unsigned int device);
377
378 void (*phy_reset) (struct ata_port *ap);
379 void (*post_set_mode) (struct ata_port *ap);
380
381 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
382
383 void (*bmdma_setup) (struct ata_queued_cmd *qc);
384 void (*bmdma_start) (struct ata_queued_cmd *qc);
385
386 void (*qc_prep) (struct ata_queued_cmd *qc);
387 int (*qc_issue) (struct ata_queued_cmd *qc);
388
389 void (*eng_timeout) (struct ata_port *ap);
390
391 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
392 void (*irq_clear) (struct ata_port *);
393
394 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
395 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
396 u32 val);
397
398 int (*port_start) (struct ata_port *ap);
399 void (*port_stop) (struct ata_port *ap);
400
401 void (*host_stop) (struct ata_host_set *host_set);
402
b73fc89f 403 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT
404 u8 (*bmdma_status) (struct ata_port *ap);
405};
406
407struct ata_port_info {
d0be4a7d 408 struct scsi_host_template *sht;
1da177e4
LT
409 unsigned long host_flags;
410 unsigned long pio_mask;
411 unsigned long mwdma_mask;
412 unsigned long udma_mask;
057ace5e 413 const struct ata_port_operations *port_ops;
e99f8b5e 414 void *private_data;
1da177e4
LT
415};
416
452503f9
AC
417struct ata_timing {
418 unsigned short mode; /* ATA mode */
419 unsigned short setup; /* t1 */
420 unsigned short act8b; /* t2 for 8-bit I/O */
421 unsigned short rec8b; /* t2i for 8-bit I/O */
422 unsigned short cyc8b; /* t0 for 8-bit I/O */
423 unsigned short active; /* t2 or tD */
424 unsigned short recover; /* t2i or tK */
425 unsigned short cycle; /* t0 */
426 unsigned short udma; /* t2CYCTYP/2 */
427};
428
429#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT
430
431extern void ata_port_probe(struct ata_port *);
432extern void __sata_phy_reset(struct ata_port *ap);
433extern void sata_phy_reset(struct ata_port *ap);
434extern void ata_bus_reset(struct ata_port *ap);
435extern void ata_port_disable(struct ata_port *);
436extern void ata_std_ports(struct ata_ioports *ioaddr);
437#ifdef CONFIG_PCI
438extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
439 unsigned int n_ports);
440extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA
441extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
442extern int ata_pci_device_resume(struct pci_dev *pdev);
1da177e4 443#endif /* CONFIG_PCI */
057ace5e 444extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 445extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 446extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT
447extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
448extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
449extern int ata_scsi_error(struct Scsi_Host *host);
450extern int ata_scsi_release(struct Scsi_Host *host);
451extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
9b847548
JA
452extern int ata_scsi_device_resume(struct scsi_device *);
453extern int ata_scsi_device_suspend(struct scsi_device *);
454extern int ata_device_resume(struct ata_port *, struct ata_device *);
455extern int ata_device_suspend(struct ata_port *, struct ata_device *);
67846b30
JG
456extern int ata_ratelimit(void);
457
1da177e4
LT
458/*
459 * Default driver ops implementations
460 */
057ace5e 461extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 462extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG
463extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
464extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT
465extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
466extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
467extern u8 ata_check_status(struct ata_port *ap);
468extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 469extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
470extern int ata_port_start (struct ata_port *ap);
471extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 472extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT
473extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
474extern void ata_qc_prep(struct ata_queued_cmd *qc);
475extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
476extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
477 unsigned int buflen);
478extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
479 unsigned int n_elem);
057ace5e
JG
480extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
481extern void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4 482 unsigned int ofs, unsigned int len);
6f2f3812 483extern void ata_dev_config(struct ata_port *ap, unsigned int i);
1da177e4
LT
484extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
485extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 486extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT
487extern u8 ata_bmdma_status(struct ata_port *ap);
488extern void ata_bmdma_irq_clear(struct ata_port *ap);
a22e2eb0 489extern void ata_qc_complete(struct ata_queued_cmd *qc);
1da177e4 490extern void ata_eng_timeout(struct ata_port *ap);
9a3dccc4
TH
491extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
492 struct scsi_cmnd *cmd,
1da177e4
LT
493 void (*done)(struct scsi_cmnd *));
494extern int ata_std_bios_param(struct scsi_device *sdev,
495 struct block_device *bdev,
496 sector_t capacity, int geom[]);
497extern int ata_scsi_slave_config(struct scsi_device *sdev);
498
452503f9
AC
499/*
500 * Timing helpers
501 */
1bc4ccff
AC
502
503extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC
504extern int ata_timing_compute(struct ata_device *, unsigned short,
505 struct ata_timing *, int, int);
506extern void ata_timing_merge(const struct ata_timing *,
507 const struct ata_timing *, struct ata_timing *,
508 unsigned int);
509
510enum {
511 ATA_TIMING_SETUP = (1 << 0),
512 ATA_TIMING_ACT8B = (1 << 1),
513 ATA_TIMING_REC8B = (1 << 2),
514 ATA_TIMING_CYC8B = (1 << 3),
515 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
516 ATA_TIMING_CYC8B,
517 ATA_TIMING_ACTIVE = (1 << 4),
518 ATA_TIMING_RECOVER = (1 << 5),
519 ATA_TIMING_CYCLE = (1 << 6),
520 ATA_TIMING_UDMA = (1 << 7),
521 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
522 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
523 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
524 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
525};
526
1da177e4
LT
527
528#ifdef CONFIG_PCI
529struct pci_bits {
530 unsigned int reg; /* PCI config register to read */
531 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
532 unsigned long mask;
533 unsigned long val;
534};
535
374b1873 536extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 537extern struct ata_probe_ent *
47a86593 538ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 539extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
1da177e4
LT
540
541#endif /* CONFIG_PCI */
542
543
972c26bd
JG
544static inline int
545ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
546{
547 if (sg == &qc->pad_sgent)
548 return 1;
549 if (qc->pad_len)
550 return 0;
551 if (((sg - qc->__sg) + 1) == qc->n_elem)
552 return 1;
553 return 0;
554}
555
cedc9a47
JG
556static inline struct scatterlist *
557ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
558{
559 if (sg == &qc->pad_sgent)
560 return NULL;
561 if (++sg - qc->__sg < qc->n_elem)
562 return sg;
563 return qc->pad_len ? &qc->pad_sgent : NULL;
564}
565
566#define ata_for_each_sg(sg, qc) \
567 for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc))
568
1da177e4
LT
569static inline unsigned int ata_tag_valid(unsigned int tag)
570{
571 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
572}
573
057ace5e 574static inline unsigned int ata_dev_present(const struct ata_device *dev)
1da177e4
LT
575{
576 return ((dev->class == ATA_DEV_ATA) ||
577 (dev->class == ATA_DEV_ATAPI));
578}
579
580static inline u8 ata_chk_status(struct ata_port *ap)
581{
582 return ap->ops->check_status(ap);
583}
584
0baab86b
EF
585
586/**
587 * ata_pause - Flush writes and pause 400 nanoseconds.
588 * @ap: Port to wait for.
589 *
590 * LOCKING:
591 * Inherited from caller.
592 */
593
1da177e4
LT
594static inline void ata_pause(struct ata_port *ap)
595{
596 ata_altstatus(ap);
597 ndelay(400);
598}
599
0baab86b
EF
600
601/**
602 * ata_busy_wait - Wait for a port status register
603 * @ap: Port to wait for.
604 *
605 * Waits up to max*10 microseconds for the selected bits in the port's
606 * status register to be cleared.
607 * Returns final value of status register.
608 *
609 * LOCKING:
610 * Inherited from caller.
611 */
612
1da177e4
LT
613static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
614 unsigned int max)
615{
616 u8 status;
617
618 do {
619 udelay(10);
620 status = ata_chk_status(ap);
621 max--;
622 } while ((status & bits) && (max > 0));
623
624 return status;
625}
626
0baab86b
EF
627
628/**
629 * ata_wait_idle - Wait for a port to be idle.
630 * @ap: Port to wait for.
631 *
632 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
633 * Returns final value of status register.
634 *
635 * LOCKING:
636 * Inherited from caller.
637 */
638
1da177e4
LT
639static inline u8 ata_wait_idle(struct ata_port *ap)
640{
641 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
642
643 if (status & (ATA_BUSY | ATA_DRQ)) {
644 unsigned long l = ap->ioaddr.status_addr;
645 printk(KERN_WARNING
646 "ATA: abnormal status 0x%X on port 0x%lX\n",
647 status, l);
648 }
649
650 return status;
651}
652
653static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
654{
655 qc->tf.ctl |= ATA_NIEN;
656}
657
658static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
659 unsigned int tag)
660{
661 if (likely(ata_tag_valid(tag)))
662 return &ap->qcmd[tag];
663 return NULL;
664}
665
666static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
667{
668 memset(tf, 0, sizeof(*tf));
669
670 tf->ctl = ap->ctl;
671 if (device == 0)
672 tf->device = ATA_DEVICE_OBS;
673 else
674 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
675}
676
2c13b7ce
JG
677static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
678{
679 qc->__sg = NULL;
680 qc->flags = 0;
681 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
682 qc->nsect = 0;
683 qc->nbytes = qc->curbytes = 0;
a22e2eb0 684 qc->err_mask = 0;
2c13b7ce
JG
685
686 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
687}
688
0baab86b
EF
689
690/**
691 * ata_irq_on - Enable interrupts on a port.
692 * @ap: Port on which interrupts are enabled.
693 *
694 * Enable interrupts on a legacy IDE device using MMIO or PIO,
695 * wait for idle, clear any pending interrupts.
696 *
697 * LOCKING:
698 * Inherited from caller.
699 */
700
1da177e4
LT
701static inline u8 ata_irq_on(struct ata_port *ap)
702{
703 struct ata_ioports *ioaddr = &ap->ioaddr;
704 u8 tmp;
705
706 ap->ctl &= ~ATA_NIEN;
707 ap->last_ctl = ap->ctl;
708
709 if (ap->flags & ATA_FLAG_MMIO)
710 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
711 else
712 outb(ap->ctl, ioaddr->ctl_addr);
713 tmp = ata_wait_idle(ap);
714
715 ap->ops->irq_clear(ap);
716
717 return tmp;
718}
719
0baab86b
EF
720
721/**
722 * ata_irq_ack - Acknowledge a device interrupt.
723 * @ap: Port on which interrupts are enabled.
724 *
725 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
726 * or BUSY+DRQ clear). Obtain dma status and port status from
727 * device. Clear the interrupt. Return port status.
728 *
729 * LOCKING:
730 */
731
1da177e4
LT
732static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
733{
734 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
735 u8 host_stat, post_stat, status;
736
737 status = ata_busy_wait(ap, bits, 1000);
738 if (status & bits)
739 DPRINTK("abnormal status 0x%X\n", status);
740
741 /* get controller status; clear intr, err bits */
742 if (ap->flags & ATA_FLAG_MMIO) {
743 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
744 host_stat = readb(mmio + ATA_DMA_STATUS);
745 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
746 mmio + ATA_DMA_STATUS);
747
748 post_stat = readb(mmio + ATA_DMA_STATUS);
749 } else {
750 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
751 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
752 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
753
754 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
755 }
756
757 VPRINTK("irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
758 host_stat, post_stat, status);
759
760 return status;
761}
762
763static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
764{
765 return ap->ops->scr_read(ap, reg);
766}
767
768static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
769{
770 ap->ops->scr_write(ap, reg, val);
771}
772
8a60a071 773static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
cdcca89e
BR
774 u32 val)
775{
776 ap->ops->scr_write(ap, reg, val);
777 (void) ap->ops->scr_read(ap, reg);
778}
779
1da177e4
LT
780static inline unsigned int sata_dev_present(struct ata_port *ap)
781{
782 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
783}
784
057ace5e 785static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT
786{
787 return ata_id_wcache_enabled(dev->id) ||
788 ata_id_has_flush(dev->id) ||
789 ata_id_has_flush_ext(dev->id);
790}
791
a7dac447
JG
792static inline unsigned int ac_err_mask(u8 status)
793{
794 if (status & ATA_BUSY)
795 return AC_ERR_ATA_BUS;
796 if (status & (ATA_ERR | ATA_DF))
797 return AC_ERR_DEV;
798 return 0;
799}
800
801static inline unsigned int __ac_err_mask(u8 status)
802{
803 unsigned int mask = ac_err_mask(status);
804 if (mask == 0)
805 return AC_ERR_OTHER;
806 return mask;
807}
808
6037d6bb
JG
809static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
810{
811 ap->pad_dma = 0;
812 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
813 &ap->pad_dma, GFP_KERNEL);
814 return (ap->pad == NULL) ? -ENOMEM : 0;
815}
816
817static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
818{
819 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
820}
821
1da177e4 822#endif /* __LINUX_LIBATA_H__ */
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