[PATCH] libata: implement ata_drive_probe_reset()
[deliverable/linux.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT
24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT
33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
bfd60579
RD
38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
1da177e4
LT
40 */
41#undef ATA_DEBUG /* debugging output */
42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT
45#undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50/* note: prints function name for you */
51#ifdef ATA_DEBUG
52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53#ifdef ATA_VERBOSE_DEBUG
54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55#else
56#define VPRINTK(fmt, args...)
57#endif /* ATA_VERBOSE_DEBUG */
58#else
59#define DPRINTK(fmt, args...)
60#define VPRINTK(fmt, args...)
61#endif /* ATA_DEBUG */
62
2c13b7ce
JG
63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
1da177e4
LT
65#ifdef ATA_NDEBUG
66#define assert(expr)
67#else
68#define assert(expr) \
69 if(unlikely(!(expr))) { \
70 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
71 #expr,__FILE__,__FUNCTION__,__LINE__); \
72 }
73#endif
74
bfd60579
RD
75/* NEW: debug levels */
76#define HAVE_LIBATA_MSG 1
77
78enum {
79 ATA_MSG_DRV = 0x0001,
80 ATA_MSG_INFO = 0x0002,
81 ATA_MSG_PROBE = 0x0004,
82 ATA_MSG_WARN = 0x0008,
83 ATA_MSG_MALLOC = 0x0010,
84 ATA_MSG_CTL = 0x0020,
85 ATA_MSG_INTR = 0x0040,
86 ATA_MSG_ERR = 0x0080,
87};
88
89#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
90#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
91#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
92#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
93#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
94#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
95#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
96#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
97
98static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
99{
100 if (dval < 0 || dval >= (sizeof(u32) * 8))
101 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
102 if (!dval)
103 return 0;
104 return (1 << dval) - 1;
105}
106
1da177e4
LT
107/* defines only for the constants which don't work well as enums */
108#define ATA_TAG_POISON 0xfafbfcfdU
109
110/* move to PCI layer? */
111static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
112{
113 return &pdev->dev;
114}
115
116enum {
117 /* various global constants */
118 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
119 ATA_MAX_PORTS = 8,
120 ATA_DEF_QUEUE = 1,
121 ATA_MAX_QUEUE = 1,
122 ATA_MAX_SECTORS = 200, /* FIXME */
123 ATA_MAX_BUS = 2,
124 ATA_DEF_BUSY_WAIT = 10000,
125 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
126
127 ATA_SHT_EMULATED = 1,
128 ATA_SHT_CMD_PER_LUN = 1,
129 ATA_SHT_THIS_ID = -1,
cf482935 130 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT
131
132 /* struct ata_device stuff */
133 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
134 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
135 ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */
8bf62ece 136 ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */
1da177e4
LT
137
138 ATA_DEV_UNKNOWN = 0, /* unknown device */
139 ATA_DEV_ATA = 1, /* ATA device */
140 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
141 ATA_DEV_ATAPI = 3, /* ATAPI device */
142 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
143 ATA_DEV_NONE = 5, /* no device */
144
145 /* struct ata_port flags */
146 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
147 /* (doesn't imply presence) */
148 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
149 ATA_FLAG_SATA = (1 << 3),
150 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
c19ba8af 151 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */
1da177e4 152 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
c19ba8af 153 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */
1da177e4 154 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
c1389503
TH
155 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
156 * proper HSM is in place. */
2c13b7ce 157 ATA_FLAG_DEBUGMSG = (1 << 10),
50630195 158 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
1da177e4 159
9b847548
JA
160 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
161
8d238e01
AC
162 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
163 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
164
1da177e4
LT
165 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
166 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
167 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
168 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
169
170 /* various lengths of time */
8d238e01 171 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */
1da177e4 172 ATA_TMOUT_PIO = 30 * HZ,
8d238e01
AC
173 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
174 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
1da177e4
LT
175 ATA_TMOUT_CDB = 30 * HZ,
176 ATA_TMOUT_CDB_QUICK = 5 * HZ,
a2a7a662
TH
177 ATA_TMOUT_INTERNAL = 30 * HZ,
178 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT
179
180 /* ATA bus states */
181 BUS_UNKNOWN = 0,
182 BUS_DMA = 1,
183 BUS_IDLE = 2,
184 BUS_NOINTR = 3,
185 BUS_NODATA = 4,
186 BUS_TIMER = 5,
187 BUS_PIO = 6,
188 BUS_EDD = 7,
189 BUS_IDENTIFY = 8,
190 BUS_PACKET = 9,
191
192 /* SATA port states */
193 PORT_UNKNOWN = 0,
194 PORT_ENABLED = 1,
195 PORT_DISABLED = 2,
196
197 /* encoding various smaller bitmaps into a single
198 * unsigned long bitmap
199 */
200 ATA_SHIFT_UDMA = 0,
201 ATA_SHIFT_MWDMA = 8,
202 ATA_SHIFT_PIO = 11,
cedc9a47
JG
203
204 /* size of buffer to pad xfers ending on unaligned boundaries */
205 ATA_DMA_PAD_SZ = 4,
206 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
47a86593
AC
207
208 /* Masks for port functions */
209 ATA_PORT_PRIMARY = (1 << 0),
210 ATA_PORT_SECONDARY = (1 << 1),
1da177e4
LT
211};
212
14be71f4
AL
213enum hsm_task_states {
214 HSM_ST_UNKNOWN,
215 HSM_ST_IDLE,
216 HSM_ST_POLL,
217 HSM_ST_TMOUT,
218 HSM_ST,
219 HSM_ST_LAST,
220 HSM_ST_LAST_POLL,
221 HSM_ST_ERR,
1da177e4
LT
222};
223
a7dac447 224enum ata_completion_errors {
11a56d24
TH
225 AC_ERR_DEV = (1 << 0), /* device reported error */
226 AC_ERR_HSM = (1 << 1), /* host state machine violation */
227 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
228 AC_ERR_MEDIA = (1 << 3), /* media error */
229 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
230 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
231 AC_ERR_SYSTEM = (1 << 6), /* system error */
232 AC_ERR_INVALID = (1 << 7), /* invalid argument */
233 AC_ERR_OTHER = (1 << 8), /* unknown */
a7dac447
JG
234};
235
1da177e4
LT
236/* forward declarations */
237struct scsi_device;
238struct ata_port_operations;
239struct ata_port;
240struct ata_queued_cmd;
241
242/* typedefs */
77853bf2 243typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
a62c0fc5
TH
244typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *);
245typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *);
1da177e4
LT
246
247struct ata_ioports {
248 unsigned long cmd_addr;
249 unsigned long data_addr;
250 unsigned long error_addr;
251 unsigned long feature_addr;
252 unsigned long nsect_addr;
253 unsigned long lbal_addr;
254 unsigned long lbam_addr;
255 unsigned long lbah_addr;
256 unsigned long device_addr;
257 unsigned long status_addr;
258 unsigned long command_addr;
259 unsigned long altstatus_addr;
260 unsigned long ctl_addr;
261 unsigned long bmdma_addr;
262 unsigned long scr_addr;
263};
264
265struct ata_probe_ent {
266 struct list_head node;
267 struct device *dev;
057ace5e 268 const struct ata_port_operations *port_ops;
193515d5 269 struct scsi_host_template *sht;
1da177e4
LT
270 struct ata_ioports port[ATA_MAX_PORTS];
271 unsigned int n_ports;
272 unsigned int hard_port_no;
273 unsigned int pio_mask;
274 unsigned int mwdma_mask;
275 unsigned int udma_mask;
276 unsigned int legacy_mode;
277 unsigned long irq;
278 unsigned int irq_flags;
279 unsigned long host_flags;
280 void __iomem *mmio_base;
281 void *private_data;
282};
283
284struct ata_host_set {
285 spinlock_t lock;
286 struct device *dev;
287 unsigned long irq;
288 void __iomem *mmio_base;
289 unsigned int n_ports;
290 void *private_data;
057ace5e 291 const struct ata_port_operations *ops;
1da177e4
LT
292 struct ata_port * ports[0];
293};
294
295struct ata_queued_cmd {
296 struct ata_port *ap;
297 struct ata_device *dev;
298
299 struct scsi_cmnd *scsicmd;
300 void (*scsidone)(struct scsi_cmnd *);
301
302 struct ata_taskfile tf;
303 u8 cdb[ATAPI_CDB_LEN];
304
305 unsigned long flags; /* ATA_QCFLAG_xxx */
306 unsigned int tag;
307 unsigned int n_elem;
cedc9a47 308 unsigned int orig_n_elem;
1da177e4
LT
309
310 int dma_dir;
311
cedc9a47
JG
312 unsigned int pad_len;
313
1da177e4
LT
314 unsigned int nsect;
315 unsigned int cursect;
316
317 unsigned int nbytes;
318 unsigned int curbytes;
319
320 unsigned int cursg;
321 unsigned int cursg_ofs;
322
323 struct scatterlist sgent;
cedc9a47 324 struct scatterlist pad_sgent;
1da177e4
LT
325 void *buf_virt;
326
cedc9a47
JG
327 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
328 struct scatterlist *__sg;
1da177e4 329
a22e2eb0
AL
330 unsigned int err_mask;
331
1da177e4
LT
332 ata_qc_cb_t complete_fn;
333
1da177e4
LT
334 void *private_data;
335};
336
337struct ata_host_stats {
338 unsigned long unhandled_irq;
339 unsigned long idle_irq;
340 unsigned long rw_reqbuf;
341};
342
343struct ata_device {
344 u64 n_sectors; /* size of device, if ATA */
345 unsigned long flags; /* ATA_DFLAG_xxx */
346 unsigned int class; /* ATA_DEV_xxx */
347 unsigned int devno; /* 0 or 1 */
348 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
349 u8 pio_mode;
350 u8 dma_mode;
351 u8 xfer_mode;
352 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
353
8cbd6df1
AL
354 unsigned int multi_count; /* sectors count for
355 READ/WRITE MULTIPLE */
8bf62ece
AL
356
357 /* for CHS addressing */
358 u16 cylinders; /* Number of cylinders */
359 u16 heads; /* Number of heads */
360 u16 sectors; /* Number of sectors per track */
1da177e4
LT
361};
362
363struct ata_port {
364 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 365 const struct ata_port_operations *ops;
1da177e4
LT
366 unsigned long flags; /* ATA_FLAG_xxx */
367 unsigned int id; /* unique id req'd by scsi midlyr */
368 unsigned int port_no; /* unique port #; from zero */
369 unsigned int hard_port_no; /* hardware port #; from zero */
370
371 struct ata_prd *prd; /* our SG list */
372 dma_addr_t prd_dma; /* and its DMA mapping */
373
cedc9a47
JG
374 void *pad; /* array of DMA pad buffers */
375 dma_addr_t pad_dma;
376
1da177e4
LT
377 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
378
379 u8 ctl; /* cache of ATA control register */
380 u8 last_ctl; /* Cache last written value */
1da177e4
LT
381 unsigned int pio_mask;
382 unsigned int mwdma_mask;
383 unsigned int udma_mask;
384 unsigned int cbl; /* cable type; ATA_CBL_xxx */
385 unsigned int cdb_len;
386
387 struct ata_device device[ATA_MAX_DEVICES];
388
389 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
390 unsigned long qactive;
391 unsigned int active_tag;
392
393 struct ata_host_stats stats;
394 struct ata_host_set *host_set;
395
396 struct work_struct packet_task;
397
398 struct work_struct pio_task;
14be71f4 399 unsigned int hsm_task_state;
1da177e4
LT
400 unsigned long pio_task_timeout;
401
bfd60579 402 u32 msg_enable;
a72ec4ce 403 struct list_head eh_done_q;
bfd60579 404
1da177e4
LT
405 void *private_data;
406};
407
408struct ata_port_operations {
409 void (*port_disable) (struct ata_port *);
410
411 void (*dev_config) (struct ata_port *, struct ata_device *);
412
413 void (*set_piomode) (struct ata_port *, struct ata_device *);
414 void (*set_dmamode) (struct ata_port *, struct ata_device *);
415
057ace5e 416 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
417 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
418
057ace5e 419 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
420 u8 (*check_status)(struct ata_port *ap);
421 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT
422 void (*dev_select)(struct ata_port *ap, unsigned int device);
423
c19ba8af
TH
424 void (*phy_reset) (struct ata_port *ap); /* obsolete */
425 int (*probe_reset) (struct ata_port *ap, unsigned int *classes);
426
1da177e4
LT
427 void (*post_set_mode) (struct ata_port *ap);
428
429 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
430
431 void (*bmdma_setup) (struct ata_queued_cmd *qc);
432 void (*bmdma_start) (struct ata_queued_cmd *qc);
433
434 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 435 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4
LT
436
437 void (*eng_timeout) (struct ata_port *ap);
438
439 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
440 void (*irq_clear) (struct ata_port *);
441
442 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
443 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
444 u32 val);
445
446 int (*port_start) (struct ata_port *ap);
447 void (*port_stop) (struct ata_port *ap);
448
449 void (*host_stop) (struct ata_host_set *host_set);
450
b73fc89f 451 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT
452 u8 (*bmdma_status) (struct ata_port *ap);
453};
454
455struct ata_port_info {
d0be4a7d 456 struct scsi_host_template *sht;
1da177e4
LT
457 unsigned long host_flags;
458 unsigned long pio_mask;
459 unsigned long mwdma_mask;
460 unsigned long udma_mask;
057ace5e 461 const struct ata_port_operations *port_ops;
e99f8b5e 462 void *private_data;
1da177e4
LT
463};
464
452503f9
AC
465struct ata_timing {
466 unsigned short mode; /* ATA mode */
467 unsigned short setup; /* t1 */
468 unsigned short act8b; /* t2 for 8-bit I/O */
469 unsigned short rec8b; /* t2i for 8-bit I/O */
470 unsigned short cyc8b; /* t0 for 8-bit I/O */
471 unsigned short active; /* t2 or tD */
472 unsigned short recover; /* t2i or tK */
473 unsigned short cycle; /* t0 */
474 unsigned short udma; /* t2CYCTYP/2 */
475};
476
477#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT
478
479extern void ata_port_probe(struct ata_port *);
480extern void __sata_phy_reset(struct ata_port *ap);
481extern void sata_phy_reset(struct ata_port *ap);
482extern void ata_bus_reset(struct ata_port *ap);
a62c0fc5
TH
483extern int ata_drive_probe_reset(struct ata_port *ap,
484 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
485 ata_postreset_fn_t postreset, unsigned int *classes);
1da177e4
LT
486extern void ata_port_disable(struct ata_port *);
487extern void ata_std_ports(struct ata_ioports *ioaddr);
488#ifdef CONFIG_PCI
489extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
490 unsigned int n_ports);
491extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA
492extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
493extern int ata_pci_device_resume(struct pci_dev *pdev);
1da177e4 494#endif /* CONFIG_PCI */
057ace5e 495extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 496extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 497extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT
498extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
499extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
500extern int ata_scsi_error(struct Scsi_Host *host);
a72ec4ce
TH
501extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
502extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
1da177e4
LT
503extern int ata_scsi_release(struct Scsi_Host *host);
504extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
9b847548
JA
505extern int ata_scsi_device_resume(struct scsi_device *);
506extern int ata_scsi_device_suspend(struct scsi_device *);
507extern int ata_device_resume(struct ata_port *, struct ata_device *);
508extern int ata_device_suspend(struct ata_port *, struct ata_device *);
67846b30 509extern int ata_ratelimit(void);
6f8b9958
TH
510extern unsigned int ata_busy_sleep(struct ata_port *ap,
511 unsigned long timeout_pat,
512 unsigned long timeout);
67846b30 513
1da177e4
LT
514/*
515 * Default driver ops implementations
516 */
057ace5e 517extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 518extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG
519extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
520extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT
521extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
522extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
523extern u8 ata_check_status(struct ata_port *ap);
524extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 525extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
526extern int ata_port_start (struct ata_port *ap);
527extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 528extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT
529extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
530extern void ata_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 531extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT
532extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
533 unsigned int buflen);
534extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
535 unsigned int n_elem);
057ace5e
JG
536extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
537extern void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4 538 unsigned int ofs, unsigned int len);
6f2f3812 539extern void ata_dev_config(struct ata_port *ap, unsigned int i);
1da177e4
LT
540extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
541extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 542extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT
543extern u8 ata_bmdma_status(struct ata_port *ap);
544extern void ata_bmdma_irq_clear(struct ata_port *ap);
a22e2eb0 545extern void ata_qc_complete(struct ata_queued_cmd *qc);
1da177e4 546extern void ata_eng_timeout(struct ata_port *ap);
9a3dccc4
TH
547extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
548 struct scsi_cmnd *cmd,
1da177e4
LT
549 void (*done)(struct scsi_cmnd *));
550extern int ata_std_bios_param(struct scsi_device *sdev,
551 struct block_device *bdev,
552 sector_t capacity, int geom[]);
553extern int ata_scsi_slave_config(struct scsi_device *sdev);
554
452503f9
AC
555/*
556 * Timing helpers
557 */
1bc4ccff
AC
558
559extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC
560extern int ata_timing_compute(struct ata_device *, unsigned short,
561 struct ata_timing *, int, int);
562extern void ata_timing_merge(const struct ata_timing *,
563 const struct ata_timing *, struct ata_timing *,
564 unsigned int);
565
566enum {
567 ATA_TIMING_SETUP = (1 << 0),
568 ATA_TIMING_ACT8B = (1 << 1),
569 ATA_TIMING_REC8B = (1 << 2),
570 ATA_TIMING_CYC8B = (1 << 3),
571 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
572 ATA_TIMING_CYC8B,
573 ATA_TIMING_ACTIVE = (1 << 4),
574 ATA_TIMING_RECOVER = (1 << 5),
575 ATA_TIMING_CYCLE = (1 << 6),
576 ATA_TIMING_UDMA = (1 << 7),
577 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
578 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
579 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
580 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
581};
582
1da177e4
LT
583
584#ifdef CONFIG_PCI
585struct pci_bits {
586 unsigned int reg; /* PCI config register to read */
587 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
588 unsigned long mask;
589 unsigned long val;
590};
591
374b1873 592extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 593extern struct ata_probe_ent *
47a86593 594ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 595extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
1da177e4
LT
596
597#endif /* CONFIG_PCI */
598
599
972c26bd
JG
600static inline int
601ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
602{
603 if (sg == &qc->pad_sgent)
604 return 1;
605 if (qc->pad_len)
606 return 0;
607 if (((sg - qc->__sg) + 1) == qc->n_elem)
608 return 1;
609 return 0;
610}
611
cedc9a47
JG
612static inline struct scatterlist *
613ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
614{
615 if (sg == &qc->pad_sgent)
616 return NULL;
617 if (++sg - qc->__sg < qc->n_elem)
618 return sg;
619 return qc->pad_len ? &qc->pad_sgent : NULL;
620}
621
622#define ata_for_each_sg(sg, qc) \
623 for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc))
624
1da177e4
LT
625static inline unsigned int ata_tag_valid(unsigned int tag)
626{
627 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
628}
629
057ace5e 630static inline unsigned int ata_dev_present(const struct ata_device *dev)
1da177e4
LT
631{
632 return ((dev->class == ATA_DEV_ATA) ||
633 (dev->class == ATA_DEV_ATAPI));
634}
635
636static inline u8 ata_chk_status(struct ata_port *ap)
637{
638 return ap->ops->check_status(ap);
639}
640
0baab86b
EF
641
642/**
643 * ata_pause - Flush writes and pause 400 nanoseconds.
644 * @ap: Port to wait for.
645 *
646 * LOCKING:
647 * Inherited from caller.
648 */
649
1da177e4
LT
650static inline void ata_pause(struct ata_port *ap)
651{
652 ata_altstatus(ap);
653 ndelay(400);
654}
655
0baab86b
EF
656
657/**
658 * ata_busy_wait - Wait for a port status register
659 * @ap: Port to wait for.
660 *
661 * Waits up to max*10 microseconds for the selected bits in the port's
662 * status register to be cleared.
663 * Returns final value of status register.
664 *
665 * LOCKING:
666 * Inherited from caller.
667 */
668
1da177e4
LT
669static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
670 unsigned int max)
671{
672 u8 status;
673
674 do {
675 udelay(10);
676 status = ata_chk_status(ap);
677 max--;
678 } while ((status & bits) && (max > 0));
679
680 return status;
681}
682
0baab86b
EF
683
684/**
685 * ata_wait_idle - Wait for a port to be idle.
686 * @ap: Port to wait for.
687 *
688 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
689 * Returns final value of status register.
690 *
691 * LOCKING:
692 * Inherited from caller.
693 */
694
1da177e4
LT
695static inline u8 ata_wait_idle(struct ata_port *ap)
696{
697 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
698
699 if (status & (ATA_BUSY | ATA_DRQ)) {
700 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD
701 if (ata_msg_warn(ap))
702 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
703 status, l);
1da177e4
LT
704 }
705
706 return status;
707}
708
709static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
710{
711 qc->tf.ctl |= ATA_NIEN;
712}
713
714static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
715 unsigned int tag)
716{
717 if (likely(ata_tag_valid(tag)))
718 return &ap->qcmd[tag];
719 return NULL;
720}
721
722static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
723{
724 memset(tf, 0, sizeof(*tf));
725
726 tf->ctl = ap->ctl;
727 if (device == 0)
728 tf->device = ATA_DEVICE_OBS;
729 else
730 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
731}
732
2c13b7ce
JG
733static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
734{
735 qc->__sg = NULL;
736 qc->flags = 0;
737 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
738 qc->nsect = 0;
739 qc->nbytes = qc->curbytes = 0;
a22e2eb0 740 qc->err_mask = 0;
2c13b7ce
JG
741
742 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
743}
744
0baab86b
EF
745
746/**
747 * ata_irq_on - Enable interrupts on a port.
748 * @ap: Port on which interrupts are enabled.
749 *
750 * Enable interrupts on a legacy IDE device using MMIO or PIO,
751 * wait for idle, clear any pending interrupts.
752 *
753 * LOCKING:
754 * Inherited from caller.
755 */
756
1da177e4
LT
757static inline u8 ata_irq_on(struct ata_port *ap)
758{
759 struct ata_ioports *ioaddr = &ap->ioaddr;
760 u8 tmp;
761
762 ap->ctl &= ~ATA_NIEN;
763 ap->last_ctl = ap->ctl;
764
765 if (ap->flags & ATA_FLAG_MMIO)
766 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
767 else
768 outb(ap->ctl, ioaddr->ctl_addr);
769 tmp = ata_wait_idle(ap);
770
771 ap->ops->irq_clear(ap);
772
773 return tmp;
774}
775
0baab86b
EF
776
777/**
778 * ata_irq_ack - Acknowledge a device interrupt.
779 * @ap: Port on which interrupts are enabled.
780 *
781 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
782 * or BUSY+DRQ clear). Obtain dma status and port status from
783 * device. Clear the interrupt. Return port status.
784 *
785 * LOCKING:
786 */
787
1da177e4
LT
788static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
789{
790 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
791 u8 host_stat, post_stat, status;
792
793 status = ata_busy_wait(ap, bits, 1000);
794 if (status & bits)
bfd60579
RD
795 if (ata_msg_err(ap))
796 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT
797
798 /* get controller status; clear intr, err bits */
799 if (ap->flags & ATA_FLAG_MMIO) {
800 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
801 host_stat = readb(mmio + ATA_DMA_STATUS);
802 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
803 mmio + ATA_DMA_STATUS);
804
805 post_stat = readb(mmio + ATA_DMA_STATUS);
806 } else {
807 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
808 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
809 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
810
811 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
812 }
813
bfd60579
RD
814 if (ata_msg_intr(ap))
815 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
816 __FUNCTION__,
817 host_stat, post_stat, status);
1da177e4
LT
818
819 return status;
820}
821
822static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
823{
824 return ap->ops->scr_read(ap, reg);
825}
826
827static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
828{
829 ap->ops->scr_write(ap, reg, val);
830}
831
8a60a071 832static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
cdcca89e
BR
833 u32 val)
834{
835 ap->ops->scr_write(ap, reg, val);
836 (void) ap->ops->scr_read(ap, reg);
837}
838
1da177e4
LT
839static inline unsigned int sata_dev_present(struct ata_port *ap)
840{
841 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
842}
843
057ace5e 844static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT
845{
846 return ata_id_wcache_enabled(dev->id) ||
847 ata_id_has_flush(dev->id) ||
848 ata_id_has_flush_ext(dev->id);
849}
850
a7dac447
JG
851static inline unsigned int ac_err_mask(u8 status)
852{
853 if (status & ATA_BUSY)
11a56d24 854 return AC_ERR_HSM;
a7dac447
JG
855 if (status & (ATA_ERR | ATA_DF))
856 return AC_ERR_DEV;
857 return 0;
858}
859
860static inline unsigned int __ac_err_mask(u8 status)
861{
862 unsigned int mask = ac_err_mask(status);
863 if (mask == 0)
864 return AC_ERR_OTHER;
865 return mask;
866}
867
6037d6bb
JG
868static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
869{
870 ap->pad_dma = 0;
871 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
872 &ap->pad_dma, GFP_KERNEL);
873 return (ap->pad == NULL) ? -ENOMEM : 0;
874}
875
876static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
877{
878 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
879}
880
1da177e4 881#endif /* __LINUX_LIBATA_H__ */
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