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cfb61a41 CC |
1 | /* |
2 | * Functions and registers to access AXP20X power management chip. | |
3 | * | |
4 | * Copyright (C) 2013, Carlo Caione <carlo@caione.org> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #ifndef __LINUX_MFD_AXP20X_H | |
12 | #define __LINUX_MFD_AXP20X_H | |
13 | ||
14 | enum { | |
d8d79f8f MS |
15 | AXP152_ID = 0, |
16 | AXP202_ID, | |
cfb61a41 | 17 | AXP209_ID, |
f05be589 | 18 | AXP221_ID, |
af7e9069 JP |
19 | AXP288_ID, |
20 | NR_AXP20X_VARIANTS, | |
cfb61a41 CC |
21 | }; |
22 | ||
23 | #define AXP20X_DATACACHE(m) (0x04 + (m)) | |
24 | ||
25 | /* Power supply */ | |
d8d79f8f MS |
26 | #define AXP152_PWR_OP_MODE 0x01 |
27 | #define AXP152_LDO3456_DC1234_CTRL 0x12 | |
28 | #define AXP152_ALDO_OP_MODE 0x13 | |
29 | #define AXP152_LDO0_CTRL 0x15 | |
30 | #define AXP152_DCDC2_V_OUT 0x23 | |
31 | #define AXP152_DCDC2_V_SCAL 0x25 | |
32 | #define AXP152_DCDC1_V_OUT 0x26 | |
33 | #define AXP152_DCDC3_V_OUT 0x27 | |
34 | #define AXP152_ALDO12_V_OUT 0x28 | |
35 | #define AXP152_DLDO1_V_OUT 0x29 | |
36 | #define AXP152_DLDO2_V_OUT 0x2a | |
37 | #define AXP152_DCDC4_V_OUT 0x2b | |
38 | #define AXP152_V_OFF 0x31 | |
39 | #define AXP152_OFF_CTRL 0x32 | |
40 | #define AXP152_PEK_KEY 0x36 | |
41 | #define AXP152_DCDC_FREQ 0x37 | |
42 | #define AXP152_DCDC_MODE 0x80 | |
43 | ||
cfb61a41 CC |
44 | #define AXP20X_PWR_INPUT_STATUS 0x00 |
45 | #define AXP20X_PWR_OP_MODE 0x01 | |
46 | #define AXP20X_USB_OTG_STATUS 0x02 | |
47 | #define AXP20X_PWR_OUT_CTRL 0x12 | |
48 | #define AXP20X_DCDC2_V_OUT 0x23 | |
49 | #define AXP20X_DCDC2_LDO3_V_SCAL 0x25 | |
50 | #define AXP20X_DCDC3_V_OUT 0x27 | |
51 | #define AXP20X_LDO24_V_OUT 0x28 | |
52 | #define AXP20X_LDO3_V_OUT 0x29 | |
53 | #define AXP20X_VBUS_IPSOUT_MGMT 0x30 | |
54 | #define AXP20X_V_OFF 0x31 | |
55 | #define AXP20X_OFF_CTRL 0x32 | |
56 | #define AXP20X_CHRG_CTRL1 0x33 | |
57 | #define AXP20X_CHRG_CTRL2 0x34 | |
58 | #define AXP20X_CHRG_BAK_CTRL 0x35 | |
59 | #define AXP20X_PEK_KEY 0x36 | |
60 | #define AXP20X_DCDC_FREQ 0x37 | |
61 | #define AXP20X_V_LTF_CHRG 0x38 | |
62 | #define AXP20X_V_HTF_CHRG 0x39 | |
63 | #define AXP20X_APS_WARN_L1 0x3a | |
64 | #define AXP20X_APS_WARN_L2 0x3b | |
65 | #define AXP20X_V_LTF_DISCHRG 0x3c | |
66 | #define AXP20X_V_HTF_DISCHRG 0x3d | |
67 | ||
f05be589 BB |
68 | #define AXP22X_PWR_OUT_CTRL1 0x10 |
69 | #define AXP22X_PWR_OUT_CTRL2 0x12 | |
70 | #define AXP22X_PWR_OUT_CTRL3 0x13 | |
71 | #define AXP22X_DLDO1_V_OUT 0x15 | |
72 | #define AXP22X_DLDO2_V_OUT 0x16 | |
73 | #define AXP22X_DLDO3_V_OUT 0x17 | |
74 | #define AXP22X_DLDO4_V_OUT 0x18 | |
75 | #define AXP22X_ELDO1_V_OUT 0x19 | |
76 | #define AXP22X_ELDO2_V_OUT 0x1a | |
77 | #define AXP22X_ELDO3_V_OUT 0x1b | |
78 | #define AXP22X_DC5LDO_V_OUT 0x1c | |
79 | #define AXP22X_DCDC1_V_OUT 0x21 | |
80 | #define AXP22X_DCDC2_V_OUT 0x22 | |
81 | #define AXP22X_DCDC3_V_OUT 0x23 | |
82 | #define AXP22X_DCDC4_V_OUT 0x24 | |
83 | #define AXP22X_DCDC5_V_OUT 0x25 | |
84 | #define AXP22X_DCDC23_V_RAMP_CTRL 0x27 | |
85 | #define AXP22X_ALDO1_V_OUT 0x28 | |
86 | #define AXP22X_ALDO2_V_OUT 0x29 | |
87 | #define AXP22X_ALDO3_V_OUT 0x2a | |
88 | #define AXP22X_CHRG_CTRL3 0x35 | |
89 | ||
cfb61a41 | 90 | /* Interrupt */ |
d8d79f8f MS |
91 | #define AXP152_IRQ1_EN 0x40 |
92 | #define AXP152_IRQ2_EN 0x41 | |
93 | #define AXP152_IRQ3_EN 0x42 | |
94 | #define AXP152_IRQ1_STATE 0x48 | |
95 | #define AXP152_IRQ2_STATE 0x49 | |
96 | #define AXP152_IRQ3_STATE 0x4a | |
97 | ||
cfb61a41 CC |
98 | #define AXP20X_IRQ1_EN 0x40 |
99 | #define AXP20X_IRQ2_EN 0x41 | |
100 | #define AXP20X_IRQ3_EN 0x42 | |
101 | #define AXP20X_IRQ4_EN 0x43 | |
102 | #define AXP20X_IRQ5_EN 0x44 | |
af7e9069 | 103 | #define AXP20X_IRQ6_EN 0x45 |
cfb61a41 CC |
104 | #define AXP20X_IRQ1_STATE 0x48 |
105 | #define AXP20X_IRQ2_STATE 0x49 | |
106 | #define AXP20X_IRQ3_STATE 0x4a | |
107 | #define AXP20X_IRQ4_STATE 0x4b | |
108 | #define AXP20X_IRQ5_STATE 0x4c | |
af7e9069 | 109 | #define AXP20X_IRQ6_STATE 0x4d |
cfb61a41 CC |
110 | |
111 | /* ADC */ | |
112 | #define AXP20X_ACIN_V_ADC_H 0x56 | |
113 | #define AXP20X_ACIN_V_ADC_L 0x57 | |
114 | #define AXP20X_ACIN_I_ADC_H 0x58 | |
115 | #define AXP20X_ACIN_I_ADC_L 0x59 | |
116 | #define AXP20X_VBUS_V_ADC_H 0x5a | |
117 | #define AXP20X_VBUS_V_ADC_L 0x5b | |
118 | #define AXP20X_VBUS_I_ADC_H 0x5c | |
119 | #define AXP20X_VBUS_I_ADC_L 0x5d | |
120 | #define AXP20X_TEMP_ADC_H 0x5e | |
121 | #define AXP20X_TEMP_ADC_L 0x5f | |
122 | #define AXP20X_TS_IN_H 0x62 | |
123 | #define AXP20X_TS_IN_L 0x63 | |
124 | #define AXP20X_GPIO0_V_ADC_H 0x64 | |
125 | #define AXP20X_GPIO0_V_ADC_L 0x65 | |
126 | #define AXP20X_GPIO1_V_ADC_H 0x66 | |
127 | #define AXP20X_GPIO1_V_ADC_L 0x67 | |
128 | #define AXP20X_PWR_BATT_H 0x70 | |
129 | #define AXP20X_PWR_BATT_M 0x71 | |
130 | #define AXP20X_PWR_BATT_L 0x72 | |
131 | #define AXP20X_BATT_V_H 0x78 | |
132 | #define AXP20X_BATT_V_L 0x79 | |
133 | #define AXP20X_BATT_CHRG_I_H 0x7a | |
134 | #define AXP20X_BATT_CHRG_I_L 0x7b | |
135 | #define AXP20X_BATT_DISCHRG_I_H 0x7c | |
136 | #define AXP20X_BATT_DISCHRG_I_L 0x7d | |
137 | #define AXP20X_IPSOUT_V_HIGH_H 0x7e | |
138 | #define AXP20X_IPSOUT_V_HIGH_L 0x7f | |
139 | ||
140 | /* Power supply */ | |
141 | #define AXP20X_DCDC_MODE 0x80 | |
142 | #define AXP20X_ADC_EN1 0x82 | |
143 | #define AXP20X_ADC_EN2 0x83 | |
144 | #define AXP20X_ADC_RATE 0x84 | |
145 | #define AXP20X_GPIO10_IN_RANGE 0x85 | |
146 | #define AXP20X_GPIO1_ADC_IRQ_RIS 0x86 | |
147 | #define AXP20X_GPIO1_ADC_IRQ_FAL 0x87 | |
148 | #define AXP20X_TIMER_CTRL 0x8a | |
149 | #define AXP20X_VBUS_MON 0x8b | |
150 | #define AXP20X_OVER_TMP 0x8f | |
151 | ||
f05be589 BB |
152 | #define AXP22X_PWREN_CTRL1 0x8c |
153 | #define AXP22X_PWREN_CTRL2 0x8d | |
154 | ||
cfb61a41 | 155 | /* GPIO */ |
d8d79f8f MS |
156 | #define AXP152_GPIO0_CTRL 0x90 |
157 | #define AXP152_GPIO1_CTRL 0x91 | |
158 | #define AXP152_GPIO2_CTRL 0x92 | |
159 | #define AXP152_GPIO3_CTRL 0x93 | |
160 | #define AXP152_LDOGPIO2_V_OUT 0x96 | |
161 | #define AXP152_GPIO_INPUT 0x97 | |
162 | #define AXP152_PWM0_FREQ_X 0x98 | |
163 | #define AXP152_PWM0_FREQ_Y 0x99 | |
164 | #define AXP152_PWM0_DUTY_CYCLE 0x9a | |
165 | #define AXP152_PWM1_FREQ_X 0x9b | |
166 | #define AXP152_PWM1_FREQ_Y 0x9c | |
167 | #define AXP152_PWM1_DUTY_CYCLE 0x9d | |
168 | ||
cfb61a41 CC |
169 | #define AXP20X_GPIO0_CTRL 0x90 |
170 | #define AXP20X_LDO5_V_OUT 0x91 | |
171 | #define AXP20X_GPIO1_CTRL 0x92 | |
172 | #define AXP20X_GPIO2_CTRL 0x93 | |
173 | #define AXP20X_GPIO20_SS 0x94 | |
174 | #define AXP20X_GPIO3_CTRL 0x95 | |
175 | ||
f05be589 BB |
176 | #define AXP22X_LDO_IO0_V_OUT 0x91 |
177 | #define AXP22X_LDO_IO1_V_OUT 0x93 | |
178 | #define AXP22X_GPIO_STATE 0x94 | |
179 | #define AXP22X_GPIO_PULL_DOWN 0x95 | |
180 | ||
cfb61a41 CC |
181 | /* Battery */ |
182 | #define AXP20X_CHRG_CC_31_24 0xb0 | |
183 | #define AXP20X_CHRG_CC_23_16 0xb1 | |
184 | #define AXP20X_CHRG_CC_15_8 0xb2 | |
185 | #define AXP20X_CHRG_CC_7_0 0xb3 | |
186 | #define AXP20X_DISCHRG_CC_31_24 0xb4 | |
187 | #define AXP20X_DISCHRG_CC_23_16 0xb5 | |
188 | #define AXP20X_DISCHRG_CC_15_8 0xb6 | |
189 | #define AXP20X_DISCHRG_CC_7_0 0xb7 | |
190 | #define AXP20X_CC_CTRL 0xb8 | |
191 | #define AXP20X_FG_RES 0xb9 | |
192 | ||
f05be589 BB |
193 | /* AXP22X specific registers */ |
194 | #define AXP22X_BATLOW_THRES1 0xe6 | |
195 | ||
af7e9069 JP |
196 | /* AXP288 specific registers */ |
197 | #define AXP288_PMIC_ADC_H 0x56 | |
198 | #define AXP288_PMIC_ADC_L 0x57 | |
199 | #define AXP288_ADC_TS_PIN_CTRL 0x84 | |
af7e9069 | 200 | #define AXP288_PMIC_ADC_EN 0x84 |
af7e9069 | 201 | |
774e0b41 TB |
202 | /* Fuel Gauge */ |
203 | #define AXP288_FG_RDC1_REG 0xba | |
204 | #define AXP288_FG_RDC0_REG 0xbb | |
205 | #define AXP288_FG_OCVH_REG 0xbc | |
206 | #define AXP288_FG_OCVL_REG 0xbd | |
207 | #define AXP288_FG_OCV_CURVE_REG 0xc0 | |
208 | #define AXP288_FG_DES_CAP1_REG 0xe0 | |
209 | #define AXP288_FG_DES_CAP0_REG 0xe1 | |
210 | #define AXP288_FG_CC_MTR1_REG 0xe2 | |
211 | #define AXP288_FG_CC_MTR0_REG 0xe3 | |
212 | #define AXP288_FG_OCV_CAP_REG 0xe4 | |
213 | #define AXP288_FG_CC_CAP_REG 0xe5 | |
214 | #define AXP288_FG_LOW_CAP_REG 0xe6 | |
215 | #define AXP288_FG_TUNE0 0xe8 | |
216 | #define AXP288_FG_TUNE1 0xe9 | |
217 | #define AXP288_FG_TUNE2 0xea | |
218 | #define AXP288_FG_TUNE3 0xeb | |
219 | #define AXP288_FG_TUNE4 0xec | |
220 | #define AXP288_FG_TUNE5 0xed | |
af7e9069 | 221 | |
cfb61a41 CC |
222 | /* Regulators IDs */ |
223 | enum { | |
224 | AXP20X_LDO1 = 0, | |
225 | AXP20X_LDO2, | |
226 | AXP20X_LDO3, | |
227 | AXP20X_LDO4, | |
228 | AXP20X_LDO5, | |
229 | AXP20X_DCDC2, | |
230 | AXP20X_DCDC3, | |
231 | AXP20X_REG_ID_MAX, | |
232 | }; | |
233 | ||
f05be589 BB |
234 | enum { |
235 | AXP22X_DCDC1 = 0, | |
236 | AXP22X_DCDC2, | |
237 | AXP22X_DCDC3, | |
238 | AXP22X_DCDC4, | |
239 | AXP22X_DCDC5, | |
240 | AXP22X_DC1SW, | |
241 | AXP22X_DC5LDO, | |
242 | AXP22X_ALDO1, | |
243 | AXP22X_ALDO2, | |
244 | AXP22X_ALDO3, | |
245 | AXP22X_ELDO1, | |
246 | AXP22X_ELDO2, | |
247 | AXP22X_ELDO3, | |
248 | AXP22X_DLDO1, | |
249 | AXP22X_DLDO2, | |
250 | AXP22X_DLDO3, | |
251 | AXP22X_DLDO4, | |
252 | AXP22X_RTC_LDO, | |
253 | AXP22X_LDO_IO0, | |
254 | AXP22X_LDO_IO1, | |
255 | AXP22X_REG_ID_MAX, | |
256 | }; | |
257 | ||
cfb61a41 | 258 | /* IRQs */ |
d8d79f8f MS |
259 | enum { |
260 | AXP152_IRQ_LDO0IN_CONNECT = 1, | |
261 | AXP152_IRQ_LDO0IN_REMOVAL, | |
262 | AXP152_IRQ_ALDO0IN_CONNECT, | |
263 | AXP152_IRQ_ALDO0IN_REMOVAL, | |
264 | AXP152_IRQ_DCDC1_V_LOW, | |
265 | AXP152_IRQ_DCDC2_V_LOW, | |
266 | AXP152_IRQ_DCDC3_V_LOW, | |
267 | AXP152_IRQ_DCDC4_V_LOW, | |
268 | AXP152_IRQ_PEK_SHORT, | |
269 | AXP152_IRQ_PEK_LONG, | |
270 | AXP152_IRQ_TIMER, | |
271 | AXP152_IRQ_PEK_RIS_EDGE, | |
272 | AXP152_IRQ_PEK_FAL_EDGE, | |
273 | AXP152_IRQ_GPIO3_INPUT, | |
274 | AXP152_IRQ_GPIO2_INPUT, | |
275 | AXP152_IRQ_GPIO1_INPUT, | |
276 | AXP152_IRQ_GPIO0_INPUT, | |
277 | }; | |
278 | ||
cfb61a41 CC |
279 | enum { |
280 | AXP20X_IRQ_ACIN_OVER_V = 1, | |
281 | AXP20X_IRQ_ACIN_PLUGIN, | |
282 | AXP20X_IRQ_ACIN_REMOVAL, | |
283 | AXP20X_IRQ_VBUS_OVER_V, | |
284 | AXP20X_IRQ_VBUS_PLUGIN, | |
285 | AXP20X_IRQ_VBUS_REMOVAL, | |
286 | AXP20X_IRQ_VBUS_V_LOW, | |
287 | AXP20X_IRQ_BATT_PLUGIN, | |
288 | AXP20X_IRQ_BATT_REMOVAL, | |
289 | AXP20X_IRQ_BATT_ENT_ACT_MODE, | |
290 | AXP20X_IRQ_BATT_EXIT_ACT_MODE, | |
291 | AXP20X_IRQ_CHARG, | |
292 | AXP20X_IRQ_CHARG_DONE, | |
293 | AXP20X_IRQ_BATT_TEMP_HIGH, | |
294 | AXP20X_IRQ_BATT_TEMP_LOW, | |
295 | AXP20X_IRQ_DIE_TEMP_HIGH, | |
296 | AXP20X_IRQ_CHARG_I_LOW, | |
297 | AXP20X_IRQ_DCDC1_V_LONG, | |
298 | AXP20X_IRQ_DCDC2_V_LONG, | |
299 | AXP20X_IRQ_DCDC3_V_LONG, | |
300 | AXP20X_IRQ_PEK_SHORT = 22, | |
301 | AXP20X_IRQ_PEK_LONG, | |
302 | AXP20X_IRQ_N_OE_PWR_ON, | |
303 | AXP20X_IRQ_N_OE_PWR_OFF, | |
304 | AXP20X_IRQ_VBUS_VALID, | |
305 | AXP20X_IRQ_VBUS_NOT_VALID, | |
306 | AXP20X_IRQ_VBUS_SESS_VALID, | |
307 | AXP20X_IRQ_VBUS_SESS_END, | |
308 | AXP20X_IRQ_LOW_PWR_LVL1, | |
309 | AXP20X_IRQ_LOW_PWR_LVL2, | |
310 | AXP20X_IRQ_TIMER, | |
311 | AXP20X_IRQ_PEK_RIS_EDGE, | |
312 | AXP20X_IRQ_PEK_FAL_EDGE, | |
313 | AXP20X_IRQ_GPIO3_INPUT, | |
314 | AXP20X_IRQ_GPIO2_INPUT, | |
315 | AXP20X_IRQ_GPIO1_INPUT, | |
316 | AXP20X_IRQ_GPIO0_INPUT, | |
317 | }; | |
318 | ||
f05be589 BB |
319 | enum axp22x_irqs { |
320 | AXP22X_IRQ_ACIN_OVER_V = 1, | |
321 | AXP22X_IRQ_ACIN_PLUGIN, | |
322 | AXP22X_IRQ_ACIN_REMOVAL, | |
323 | AXP22X_IRQ_VBUS_OVER_V, | |
324 | AXP22X_IRQ_VBUS_PLUGIN, | |
325 | AXP22X_IRQ_VBUS_REMOVAL, | |
326 | AXP22X_IRQ_VBUS_V_LOW, | |
327 | AXP22X_IRQ_BATT_PLUGIN, | |
328 | AXP22X_IRQ_BATT_REMOVAL, | |
329 | AXP22X_IRQ_BATT_ENT_ACT_MODE, | |
330 | AXP22X_IRQ_BATT_EXIT_ACT_MODE, | |
331 | AXP22X_IRQ_CHARG, | |
332 | AXP22X_IRQ_CHARG_DONE, | |
333 | AXP22X_IRQ_BATT_TEMP_HIGH, | |
334 | AXP22X_IRQ_BATT_TEMP_LOW, | |
335 | AXP22X_IRQ_DIE_TEMP_HIGH, | |
336 | AXP22X_IRQ_PEK_SHORT, | |
337 | AXP22X_IRQ_PEK_LONG, | |
338 | AXP22X_IRQ_LOW_PWR_LVL1, | |
339 | AXP22X_IRQ_LOW_PWR_LVL2, | |
340 | AXP22X_IRQ_TIMER, | |
341 | AXP22X_IRQ_PEK_RIS_EDGE, | |
342 | AXP22X_IRQ_PEK_FAL_EDGE, | |
343 | AXP22X_IRQ_GPIO1_INPUT, | |
344 | AXP22X_IRQ_GPIO0_INPUT, | |
345 | }; | |
346 | ||
af7e9069 JP |
347 | enum axp288_irqs { |
348 | AXP288_IRQ_VBUS_FALL = 2, | |
349 | AXP288_IRQ_VBUS_RISE, | |
350 | AXP288_IRQ_OV, | |
351 | AXP288_IRQ_FALLING_ALT, | |
352 | AXP288_IRQ_RISING_ALT, | |
353 | AXP288_IRQ_OV_ALT, | |
354 | AXP288_IRQ_DONE = 10, | |
355 | AXP288_IRQ_CHARGING, | |
356 | AXP288_IRQ_SAFE_QUIT, | |
357 | AXP288_IRQ_SAFE_ENTER, | |
358 | AXP288_IRQ_ABSENT, | |
359 | AXP288_IRQ_APPEND, | |
360 | AXP288_IRQ_QWBTU, | |
361 | AXP288_IRQ_WBTU, | |
362 | AXP288_IRQ_QWBTO, | |
363 | AXP288_IRQ_WBTO, | |
364 | AXP288_IRQ_QCBTU, | |
365 | AXP288_IRQ_CBTU, | |
366 | AXP288_IRQ_QCBTO, | |
367 | AXP288_IRQ_CBTO, | |
368 | AXP288_IRQ_WL2, | |
369 | AXP288_IRQ_WL1, | |
370 | AXP288_IRQ_GPADC, | |
371 | AXP288_IRQ_OT = 31, | |
372 | AXP288_IRQ_GPIO0, | |
373 | AXP288_IRQ_GPIO1, | |
374 | AXP288_IRQ_POKO, | |
375 | AXP288_IRQ_POKL, | |
376 | AXP288_IRQ_POKS, | |
377 | AXP288_IRQ_POKN, | |
378 | AXP288_IRQ_POKP, | |
379 | AXP288_IRQ_TIMER, | |
380 | AXP288_IRQ_MV_CHNG, | |
381 | AXP288_IRQ_BC_USB_CHNG, | |
382 | }; | |
383 | ||
384 | #define AXP288_TS_ADC_H 0x58 | |
385 | #define AXP288_TS_ADC_L 0x59 | |
386 | #define AXP288_GP_ADC_H 0x5a | |
387 | #define AXP288_GP_ADC_L 0x5b | |
388 | ||
cfb61a41 CC |
389 | struct axp20x_dev { |
390 | struct device *dev; | |
391 | struct i2c_client *i2c_client; | |
392 | struct regmap *regmap; | |
393 | struct regmap_irq_chip_data *regmap_irqc; | |
394 | long variant; | |
af7e9069 JP |
395 | int nr_cells; |
396 | struct mfd_cell *cells; | |
397 | const struct regmap_config *regmap_cfg; | |
398 | const struct regmap_irq_chip *regmap_irq_chip; | |
cfb61a41 CC |
399 | }; |
400 | ||
774e0b41 TB |
401 | #define BATTID_LEN 64 |
402 | #define OCV_CURVE_SIZE 32 | |
403 | #define MAX_THERM_CURVE_SIZE 25 | |
404 | #define PD_DEF_MIN_TEMP 0 | |
405 | #define PD_DEF_MAX_TEMP 55 | |
406 | ||
407 | struct axp20x_fg_pdata { | |
408 | char battid[BATTID_LEN + 1]; | |
409 | int design_cap; | |
410 | int min_volt; | |
411 | int max_volt; | |
412 | int max_temp; | |
413 | int min_temp; | |
414 | int cap1; | |
415 | int cap0; | |
416 | int rdc1; | |
417 | int rdc0; | |
418 | int ocv_curve[OCV_CURVE_SIZE]; | |
419 | int tcsz; | |
420 | int thermistor_curve[MAX_THERM_CURVE_SIZE][2]; | |
421 | }; | |
422 | ||
843735b7 RP |
423 | struct axp20x_chrg_pdata { |
424 | int max_cc; | |
425 | int max_cv; | |
426 | int def_cc; | |
427 | int def_cv; | |
428 | }; | |
429 | ||
f0312378 RP |
430 | struct axp288_extcon_pdata { |
431 | /* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */ | |
432 | struct gpio_desc *gpio_mux_cntl; | |
433 | }; | |
434 | ||
cfb61a41 | 435 | #endif /* __LINUX_MFD_AXP20X_H */ |