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f69a7cf7 | 1 | /* |
2eedcbfc | 2 | * Register definitions for Rockchip's RK808/RK818 PMIC |
f69a7cf7 CZ |
3 | * |
4 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
5 | * | |
6 | * Author: Chris Zhong <zyw@rock-chips.com> | |
7 | * Author: Zhang Qing <zhangqing@rock-chips.com> | |
8 | * | |
2eedcbfc WE |
9 | * Copyright (C) 2016 PHYTEC Messtechnik GmbH |
10 | * | |
11 | * Author: Wadim Egorov <w.egorov@phytec.de> | |
12 | * | |
f69a7cf7 CZ |
13 | * This program is free software; you can redistribute it and/or modify it |
14 | * under the terms and conditions of the GNU General Public License, | |
15 | * version 2, as published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope it will be useful, but WITHOUT | |
18 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
19 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
20 | * more details. | |
21 | */ | |
22 | ||
2eedcbfc WE |
23 | #ifndef __LINUX_REGULATOR_RK808_H |
24 | #define __LINUX_REGULATOR_RK808_H | |
f69a7cf7 CZ |
25 | |
26 | #include <linux/regulator/machine.h> | |
27 | #include <linux/regmap.h> | |
28 | ||
29 | /* | |
30 | * rk808 Global Register Map. | |
31 | */ | |
32 | ||
33 | #define RK808_DCDC1 0 /* (0+RK808_START) */ | |
34 | #define RK808_LDO1 4 /* (4+RK808_START) */ | |
2eedcbfc | 35 | #define RK808_NUM_REGULATORS 14 |
f69a7cf7 CZ |
36 | |
37 | enum rk808_reg { | |
38 | RK808_ID_DCDC1, | |
39 | RK808_ID_DCDC2, | |
40 | RK808_ID_DCDC3, | |
41 | RK808_ID_DCDC4, | |
42 | RK808_ID_LDO1, | |
43 | RK808_ID_LDO2, | |
44 | RK808_ID_LDO3, | |
45 | RK808_ID_LDO4, | |
46 | RK808_ID_LDO5, | |
47 | RK808_ID_LDO6, | |
48 | RK808_ID_LDO7, | |
49 | RK808_ID_LDO8, | |
50 | RK808_ID_SWITCH1, | |
51 | RK808_ID_SWITCH2, | |
52 | }; | |
53 | ||
54 | #define RK808_SECONDS_REG 0x00 | |
55 | #define RK808_MINUTES_REG 0x01 | |
56 | #define RK808_HOURS_REG 0x02 | |
57 | #define RK808_DAYS_REG 0x03 | |
58 | #define RK808_MONTHS_REG 0x04 | |
59 | #define RK808_YEARS_REG 0x05 | |
60 | #define RK808_WEEKS_REG 0x06 | |
61 | #define RK808_ALARM_SECONDS_REG 0x08 | |
62 | #define RK808_ALARM_MINUTES_REG 0x09 | |
63 | #define RK808_ALARM_HOURS_REG 0x0a | |
64 | #define RK808_ALARM_DAYS_REG 0x0b | |
65 | #define RK808_ALARM_MONTHS_REG 0x0c | |
66 | #define RK808_ALARM_YEARS_REG 0x0d | |
67 | #define RK808_RTC_CTRL_REG 0x10 | |
68 | #define RK808_RTC_STATUS_REG 0x11 | |
69 | #define RK808_RTC_INT_REG 0x12 | |
70 | #define RK808_RTC_COMP_LSB_REG 0x13 | |
71 | #define RK808_RTC_COMP_MSB_REG 0x14 | |
2eedcbfc WE |
72 | #define RK808_ID_MSB 0x17 |
73 | #define RK808_ID_LSB 0x18 | |
f69a7cf7 CZ |
74 | #define RK808_CLK32OUT_REG 0x20 |
75 | #define RK808_VB_MON_REG 0x21 | |
76 | #define RK808_THERMAL_REG 0x22 | |
77 | #define RK808_DCDC_EN_REG 0x23 | |
78 | #define RK808_LDO_EN_REG 0x24 | |
79 | #define RK808_SLEEP_SET_OFF_REG1 0x25 | |
80 | #define RK808_SLEEP_SET_OFF_REG2 0x26 | |
81 | #define RK808_DCDC_UV_STS_REG 0x27 | |
82 | #define RK808_DCDC_UV_ACT_REG 0x28 | |
83 | #define RK808_LDO_UV_STS_REG 0x29 | |
84 | #define RK808_LDO_UV_ACT_REG 0x2a | |
85 | #define RK808_DCDC_PG_REG 0x2b | |
86 | #define RK808_LDO_PG_REG 0x2c | |
87 | #define RK808_VOUT_MON_TDB_REG 0x2d | |
88 | #define RK808_BUCK1_CONFIG_REG 0x2e | |
89 | #define RK808_BUCK1_ON_VSEL_REG 0x2f | |
90 | #define RK808_BUCK1_SLP_VSEL_REG 0x30 | |
91 | #define RK808_BUCK1_DVS_VSEL_REG 0x31 | |
92 | #define RK808_BUCK2_CONFIG_REG 0x32 | |
93 | #define RK808_BUCK2_ON_VSEL_REG 0x33 | |
94 | #define RK808_BUCK2_SLP_VSEL_REG 0x34 | |
95 | #define RK808_BUCK2_DVS_VSEL_REG 0x35 | |
96 | #define RK808_BUCK3_CONFIG_REG 0x36 | |
97 | #define RK808_BUCK4_CONFIG_REG 0x37 | |
98 | #define RK808_BUCK4_ON_VSEL_REG 0x38 | |
99 | #define RK808_BUCK4_SLP_VSEL_REG 0x39 | |
100 | #define RK808_BOOST_CONFIG_REG 0x3a | |
101 | #define RK808_LDO1_ON_VSEL_REG 0x3b | |
102 | #define RK808_LDO1_SLP_VSEL_REG 0x3c | |
103 | #define RK808_LDO2_ON_VSEL_REG 0x3d | |
104 | #define RK808_LDO2_SLP_VSEL_REG 0x3e | |
105 | #define RK808_LDO3_ON_VSEL_REG 0x3f | |
106 | #define RK808_LDO3_SLP_VSEL_REG 0x40 | |
107 | #define RK808_LDO4_ON_VSEL_REG 0x41 | |
108 | #define RK808_LDO4_SLP_VSEL_REG 0x42 | |
109 | #define RK808_LDO5_ON_VSEL_REG 0x43 | |
110 | #define RK808_LDO5_SLP_VSEL_REG 0x44 | |
111 | #define RK808_LDO6_ON_VSEL_REG 0x45 | |
112 | #define RK808_LDO6_SLP_VSEL_REG 0x46 | |
113 | #define RK808_LDO7_ON_VSEL_REG 0x47 | |
114 | #define RK808_LDO7_SLP_VSEL_REG 0x48 | |
115 | #define RK808_LDO8_ON_VSEL_REG 0x49 | |
116 | #define RK808_LDO8_SLP_VSEL_REG 0x4a | |
117 | #define RK808_DEVCTRL_REG 0x4b | |
118 | #define RK808_INT_STS_REG1 0x4c | |
119 | #define RK808_INT_STS_MSK_REG1 0x4d | |
120 | #define RK808_INT_STS_REG2 0x4e | |
121 | #define RK808_INT_STS_MSK_REG2 0x4f | |
122 | #define RK808_IO_POL_REG 0x50 | |
123 | ||
2eedcbfc WE |
124 | /* RK818 */ |
125 | #define RK818_DCDC1 0 | |
126 | #define RK818_LDO1 4 | |
127 | #define RK818_NUM_REGULATORS 17 | |
128 | ||
129 | enum rk818_reg { | |
130 | RK818_ID_DCDC1, | |
131 | RK818_ID_DCDC2, | |
132 | RK818_ID_DCDC3, | |
133 | RK818_ID_DCDC4, | |
134 | RK818_ID_BOOST, | |
135 | RK818_ID_LDO1, | |
136 | RK818_ID_LDO2, | |
137 | RK818_ID_LDO3, | |
138 | RK818_ID_LDO4, | |
139 | RK818_ID_LDO5, | |
140 | RK818_ID_LDO6, | |
141 | RK818_ID_LDO7, | |
142 | RK818_ID_LDO8, | |
143 | RK818_ID_LDO9, | |
144 | RK818_ID_SWITCH, | |
145 | RK818_ID_HDMI_SWITCH, | |
146 | RK818_ID_OTG_SWITCH, | |
147 | }; | |
148 | ||
149 | #define RK818_DCDC_EN_REG 0x23 | |
150 | #define RK818_LDO_EN_REG 0x24 | |
151 | #define RK818_SLEEP_SET_OFF_REG1 0x25 | |
152 | #define RK818_SLEEP_SET_OFF_REG2 0x26 | |
153 | #define RK818_DCDC_UV_STS_REG 0x27 | |
154 | #define RK818_DCDC_UV_ACT_REG 0x28 | |
155 | #define RK818_LDO_UV_STS_REG 0x29 | |
156 | #define RK818_LDO_UV_ACT_REG 0x2a | |
157 | #define RK818_DCDC_PG_REG 0x2b | |
158 | #define RK818_LDO_PG_REG 0x2c | |
159 | #define RK818_VOUT_MON_TDB_REG 0x2d | |
160 | #define RK818_BUCK1_CONFIG_REG 0x2e | |
161 | #define RK818_BUCK1_ON_VSEL_REG 0x2f | |
162 | #define RK818_BUCK1_SLP_VSEL_REG 0x30 | |
163 | #define RK818_BUCK2_CONFIG_REG 0x32 | |
164 | #define RK818_BUCK2_ON_VSEL_REG 0x33 | |
165 | #define RK818_BUCK2_SLP_VSEL_REG 0x34 | |
166 | #define RK818_BUCK3_CONFIG_REG 0x36 | |
167 | #define RK818_BUCK4_CONFIG_REG 0x37 | |
168 | #define RK818_BUCK4_ON_VSEL_REG 0x38 | |
169 | #define RK818_BUCK4_SLP_VSEL_REG 0x39 | |
170 | #define RK818_BOOST_CONFIG_REG 0x3a | |
171 | #define RK818_LDO1_ON_VSEL_REG 0x3b | |
172 | #define RK818_LDO1_SLP_VSEL_REG 0x3c | |
173 | #define RK818_LDO2_ON_VSEL_REG 0x3d | |
174 | #define RK818_LDO2_SLP_VSEL_REG 0x3e | |
175 | #define RK818_LDO3_ON_VSEL_REG 0x3f | |
176 | #define RK818_LDO3_SLP_VSEL_REG 0x40 | |
177 | #define RK818_LDO4_ON_VSEL_REG 0x41 | |
178 | #define RK818_LDO4_SLP_VSEL_REG 0x42 | |
179 | #define RK818_LDO5_ON_VSEL_REG 0x43 | |
180 | #define RK818_LDO5_SLP_VSEL_REG 0x44 | |
181 | #define RK818_LDO6_ON_VSEL_REG 0x45 | |
182 | #define RK818_LDO6_SLP_VSEL_REG 0x46 | |
183 | #define RK818_LDO7_ON_VSEL_REG 0x47 | |
184 | #define RK818_LDO7_SLP_VSEL_REG 0x48 | |
185 | #define RK818_LDO8_ON_VSEL_REG 0x49 | |
186 | #define RK818_LDO8_SLP_VSEL_REG 0x4a | |
187 | #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54 | |
188 | #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55 | |
189 | #define RK818_DEVCTRL_REG 0x4b | |
190 | #define RK818_INT_STS_REG1 0X4c | |
191 | #define RK818_INT_STS_MSK_REG1 0x4d | |
192 | #define RK818_INT_STS_REG2 0x4e | |
193 | #define RK818_INT_STS_MSK_REG2 0x4f | |
194 | #define RK818_IO_POL_REG 0x50 | |
195 | #define RK818_H5V_EN_REG 0x52 | |
196 | #define RK818_SLEEP_SET_OFF_REG3 0x53 | |
197 | #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54 | |
198 | #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55 | |
199 | #define RK818_BOOST_CTRL_REG 0x56 | |
200 | #define RK818_DCDC_ILMAX 0x90 | |
201 | #define RK818_USB_CTRL_REG 0xa1 | |
202 | ||
203 | #define RK818_H5V_EN BIT(0) | |
204 | #define RK818_REF_RDY_CTRL BIT(1) | |
205 | #define RK818_USB_ILIM_SEL_MASK 0xf | |
206 | #define RK818_USB_ILMIN_2000MA 0x7 | |
207 | #define RK818_USB_CHG_SD_VSEL_MASK 0x70 | |
208 | ||
209 | /* RK808 IRQ Definitions */ | |
f69a7cf7 CZ |
210 | #define RK808_IRQ_VOUT_LO 0 |
211 | #define RK808_IRQ_VB_LO 1 | |
212 | #define RK808_IRQ_PWRON 2 | |
213 | #define RK808_IRQ_PWRON_LP 3 | |
214 | #define RK808_IRQ_HOTDIE 4 | |
215 | #define RK808_IRQ_RTC_ALARM 5 | |
216 | #define RK808_IRQ_RTC_PERIOD 6 | |
217 | #define RK808_IRQ_PLUG_IN_INT 7 | |
218 | #define RK808_IRQ_PLUG_OUT_INT 8 | |
219 | #define RK808_NUM_IRQ 9 | |
220 | ||
221 | #define RK808_IRQ_VOUT_LO_MSK BIT(0) | |
222 | #define RK808_IRQ_VB_LO_MSK BIT(1) | |
223 | #define RK808_IRQ_PWRON_MSK BIT(2) | |
224 | #define RK808_IRQ_PWRON_LP_MSK BIT(3) | |
225 | #define RK808_IRQ_HOTDIE_MSK BIT(4) | |
226 | #define RK808_IRQ_RTC_ALARM_MSK BIT(5) | |
227 | #define RK808_IRQ_RTC_PERIOD_MSK BIT(6) | |
228 | #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0) | |
229 | #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1) | |
230 | ||
2eedcbfc WE |
231 | /* RK818 IRQ Definitions */ |
232 | #define RK818_IRQ_VOUT_LO 0 | |
233 | #define RK818_IRQ_VB_LO 1 | |
234 | #define RK818_IRQ_PWRON 2 | |
235 | #define RK818_IRQ_PWRON_LP 3 | |
236 | #define RK818_IRQ_HOTDIE 4 | |
237 | #define RK818_IRQ_RTC_ALARM 5 | |
238 | #define RK818_IRQ_RTC_PERIOD 6 | |
239 | #define RK818_IRQ_USB_OV 7 | |
240 | #define RK818_IRQ_PLUG_IN 8 | |
241 | #define RK818_IRQ_PLUG_OUT 9 | |
242 | #define RK818_IRQ_CHG_OK 10 | |
243 | #define RK818_IRQ_CHG_TE 11 | |
244 | #define RK818_IRQ_CHG_TS1 12 | |
245 | #define RK818_IRQ_TS2 13 | |
246 | #define RK818_IRQ_CHG_CVTLIM 14 | |
247 | #define RK818_IRQ_DISCHG_ILIM 7 | |
248 | ||
249 | #define RK818_IRQ_VOUT_LO_MSK BIT(0) | |
250 | #define RK818_IRQ_VB_LO_MSK BIT(1) | |
251 | #define RK818_IRQ_PWRON_MSK BIT(2) | |
252 | #define RK818_IRQ_PWRON_LP_MSK BIT(3) | |
253 | #define RK818_IRQ_HOTDIE_MSK BIT(4) | |
254 | #define RK818_IRQ_RTC_ALARM_MSK BIT(5) | |
255 | #define RK818_IRQ_RTC_PERIOD_MSK BIT(6) | |
256 | #define RK818_IRQ_USB_OV_MSK BIT(7) | |
257 | #define RK818_IRQ_PLUG_IN_MSK BIT(0) | |
258 | #define RK818_IRQ_PLUG_OUT_MSK BIT(1) | |
259 | #define RK818_IRQ_CHG_OK_MSK BIT(2) | |
260 | #define RK818_IRQ_CHG_TE_MSK BIT(3) | |
261 | #define RK818_IRQ_CHG_TS1_MSK BIT(4) | |
262 | #define RK818_IRQ_TS2_MSK BIT(5) | |
263 | #define RK818_IRQ_CHG_CVTLIM_MSK BIT(6) | |
264 | #define RK818_IRQ_DISCHG_ILIM_MSK BIT(7) | |
265 | ||
266 | #define RK818_NUM_IRQ 16 | |
267 | ||
f69a7cf7 CZ |
268 | #define RK808_VBAT_LOW_2V8 0x00 |
269 | #define RK808_VBAT_LOW_2V9 0x01 | |
270 | #define RK808_VBAT_LOW_3V0 0x02 | |
271 | #define RK808_VBAT_LOW_3V1 0x03 | |
272 | #define RK808_VBAT_LOW_3V2 0x04 | |
273 | #define RK808_VBAT_LOW_3V3 0x05 | |
274 | #define RK808_VBAT_LOW_3V4 0x06 | |
275 | #define RK808_VBAT_LOW_3V5 0x07 | |
276 | #define VBAT_LOW_VOL_MASK (0x07 << 0) | |
277 | #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4) | |
278 | #define EN_VBAT_LOW_IRQ (0x1 << 4) | |
279 | #define VBAT_LOW_ACT_MASK (0x1 << 4) | |
280 | ||
281 | #define BUCK_ILMIN_MASK (7 << 0) | |
282 | #define BOOST_ILMIN_MASK (7 << 0) | |
283 | #define BUCK1_RATE_MASK (3 << 3) | |
284 | #define BUCK2_RATE_MASK (3 << 3) | |
285 | #define MASK_ALL 0xff | |
286 | ||
e19f7428 CZ |
287 | #define BUCK_UV_ACT_MASK 0x0f |
288 | #define BUCK_UV_ACT_DISABLE 0 | |
289 | ||
f69a7cf7 CZ |
290 | #define SWITCH2_EN BIT(6) |
291 | #define SWITCH1_EN BIT(5) | |
292 | #define DEV_OFF_RST BIT(3) | |
293 | ||
294 | #define VB_LO_ACT BIT(4) | |
295 | #define VB_LO_SEL_3500MV (7 << 0) | |
296 | ||
297 | #define VOUT_LO_INT BIT(0) | |
298 | #define CLK32KOUT2_EN BIT(0) | |
299 | ||
300 | enum { | |
301 | BUCK_ILMIN_50MA, | |
302 | BUCK_ILMIN_100MA, | |
303 | BUCK_ILMIN_150MA, | |
304 | BUCK_ILMIN_200MA, | |
305 | BUCK_ILMIN_250MA, | |
306 | BUCK_ILMIN_300MA, | |
307 | BUCK_ILMIN_350MA, | |
308 | BUCK_ILMIN_400MA, | |
309 | }; | |
310 | ||
311 | enum { | |
312 | BOOST_ILMIN_75MA, | |
313 | BOOST_ILMIN_100MA, | |
314 | BOOST_ILMIN_125MA, | |
315 | BOOST_ILMIN_150MA, | |
316 | BOOST_ILMIN_175MA, | |
317 | BOOST_ILMIN_200MA, | |
318 | BOOST_ILMIN_225MA, | |
319 | BOOST_ILMIN_250MA, | |
320 | }; | |
321 | ||
2eedcbfc WE |
322 | enum { |
323 | RK808_ID = 0x0000, | |
324 | RK818_ID = 0x8181, | |
325 | }; | |
326 | ||
f69a7cf7 | 327 | struct rk808 { |
2eedcbfc WE |
328 | struct i2c_client *i2c; |
329 | struct regmap_irq_chip_data *irq_data; | |
330 | struct regmap *regmap; | |
331 | long variant; | |
332 | const struct regmap_config *regmap_cfg; | |
333 | const struct regmap_irq_chip *regmap_irq_chip; | |
f69a7cf7 | 334 | }; |
2eedcbfc | 335 | #endif /* __LINUX_REGULATOR_RK808_H */ |