projects / deliverable / linux.git / blame
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|---|---|---|
| b45b719e AD |
1 | /* |
| 2 | * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | * Andrew F. Davis <afd@ti.com> | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or | |
| 6 | * modify it under the terms of the GNU General Public License version 2 as | |
| 7 | * published by the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
| 10 | * kind, whether expressed or implied; without even the implied warranty | |
| 11 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License version 2 for more details. | |
| 13 | * | |
| 14 | * Based on the TPS65912 driver | |
| 15 | */ | |
| 16 | ||
| 17 | #ifndef __LINUX_MFD_TPS65086_H | |
| 18 | #define __LINUX_MFD_TPS65086_H | |
| 19 | ||
| 20 | #include <linux/device.h> | |
| 21 | #include <linux/regmap.h> | |
| 22 | ||
| 23 | /* List of registers for TPS65086 */ | |
| 24 | #define TPS65086_DEVICEID 0x01 | |
| 25 | #define TPS65086_IRQ 0x02 | |
| 26 | #define TPS65086_IRQ_MASK 0x03 | |
| 27 | #define TPS65086_PMICSTAT 0x04 | |
| 28 | #define TPS65086_SHUTDNSRC 0x05 | |
| 29 | #define TPS65086_BUCK1CTRL 0x20 | |
| 30 | #define TPS65086_BUCK2CTRL 0x21 | |
| 31 | #define TPS65086_BUCK3DECAY 0x22 | |
| 32 | #define TPS65086_BUCK3VID 0x23 | |
| 33 | #define TPS65086_BUCK3SLPCTRL 0x24 | |
| 34 | #define TPS65086_BUCK4CTRL 0x25 | |
| 35 | #define TPS65086_BUCK5CTRL 0x26 | |
| 36 | #define TPS65086_BUCK6CTRL 0x27 | |
| 37 | #define TPS65086_LDOA2CTRL 0x28 | |
| 38 | #define TPS65086_LDOA3CTRL 0x29 | |
| 39 | #define TPS65086_DISCHCTRL1 0x40 | |
| 40 | #define TPS65086_DISCHCTRL2 0x41 | |
| 41 | #define TPS65086_DISCHCTRL3 0x42 | |
| 42 | #define TPS65086_PG_DELAY1 0x43 | |
| 43 | #define TPS65086_FORCESHUTDN 0x91 | |
| 44 | #define TPS65086_BUCK1SLPCTRL 0x92 | |
| 45 | #define TPS65086_BUCK2SLPCTRL 0x93 | |
| 46 | #define TPS65086_BUCK4VID 0x94 | |
| 47 | #define TPS65086_BUCK4SLPVID 0x95 | |
| 48 | #define TPS65086_BUCK5VID 0x96 | |
| 49 | #define TPS65086_BUCK5SLPVID 0x97 | |
| 50 | #define TPS65086_BUCK6VID 0x98 | |
| 51 | #define TPS65086_BUCK6SLPVID 0x99 | |
| 52 | #define TPS65086_LDOA2VID 0x9A | |
| 53 | #define TPS65086_LDOA3VID 0x9B | |
| 54 | #define TPS65086_BUCK123CTRL 0x9C | |
| 55 | #define TPS65086_PG_DELAY2 0x9D | |
| 56 | #define TPS65086_PIN_EN_MASK1 0x9E | |
| 57 | #define TPS65086_PIN_EN_MASK2 0x9F | |
| 58 | #define TPS65086_SWVTT_EN 0x9F | |
| 59 | #define TPS65086_PIN_EN_OVR1 0xA0 | |
| 60 | #define TPS65086_PIN_EN_OVR2 0xA1 | |
| 61 | #define TPS65086_GPOCTRL 0xA1 | |
| 62 | #define TPS65086_PWR_FAULT_MASK1 0xA2 | |
| 63 | #define TPS65086_PWR_FAULT_MASK2 0xA3 | |
| 64 | #define TPS65086_GPO1PG_CTRL1 0xA4 | |
| 65 | #define TPS65086_GPO1PG_CTRL2 0xA5 | |
| 66 | #define TPS65086_GPO4PG_CTRL1 0xA6 | |
| 67 | #define TPS65086_GPO4PG_CTRL2 0xA7 | |
| 68 | #define TPS65086_GPO2PG_CTRL1 0xA8 | |
| 69 | #define TPS65086_GPO2PG_CTRL2 0xA9 | |
| 70 | #define TPS65086_GPO3PG_CTRL1 0xAA | |
| 71 | #define TPS65086_GPO3PG_CTRL2 0xAB | |
| 72 | #define TPS65086_LDOA1CTRL 0xAE | |
| 73 | #define TPS65086_PG_STATUS1 0xB0 | |
| 74 | #define TPS65086_PG_STATUS2 0xB1 | |
| 75 | #define TPS65086_PWR_FAULT_STATUS1 0xB2 | |
| 76 | #define TPS65086_PWR_FAULT_STATUS2 0xB3 | |
| 77 | #define TPS65086_TEMPCRIT 0xB4 | |
| 78 | #define TPS65086_TEMPHOT 0xB5 | |
| 79 | #define TPS65086_OC_STATUS 0xB6 | |
| 80 | ||
| 81 | /* IRQ Register field definitions */ | |
| 82 | #define TPS65086_IRQ_DIETEMP_MASK BIT(0) | |
| 83 | #define TPS65086_IRQ_SHUTDN_MASK BIT(3) | |
| 84 | #define TPS65086_IRQ_FAULT_MASK BIT(7) | |
| 85 | ||
| 86 | /* DEVICEID Register field definitions */ | |
| 87 | #define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0) | |
| 88 | #define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4) | |
| 89 | #define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6) | |
| 90 | ||
| 91 | /* VID Masks */ | |
| 92 | #define BUCK_VID_MASK GENMASK(7, 1) | |
| 93 | #define VDOA1_VID_MASK GENMASK(4, 1) | |
| 94 | #define VDOA23_VID_MASK GENMASK(3, 0) | |
| 95 | ||
| 96 | /* Define the TPS65086 IRQ numbers */ | |
| 97 | enum tps65086_irqs { | |
| 98 | TPS65086_IRQ_DIETEMP, | |
| 99 | TPS65086_IRQ_SHUTDN, | |
| 100 | TPS65086_IRQ_FAULT, | |
| 101 | }; | |
| 102 | ||
| 103 | /** | |
| 104 | * struct tps65086 - state holder for the tps65086 driver | |
| 105 | * | |
| 106 | * Device data may be used to access the TPS65086 chip | |
| 107 | */ | |
| 108 | struct tps65086 { | |
| 109 | struct device *dev; | |
| 110 | struct regmap *regmap; | |
| 111 | ||
| 112 | /* IRQ Data */ | |
| 113 | int irq; | |
| 114 | struct regmap_irq_chip_data *irq_data; | |
| 115 | }; | |
| 116 | ||
| 117 | #endif /* __LINUX_MFD_TPS65086_H */ |