[deliverable/linux.git] / include / linux / mtd / doc2000.h

/*
 * Linux driver for Disk-On-Chip devices
 *
 * Copyright © 1999 Machine Vision Holdings, Inc.
 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org>
 * Copyright © 2002-2003 Greg Ungerer <gerg@snapgear.com>
 * Copyright © 2002-2003 SnapGear Inc
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 *
 */

#ifndef __MTD_DOC2000_H__
#define __MTD_DOC2000_H__

#include <linux/mtd/mtd.h>
#include <linux/mutex.h>

#define DoC_Sig1 0
#define DoC_Sig2 1

#define DoC_ChipID		0x1000
#define DoC_DOCStatus		0x1001
#define DoC_DOCControl		0x1002
#define DoC_FloorSelect		0x1003
#define DoC_CDSNControl		0x1004
#define DoC_CDSNDeviceSelect 	0x1005
#define DoC_ECCConf 		0x1006
#define DoC_2k_ECCStatus	0x1007

#define DoC_CDSNSlowIO		0x100d
#define DoC_ECCSyndrome0	0x1010
#define DoC_ECCSyndrome1	0x1011
#define DoC_ECCSyndrome2	0x1012
#define DoC_ECCSyndrome3	0x1013
#define DoC_ECCSyndrome4	0x1014
#define DoC_ECCSyndrome5	0x1015
#define DoC_AliasResolution 	0x101b
#define DoC_ConfigInput		0x101c
#define DoC_ReadPipeInit 	0x101d
#define DoC_WritePipeTerm 	0x101e
#define DoC_LastDataRead 	0x101f
#define DoC_NOP 		0x1020

#define DoC_Mil_CDSN_IO 	0x0800
#define DoC_2k_CDSN_IO 		0x1800

#define DoC_Mplus_NOP			0x1002
#define DoC_Mplus_AliasResolution	0x1004
#define DoC_Mplus_DOCControl		0x1006
#define DoC_Mplus_AccessStatus		0x1008
#define DoC_Mplus_DeviceSelect		0x1008
#define DoC_Mplus_Configuration		0x100a
#define DoC_Mplus_OutputControl		0x100c
#define DoC_Mplus_FlashControl		0x1020
#define DoC_Mplus_FlashSelect 		0x1022
#define DoC_Mplus_FlashCmd		0x1024
#define DoC_Mplus_FlashAddress		0x1026
#define DoC_Mplus_FlashData0		0x1028
#define DoC_Mplus_FlashData1		0x1029
#define DoC_Mplus_ReadPipeInit		0x102a
#define DoC_Mplus_LastDataRead		0x102c
#define DoC_Mplus_LastDataRead1		0x102d
#define DoC_Mplus_WritePipeTerm 	0x102e
#define DoC_Mplus_ECCSyndrome0		0x1040
#define DoC_Mplus_ECCSyndrome1		0x1041
#define DoC_Mplus_ECCSyndrome2		0x1042
#define DoC_Mplus_ECCSyndrome3		0x1043
#define DoC_Mplus_ECCSyndrome4		0x1044
#define DoC_Mplus_ECCSyndrome5		0x1045
#define DoC_Mplus_ECCConf 		0x1046
#define DoC_Mplus_Toggle		0x1046
#define DoC_Mplus_DownloadStatus	0x1074
#define DoC_Mplus_CtrlConfirm		0x1076
#define DoC_Mplus_Power			0x1fff

/* How to access the device?
 * On ARM, it'll be mmap'd directly with 32-bit wide accesses.
 * On PPC, it's mmap'd and 16-bit wide.
 * Others use readb/writeb
 */
#if defined(__arm__)
static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg)
{
	return __raw_readl(addr + reg);
}
static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg)
{
	__raw_writel(data, addr + reg);
	wmb();
}
#define DOC_IOREMAP_LEN 0x8000
#elif defined(__ppc__)
static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg)
{
	return __raw_readw(addr + reg);
}
static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg)
{
	__raw_writew(data, addr + reg);
	wmb();
}
#define DOC_IOREMAP_LEN 0x4000
#else
#define ReadDOC_(adr, reg)      readb((void __iomem *)(adr) + (reg))
#define WriteDOC_(d, adr, reg)  writeb(d, (void __iomem *)(adr) + (reg))
#define DOC_IOREMAP_LEN 0x2000

#endif

#if defined(__i386__) || defined(__x86_64__)
#define USE_MEMCPY
#endif

/* These are provided to directly use the DoC_xxx defines */
#define ReadDOC(adr, reg)      ReadDOC_(adr,DoC_##reg)
#define WriteDOC(d, adr, reg)  WriteDOC_(d,adr,DoC_##reg)

#define DOC_MODE_RESET 		0
#define DOC_MODE_NORMAL 	1
#define DOC_MODE_RESERVED1 	2
#define DOC_MODE_RESERVED2 	3

#define DOC_MODE_CLR_ERR 	0x80
#define	DOC_MODE_RST_LAT	0x10
#define	DOC_MODE_BDECT		0x08
#define DOC_MODE_MDWREN 	0x04

#define DOC_ChipID_Doc2k 	0x20
#define DOC_ChipID_Doc2kTSOP 	0x21	/* internal number for MTD */
#define DOC_ChipID_DocMil 	0x30
#define DOC_ChipID_DocMilPlus32	0x40
#define DOC_ChipID_DocMilPlus16	0x41

#define CDSN_CTRL_FR_B 		0x80
#define CDSN_CTRL_FR_B0		0x40
#define CDSN_CTRL_FR_B1		0x80

#define CDSN_CTRL_ECC_IO 	0x20
#define CDSN_CTRL_FLASH_IO 	0x10
#define CDSN_CTRL_WP 		0x08
#define CDSN_CTRL_ALE 		0x04
#define CDSN_CTRL_CLE 		0x02
#define CDSN_CTRL_CE 		0x01

#define DOC_ECC_RESET 		0
#define DOC_ECC_ERROR 		0x80
#define DOC_ECC_RW 		0x20
#define DOC_ECC__EN 		0x08
#define DOC_TOGGLE_BIT 		0x04
#define DOC_ECC_RESV 		0x02
#define DOC_ECC_IGNORE		0x01

#define DOC_FLASH_CE		0x80
#define DOC_FLASH_WP		0x40
#define DOC_FLASH_BANK		0x02

/* We have to also set the reserved bit 1 for enable */
#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV)
#define DOC_ECC_DIS (DOC_ECC_RESV)

struct Nand {
	char floor, chip;
	unsigned long curadr;
	unsigned char curmode;
	/* Also some erase/write/pipeline info when we get that far */
};

#define MAX_FLOORS 4
#define MAX_CHIPS 4

#define MAX_FLOORS_MIL 1
#define MAX_CHIPS_MIL 1

#define MAX_FLOORS_MPLUS 2
#define MAX_CHIPS_MPLUS 1

#define ADDR_COLUMN 1
#define ADDR_PAGE 2
#define ADDR_COLUMN_PAGE 3

struct DiskOnChip {
	unsigned long physadr;
	void __iomem *virtadr;
	unsigned long totlen;
	unsigned char ChipID; /* Type of DiskOnChip */
	int ioreg;

	unsigned long mfr; /* Flash IDs - only one type of flash per device */
	unsigned long id;
	int chipshift;
	char page256;
	char pageadrlen;
	char interleave; /* Internal interleaving - Millennium Plus style */
	unsigned long erasesize;

	int curfloor;
	int curchip;

	int numchips;
	struct Nand *chips;
	struct mtd_info *nextdoc;
	struct mutex lock;
};

int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);

#endif /* __MTD_DOC2000_H__ */
Commit	Line	Data
61ecfa87	1	/*
1da177e4 LT	2	* Linux driver for Disk-On-Chip devices
1da177e4 LT	3	*
a1452a37 DW	4	* Copyright © 1999 Machine Vision Holdings, Inc.
	5	* Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org>
	6	* Copyright © 2002-2003 Greg Ungerer <gerg@snapgear.com>
	7	* Copyright © 2002-2003 SnapGear Inc
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
1da177e4	22	*
1da177e4 LT	23	*/
	24
	25	#ifndef __MTD_DOC2000_H__
	26	#define __MTD_DOC2000_H__
	27
	28	#include <linux/mtd/mtd.h>
48b19268	29	#include <linux/mutex.h>
1da177e4 LT	30
	31	#define DoC_Sig1 0
	32	#define DoC_Sig2 1
	33
	34	#define DoC_ChipID 0x1000
	35	#define DoC_DOCStatus 0x1001
	36	#define DoC_DOCControl 0x1002
	37	#define DoC_FloorSelect 0x1003
	38	#define DoC_CDSNControl 0x1004
	39	#define DoC_CDSNDeviceSelect 0x1005
	40	#define DoC_ECCConf 0x1006
	41	#define DoC_2k_ECCStatus 0x1007
	42
	43	#define DoC_CDSNSlowIO 0x100d
	44	#define DoC_ECCSyndrome0 0x1010
	45	#define DoC_ECCSyndrome1 0x1011
	46	#define DoC_ECCSyndrome2 0x1012
	47	#define DoC_ECCSyndrome3 0x1013
	48	#define DoC_ECCSyndrome4 0x1014
	49	#define DoC_ECCSyndrome5 0x1015
	50	#define DoC_AliasResolution 0x101b
	51	#define DoC_ConfigInput 0x101c
	52	#define DoC_ReadPipeInit 0x101d
	53	#define DoC_WritePipeTerm 0x101e
	54	#define DoC_LastDataRead 0x101f
	55	#define DoC_NOP 0x1020
	56
	57	#define DoC_Mil_CDSN_IO 0x0800
	58	#define DoC_2k_CDSN_IO 0x1800
	59
	60	#define DoC_Mplus_NOP 0x1002
	61	#define DoC_Mplus_AliasResolution 0x1004
	62	#define DoC_Mplus_DOCControl 0x1006
	63	#define DoC_Mplus_AccessStatus 0x1008
	64	#define DoC_Mplus_DeviceSelect 0x1008
	65	#define DoC_Mplus_Configuration 0x100a
	66	#define DoC_Mplus_OutputControl 0x100c
	67	#define DoC_Mplus_FlashControl 0x1020
	68	#define DoC_Mplus_FlashSelect 0x1022
	69	#define DoC_Mplus_FlashCmd 0x1024
	70	#define DoC_Mplus_FlashAddress 0x1026
	71	#define DoC_Mplus_FlashData0 0x1028
	72	#define DoC_Mplus_FlashData1 0x1029
	73	#define DoC_Mplus_ReadPipeInit 0x102a
	74	#define DoC_Mplus_LastDataRead 0x102c
	75	#define DoC_Mplus_LastDataRead1 0x102d
	76	#define DoC_Mplus_WritePipeTerm 0x102e
	77	#define DoC_Mplus_ECCSyndrome0 0x1040
	78	#define DoC_Mplus_ECCSyndrome1 0x1041
	79	#define DoC_Mplus_ECCSyndrome2 0x1042
	80	#define DoC_Mplus_ECCSyndrome3 0x1043
	81	#define DoC_Mplus_ECCSyndrome4 0x1044
	82	#define DoC_Mplus_ECCSyndrome5 0x1045
	83	#define DoC_Mplus_ECCConf 0x1046
	84	#define DoC_Mplus_Toggle 0x1046
	85	#define DoC_Mplus_DownloadStatus 0x1074
	86	#define DoC_Mplus_CtrlConfirm 0x1076
	87	#define DoC_Mplus_Power 0x1fff
	88
61ecfa87 TG	89	/* How to access the device?
61ecfa87 TG	90	* On ARM, it'll be mmap'd directly with 32-bit wide accesses.
1da177e4	91	* On PPC, it's mmap'd and 16-bit wide.
61ecfa87	92	* Others use readb/writeb
1da177e4 LT	93	*/
1da177e4 LT	94	#if defined(__arm__)
d611d41b AB	95	static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg)
	96	{
	97	return __raw_readl(addr + reg);
	98	}
	99	static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg)
	100	{
	101	__raw_writel(data, addr + reg);
	102	wmb();
	103	}
1da177e4 LT	104	#define DOC_IOREMAP_LEN 0x8000
1da177e4 LT	105	#elif defined(__ppc__)
d611d41b AB	106	static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg)
	107	{
	108	return __raw_readw(addr + reg);
	109	}
	110	static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg)
	111	{
	112	__raw_writew(data, addr + reg);
	113	wmb();
	114	}
1da177e4 LT	115	#define DOC_IOREMAP_LEN 0x4000
	116	#else
	117	#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg))
	118	#define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg))
	119	#define DOC_IOREMAP_LEN 0x2000
	120
	121	#endif
	122
	123	#if defined(__i386__) \|\| defined(__x86_64__)
	124	#define USE_MEMCPY
	125	#endif
	126
	127	/* These are provided to directly use the DoC_xxx defines */
	128	#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg)
	129	#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg)
	130
	131	#define DOC_MODE_RESET 0
	132	#define DOC_MODE_NORMAL 1
	133	#define DOC_MODE_RESERVED1 2
	134	#define DOC_MODE_RESERVED2 3
	135
	136	#define DOC_MODE_CLR_ERR 0x80
	137	#define DOC_MODE_RST_LAT 0x10
	138	#define DOC_MODE_BDECT 0x08
	139	#define DOC_MODE_MDWREN 0x04
	140
	141	#define DOC_ChipID_Doc2k 0x20
	142	#define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */
	143	#define DOC_ChipID_DocMil 0x30
	144	#define DOC_ChipID_DocMilPlus32 0x40
	145	#define DOC_ChipID_DocMilPlus16 0x41
	146
	147	#define CDSN_CTRL_FR_B 0x80
	148	#define CDSN_CTRL_FR_B0 0x40
	149	#define CDSN_CTRL_FR_B1 0x80
	150
	151	#define CDSN_CTRL_ECC_IO 0x20
	152	#define CDSN_CTRL_FLASH_IO 0x10
	153	#define CDSN_CTRL_WP 0x08
	154	#define CDSN_CTRL_ALE 0x04
	155	#define CDSN_CTRL_CLE 0x02
	156	#define CDSN_CTRL_CE 0x01
	157
	158	#define DOC_ECC_RESET 0
	159	#define DOC_ECC_ERROR 0x80
	160	#define DOC_ECC_RW 0x20
	161	#define DOC_ECC__EN 0x08
	162	#define DOC_TOGGLE_BIT 0x04
	163	#define DOC_ECC_RESV 0x02
	164	#define DOC_ECC_IGNORE 0x01
	165
	166	#define DOC_FLASH_CE 0x80
	167	#define DOC_FLASH_WP 0x40
	168	#define DOC_FLASH_BANK 0x02
	169
	170	/* We have to also set the reserved bit 1 for enable */
	171	#define DOC_ECC_EN (DOC_ECC__EN \| DOC_ECC_RESV)
	172	#define DOC_ECC_DIS (DOC_ECC_RESV)
	173
	174	struct Nand {
	175	char floor, chip;
	176	unsigned long curadr;
	177	unsigned char curmode;
	178	/* Also some erase/write/pipeline info when we get that far */
179	};
180
181	#define MAX_FLOORS 4
182	#define MAX_CHIPS 4
183
184	#define MAX_FLOORS_MIL 1
185	#define MAX_CHIPS_MIL 1
186
187	#define MAX_FLOORS_MPLUS 2
188	#define MAX_CHIPS_MPLUS 1
189
190	#define ADDR_COLUMN 1
191	#define ADDR_PAGE 2
192	#define ADDR_COLUMN_PAGE 3
193
194	struct DiskOnChip {
195	unsigned long physadr;
196	void __iomem *virtadr;
197	unsigned long totlen;
198	unsigned char ChipID; /* Type of DiskOnChip */
199	int ioreg;
61ecfa87	200
1da177e4 LT	201	unsigned long mfr; /* Flash IDs - only one type of flash per device */
	202	unsigned long id;
	203	int chipshift;
	204	char page256;
	205	char pageadrlen;
	206	char interleave; /* Internal interleaving - Millennium Plus style */
	207	unsigned long erasesize;
61ecfa87	208
1da177e4 LT	209	int curfloor;
1da177e4 LT	210	int curchip;
61ecfa87	211
1da177e4 LT	212	int numchips;
	213	struct Nand *chips;
	214	struct mtd_info *nextdoc;
48b19268	215	struct mutex lock;
1da177e4 LT	216	};
	217
	218	int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);
	219
	220	#endif /* __MTD_DOC2000_H__ */