Commit | Line | Data |
---|---|---|
0793a61d TG |
1 | /* |
2 | * Performance counters: | |
3 | * | |
a308444c IM |
4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra | |
0793a61d TG |
7 | * |
8 | * Data type definitions, declarations, prototypes. | |
9 | * | |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d TG |
11 | * |
12 | * For licencing details see kernel-base/COPYING | |
13 | */ | |
14 | #ifndef _LINUX_PERF_COUNTER_H | |
15 | #define _LINUX_PERF_COUNTER_H | |
16 | ||
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
b8e83514 | 34 | |
a308444c | 35 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 36 | }; |
6c594c21 | 37 | |
b8e83514 | 38 | /* |
a308444c IM |
39 | * Generalized performance counter event types, used by the |
40 | * attr.event_id parameter of the sys_perf_counter_open() | |
41 | * syscall: | |
b8e83514 | 42 | */ |
1c432d89 | 43 | enum perf_hw_id { |
9f66a381 | 44 | /* |
b8e83514 | 45 | * Common hardware events, generalized by the kernel: |
9f66a381 | 46 | */ |
f4dbfa8f PZ |
47 | PERF_COUNT_HW_CPU_CYCLES = 0, |
48 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
49 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
50 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
51 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
52 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
53 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
54 | ||
a308444c | 55 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 56 | }; |
e077df4f | 57 | |
8326f44d IM |
58 | /* |
59 | * Generalized hardware cache counters: | |
60 | * | |
8be6e8f3 | 61 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x |
8326f44d IM |
62 | * { read, write, prefetch } x |
63 | * { accesses, misses } | |
64 | */ | |
1c432d89 | 65 | enum perf_hw_cache_id { |
a308444c IM |
66 | PERF_COUNT_HW_CACHE_L1D = 0, |
67 | PERF_COUNT_HW_CACHE_L1I = 1, | |
68 | PERF_COUNT_HW_CACHE_LL = 2, | |
69 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
70 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
71 | PERF_COUNT_HW_CACHE_BPU = 5, | |
72 | ||
73 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
74 | }; |
75 | ||
1c432d89 | 76 | enum perf_hw_cache_op_id { |
a308444c IM |
77 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
78 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
79 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 80 | |
a308444c | 81 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
82 | }; |
83 | ||
1c432d89 PZ |
84 | enum perf_hw_cache_op_result_id { |
85 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
86 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 87 | |
a308444c | 88 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
89 | }; |
90 | ||
b8e83514 PZ |
91 | /* |
92 | * Special "software" counters provided by the kernel, even if the hardware | |
93 | * does not support performance counters. These counters measure various | |
94 | * physical and sw events of the kernel (and allow the profiling of them as | |
95 | * well): | |
96 | */ | |
1c432d89 | 97 | enum perf_sw_ids { |
a308444c IM |
98 | PERF_COUNT_SW_CPU_CLOCK = 0, |
99 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
100 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
101 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
102 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
103 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
104 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
105 | ||
106 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
107 | }; |
108 | ||
8a057d84 | 109 | /* |
0d48696f | 110 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
111 | * in the overflow packets. |
112 | */ | |
b23f3325 | 113 | enum perf_counter_sample_format { |
a308444c IM |
114 | PERF_SAMPLE_IP = 1U << 0, |
115 | PERF_SAMPLE_TID = 1U << 1, | |
116 | PERF_SAMPLE_TIME = 1U << 2, | |
117 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 118 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
119 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
120 | PERF_SAMPLE_ID = 1U << 6, | |
121 | PERF_SAMPLE_CPU = 1U << 7, | |
122 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 123 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 124 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 125 | |
f413cdb8 | 126 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
127 | }; |
128 | ||
53cfbf59 | 129 | /* |
3dab77fb PZ |
130 | * The format of the data returned by read() on a perf counter fd, |
131 | * as specified by attr.read_format: | |
132 | * | |
133 | * struct read_format { | |
134 | * { u64 value; | |
135 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
136 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
137 | * { u64 id; } && PERF_FORMAT_ID | |
138 | * } && !PERF_FORMAT_GROUP | |
139 | * | |
140 | * { u64 nr; | |
141 | * { u64 time_enabled; } && PERF_FORMAT_ENABLED | |
142 | * { u64 time_running; } && PERF_FORMAT_RUNNING | |
143 | * { u64 value; | |
144 | * { u64 id; } && PERF_FORMAT_ID | |
145 | * } cntr[nr]; | |
146 | * } && PERF_FORMAT_GROUP | |
147 | * }; | |
53cfbf59 PM |
148 | */ |
149 | enum perf_counter_read_format { | |
a308444c IM |
150 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
151 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
152 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 153 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 154 | |
3dab77fb | 155 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
156 | }; |
157 | ||
974802ea PZ |
158 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
159 | ||
9f66a381 IM |
160 | /* |
161 | * Hardware event to monitor via a performance monitoring counter: | |
162 | */ | |
0d48696f | 163 | struct perf_counter_attr { |
974802ea | 164 | |
f4a2deb4 | 165 | /* |
a21ca2ca IM |
166 | * Major type: hardware/software/tracepoint/etc. |
167 | */ | |
168 | __u32 type; | |
974802ea PZ |
169 | |
170 | /* | |
171 | * Size of the attr structure, for fwd/bwd compat. | |
172 | */ | |
173 | __u32 size; | |
a21ca2ca IM |
174 | |
175 | /* | |
176 | * Type specific configuration information. | |
f4a2deb4 PZ |
177 | */ |
178 | __u64 config; | |
9f66a381 | 179 | |
60db5e09 | 180 | union { |
b23f3325 PZ |
181 | __u64 sample_period; |
182 | __u64 sample_freq; | |
60db5e09 PZ |
183 | }; |
184 | ||
b23f3325 PZ |
185 | __u64 sample_type; |
186 | __u64 read_format; | |
9f66a381 | 187 | |
2743a5b0 | 188 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
189 | inherit : 1, /* children inherit it */ |
190 | pinned : 1, /* must always be on PMU */ | |
191 | exclusive : 1, /* only group on PMU */ | |
192 | exclude_user : 1, /* don't count user */ | |
193 | exclude_kernel : 1, /* ditto kernel */ | |
194 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 195 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 196 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 197 | comm : 1, /* include comm data */ |
60db5e09 | 198 | freq : 1, /* use freq, not period */ |
bfbd3381 | 199 | inherit_stat : 1, /* per task counts */ |
57e7986e | 200 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 201 | task : 1, /* trace fork/exit */ |
0475f9ea | 202 | |
9f498cc5 | 203 | __reserved_1 : 50; |
2743a5b0 | 204 | |
c457810a | 205 | __u32 wakeup_events; /* wakeup every n events */ |
974802ea | 206 | __u32 __reserved_2; |
9f66a381 | 207 | |
974802ea | 208 | __u64 __reserved_3; |
eab656ae TG |
209 | }; |
210 | ||
d859e29f PM |
211 | /* |
212 | * Ioctls that can be done on a perf counter fd: | |
213 | */ | |
08247e31 PZ |
214 | #define PERF_COUNTER_IOC_ENABLE _IO ('$', 0) |
215 | #define PERF_COUNTER_IOC_DISABLE _IO ('$', 1) | |
216 | #define PERF_COUNTER_IOC_REFRESH _IO ('$', 2) | |
217 | #define PERF_COUNTER_IOC_RESET _IO ('$', 3) | |
218 | #define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64) | |
a4be7c27 | 219 | #define PERF_COUNTER_IOC_SET_OUTPUT _IO ('$', 5) |
3df5edad PZ |
220 | |
221 | enum perf_counter_ioc_flags { | |
222 | PERF_IOC_FLAG_GROUP = 1U << 0, | |
223 | }; | |
d859e29f | 224 | |
37d81828 PM |
225 | /* |
226 | * Structure of the page that can be mapped via mmap | |
227 | */ | |
228 | struct perf_counter_mmap_page { | |
229 | __u32 version; /* version number of this structure */ | |
230 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
231 | |
232 | /* | |
233 | * Bits needed to read the hw counters in user-space. | |
234 | * | |
92f22a38 PZ |
235 | * u32 seq; |
236 | * s64 count; | |
38ff667b | 237 | * |
a2e87d06 PZ |
238 | * do { |
239 | * seq = pc->lock; | |
38ff667b | 240 | * |
a2e87d06 PZ |
241 | * barrier() |
242 | * if (pc->index) { | |
243 | * count = pmc_read(pc->index - 1); | |
244 | * count += pc->offset; | |
245 | * } else | |
246 | * goto regular_read; | |
38ff667b | 247 | * |
a2e87d06 PZ |
248 | * barrier(); |
249 | * } while (pc->lock != seq); | |
38ff667b | 250 | * |
92f22a38 PZ |
251 | * NOTE: for obvious reason this only works on self-monitoring |
252 | * processes. | |
38ff667b | 253 | */ |
37d81828 PM |
254 | __u32 lock; /* seqlock for synchronization */ |
255 | __u32 index; /* hardware counter identifier */ | |
256 | __s64 offset; /* add to hardware counter value */ | |
7f8b4e4e PZ |
257 | __u64 time_enabled; /* time counter active */ |
258 | __u64 time_running; /* time counter on cpu */ | |
7b732a75 | 259 | |
41f95331 PZ |
260 | /* |
261 | * Hole for extension of the self monitor capabilities | |
262 | */ | |
263 | ||
7f8b4e4e | 264 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 265 | |
38ff667b PZ |
266 | /* |
267 | * Control data for the mmap() data buffer. | |
268 | * | |
43a21ea8 PZ |
269 | * User-space reading the @data_head value should issue an rmb(), on |
270 | * SMP capable platforms, after reading this value -- see | |
271 | * perf_counter_wakeup(). | |
272 | * | |
273 | * When the mapping is PROT_WRITE the @data_tail value should be | |
274 | * written by userspace to reflect the last read data. In this case | |
275 | * the kernel will not over-write unread data. | |
38ff667b | 276 | */ |
8e3747c1 | 277 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 278 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
279 | }; |
280 | ||
a308444c IM |
281 | #define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0) |
282 | #define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0) | |
283 | #define PERF_EVENT_MISC_KERNEL (1 << 0) | |
284 | #define PERF_EVENT_MISC_USER (2 << 0) | |
285 | #define PERF_EVENT_MISC_HYPERVISOR (3 << 0) | |
6fab0192 | 286 | |
5c148194 PZ |
287 | struct perf_event_header { |
288 | __u32 type; | |
6fab0192 PZ |
289 | __u16 misc; |
290 | __u16 size; | |
5c148194 PZ |
291 | }; |
292 | ||
293 | enum perf_event_type { | |
5ed00415 | 294 | |
0c593b34 PZ |
295 | /* |
296 | * The MMAP events record the PROT_EXEC mappings so that we can | |
297 | * correlate userspace IPs to code. They have the following structure: | |
298 | * | |
299 | * struct { | |
0127c3ea | 300 | * struct perf_event_header header; |
0c593b34 | 301 | * |
0127c3ea IM |
302 | * u32 pid, tid; |
303 | * u64 addr; | |
304 | * u64 len; | |
305 | * u64 pgoff; | |
306 | * char filename[]; | |
0c593b34 PZ |
307 | * }; |
308 | */ | |
8a057d84 | 309 | PERF_EVENT_MMAP = 1, |
0a4a9391 | 310 | |
43a21ea8 PZ |
311 | /* |
312 | * struct { | |
313 | * struct perf_event_header header; | |
314 | * u64 id; | |
315 | * u64 lost; | |
316 | * }; | |
317 | */ | |
318 | PERF_EVENT_LOST = 2, | |
319 | ||
8d1b2d93 PZ |
320 | /* |
321 | * struct { | |
0127c3ea | 322 | * struct perf_event_header header; |
8d1b2d93 | 323 | * |
0127c3ea IM |
324 | * u32 pid, tid; |
325 | * char comm[]; | |
8d1b2d93 PZ |
326 | * }; |
327 | */ | |
328 | PERF_EVENT_COMM = 3, | |
329 | ||
9f498cc5 PZ |
330 | /* |
331 | * struct { | |
332 | * struct perf_event_header header; | |
333 | * u32 pid, ppid; | |
334 | * u32 tid, ptid; | |
335 | * }; | |
336 | */ | |
337 | PERF_EVENT_EXIT = 4, | |
338 | ||
26b119bc PZ |
339 | /* |
340 | * struct { | |
0127c3ea IM |
341 | * struct perf_event_header header; |
342 | * u64 time; | |
689802b2 | 343 | * u64 id; |
7f453c24 | 344 | * u64 stream_id; |
a78ac325 PZ |
345 | * }; |
346 | */ | |
347 | PERF_EVENT_THROTTLE = 5, | |
348 | PERF_EVENT_UNTHROTTLE = 6, | |
349 | ||
60313ebe PZ |
350 | /* |
351 | * struct { | |
a21ca2ca IM |
352 | * struct perf_event_header header; |
353 | * u32 pid, ppid; | |
9f498cc5 | 354 | * u32 tid, ptid; |
60313ebe PZ |
355 | * }; |
356 | */ | |
357 | PERF_EVENT_FORK = 7, | |
358 | ||
38b200d6 PZ |
359 | /* |
360 | * struct { | |
361 | * struct perf_event_header header; | |
362 | * u32 pid, tid; | |
3dab77fb PZ |
363 | * |
364 | * struct read_format values; | |
38b200d6 PZ |
365 | * }; |
366 | */ | |
367 | PERF_EVENT_READ = 8, | |
368 | ||
8a057d84 | 369 | /* |
0c593b34 | 370 | * struct { |
0127c3ea | 371 | * struct perf_event_header header; |
0c593b34 | 372 | * |
43a21ea8 PZ |
373 | * { u64 ip; } && PERF_SAMPLE_IP |
374 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
375 | * { u64 time; } && PERF_SAMPLE_TIME | |
376 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 377 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 378 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 379 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
e6e18ec7 | 380 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 381 | * |
3dab77fb | 382 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 383 | * |
f9188e02 | 384 | * { u64 nr, |
43a21ea8 | 385 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb PZ |
386 | * |
387 | * # | |
388 | * # The RAW record below is opaque data wrt the ABI | |
389 | * # | |
390 | * # That is, the ABI doesn't make any promises wrt to | |
391 | * # the stability of its content, it may vary depending | |
392 | * # on event, hardware, kernel version and phase of | |
393 | * # the moon. | |
394 | * # | |
395 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
396 | * # | |
397 | * | |
a044560c PZ |
398 | * { u32 size; |
399 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 400 | * }; |
8a057d84 | 401 | */ |
e6e18ec7 PZ |
402 | PERF_EVENT_SAMPLE = 9, |
403 | ||
404 | PERF_EVENT_MAX, /* non-ABI */ | |
5c148194 PZ |
405 | }; |
406 | ||
f9188e02 PZ |
407 | enum perf_callchain_context { |
408 | PERF_CONTEXT_HV = (__u64)-32, | |
409 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
410 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 411 | |
f9188e02 PZ |
412 | PERF_CONTEXT_GUEST = (__u64)-2048, |
413 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
414 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
415 | ||
416 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
417 | }; |
418 | ||
a4be7c27 PZ |
419 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
420 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
421 | ||
f3dfd265 | 422 | #ifdef __KERNEL__ |
9f66a381 | 423 | /* |
f3dfd265 | 424 | * Kernel-internal data types and definitions: |
9f66a381 IM |
425 | */ |
426 | ||
f3dfd265 PM |
427 | #ifdef CONFIG_PERF_COUNTERS |
428 | # include <asm/perf_counter.h> | |
429 | #endif | |
430 | ||
431 | #include <linux/list.h> | |
432 | #include <linux/mutex.h> | |
433 | #include <linux/rculist.h> | |
434 | #include <linux/rcupdate.h> | |
435 | #include <linux/spinlock.h> | |
d6d020e9 | 436 | #include <linux/hrtimer.h> |
3c446b3d | 437 | #include <linux/fs.h> |
709e50cf | 438 | #include <linux/pid_namespace.h> |
f3dfd265 PM |
439 | #include <asm/atomic.h> |
440 | ||
f9188e02 PZ |
441 | #define PERF_MAX_STACK_DEPTH 255 |
442 | ||
443 | struct perf_callchain_entry { | |
444 | __u64 nr; | |
445 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
446 | }; | |
447 | ||
3a43ce68 FW |
448 | struct perf_raw_record { |
449 | u32 size; | |
450 | void *data; | |
f413cdb8 FW |
451 | }; |
452 | ||
f3dfd265 PM |
453 | struct task_struct; |
454 | ||
0793a61d | 455 | /** |
9f66a381 | 456 | * struct hw_perf_counter - performance counter hardware details: |
0793a61d TG |
457 | */ |
458 | struct hw_perf_counter { | |
ee06094f | 459 | #ifdef CONFIG_PERF_COUNTERS |
d6d020e9 PZ |
460 | union { |
461 | struct { /* hardware */ | |
a308444c IM |
462 | u64 config; |
463 | unsigned long config_base; | |
464 | unsigned long counter_base; | |
465 | int idx; | |
d6d020e9 PZ |
466 | }; |
467 | union { /* software */ | |
a308444c IM |
468 | atomic64_t count; |
469 | struct hrtimer hrtimer; | |
d6d020e9 PZ |
470 | }; |
471 | }; | |
ee06094f | 472 | atomic64_t prev_count; |
b23f3325 | 473 | u64 sample_period; |
9e350de3 | 474 | u64 last_period; |
ee06094f | 475 | atomic64_t period_left; |
60db5e09 | 476 | u64 interrupts; |
6a24ed6c PZ |
477 | |
478 | u64 freq_count; | |
479 | u64 freq_interrupts; | |
bd2b5b12 | 480 | u64 freq_stamp; |
ee06094f | 481 | #endif |
0793a61d TG |
482 | }; |
483 | ||
621a01ea IM |
484 | struct perf_counter; |
485 | ||
486 | /** | |
4aeb0b42 | 487 | * struct pmu - generic performance monitoring unit |
621a01ea | 488 | */ |
4aeb0b42 | 489 | struct pmu { |
95cdd2e7 | 490 | int (*enable) (struct perf_counter *counter); |
7671581f IM |
491 | void (*disable) (struct perf_counter *counter); |
492 | void (*read) (struct perf_counter *counter); | |
a78ac325 | 493 | void (*unthrottle) (struct perf_counter *counter); |
621a01ea IM |
494 | }; |
495 | ||
6a930700 IM |
496 | /** |
497 | * enum perf_counter_active_state - the states of a counter | |
498 | */ | |
499 | enum perf_counter_active_state { | |
3b6f9e5c | 500 | PERF_COUNTER_STATE_ERROR = -2, |
6a930700 IM |
501 | PERF_COUNTER_STATE_OFF = -1, |
502 | PERF_COUNTER_STATE_INACTIVE = 0, | |
503 | PERF_COUNTER_STATE_ACTIVE = 1, | |
504 | }; | |
505 | ||
9b51f66d IM |
506 | struct file; |
507 | ||
7b732a75 PZ |
508 | struct perf_mmap_data { |
509 | struct rcu_head rcu_head; | |
8740f941 | 510 | int nr_pages; /* nr of data pages */ |
43a21ea8 | 511 | int writable; /* are we writable */ |
c5078f78 | 512 | int nr_locked; /* nr pages mlocked */ |
8740f941 | 513 | |
c33a0bc4 | 514 | atomic_t poll; /* POLL_ for wakeups */ |
8740f941 PZ |
515 | atomic_t events; /* event limit */ |
516 | ||
8e3747c1 PZ |
517 | atomic_long_t head; /* write position */ |
518 | atomic_long_t done_head; /* completed head */ | |
519 | ||
c33a0bc4 | 520 | atomic_t lock; /* concurrent writes */ |
c66de4a5 | 521 | atomic_t wakeup; /* needs a wakeup */ |
43a21ea8 | 522 | atomic_t lost; /* nr records lost */ |
c66de4a5 | 523 | |
7b732a75 | 524 | struct perf_counter_mmap_page *user_page; |
0127c3ea | 525 | void *data_pages[0]; |
7b732a75 PZ |
526 | }; |
527 | ||
671dec5d PZ |
528 | struct perf_pending_entry { |
529 | struct perf_pending_entry *next; | |
530 | void (*func)(struct perf_pending_entry *); | |
925d519a PZ |
531 | }; |
532 | ||
0793a61d TG |
533 | /** |
534 | * struct perf_counter - performance counter kernel representation: | |
535 | */ | |
536 | struct perf_counter { | |
ee06094f | 537 | #ifdef CONFIG_PERF_COUNTERS |
04289bb9 | 538 | struct list_head list_entry; |
592903cd | 539 | struct list_head event_entry; |
04289bb9 | 540 | struct list_head sibling_list; |
0127c3ea | 541 | int nr_siblings; |
04289bb9 | 542 | struct perf_counter *group_leader; |
a4be7c27 | 543 | struct perf_counter *output; |
4aeb0b42 | 544 | const struct pmu *pmu; |
04289bb9 | 545 | |
6a930700 | 546 | enum perf_counter_active_state state; |
0793a61d | 547 | atomic64_t count; |
ee06094f | 548 | |
53cfbf59 PM |
549 | /* |
550 | * These are the total time in nanoseconds that the counter | |
551 | * has been enabled (i.e. eligible to run, and the task has | |
552 | * been scheduled in, if this is a per-task counter) | |
553 | * and running (scheduled onto the CPU), respectively. | |
554 | * | |
555 | * They are computed from tstamp_enabled, tstamp_running and | |
556 | * tstamp_stopped when the counter is in INACTIVE or ACTIVE state. | |
557 | */ | |
558 | u64 total_time_enabled; | |
559 | u64 total_time_running; | |
560 | ||
561 | /* | |
562 | * These are timestamps used for computing total_time_enabled | |
563 | * and total_time_running when the counter is in INACTIVE or | |
564 | * ACTIVE state, measured in nanoseconds from an arbitrary point | |
565 | * in time. | |
566 | * tstamp_enabled: the notional time when the counter was enabled | |
567 | * tstamp_running: the notional time when the counter was scheduled on | |
568 | * tstamp_stopped: in INACTIVE state, the notional time when the | |
569 | * counter was scheduled off. | |
570 | */ | |
571 | u64 tstamp_enabled; | |
572 | u64 tstamp_running; | |
573 | u64 tstamp_stopped; | |
574 | ||
0d48696f | 575 | struct perf_counter_attr attr; |
0793a61d TG |
576 | struct hw_perf_counter hw; |
577 | ||
578 | struct perf_counter_context *ctx; | |
9b51f66d | 579 | struct file *filp; |
0793a61d | 580 | |
53cfbf59 PM |
581 | /* |
582 | * These accumulate total time (in nanoseconds) that children | |
583 | * counters have been enabled and running, respectively. | |
584 | */ | |
585 | atomic64_t child_total_time_enabled; | |
586 | atomic64_t child_total_time_running; | |
587 | ||
0793a61d | 588 | /* |
d859e29f | 589 | * Protect attach/detach and child_list: |
0793a61d | 590 | */ |
fccc714b PZ |
591 | struct mutex child_mutex; |
592 | struct list_head child_list; | |
593 | struct perf_counter *parent; | |
0793a61d TG |
594 | |
595 | int oncpu; | |
596 | int cpu; | |
597 | ||
082ff5a2 PZ |
598 | struct list_head owner_entry; |
599 | struct task_struct *owner; | |
600 | ||
7b732a75 PZ |
601 | /* mmap bits */ |
602 | struct mutex mmap_mutex; | |
603 | atomic_t mmap_count; | |
604 | struct perf_mmap_data *data; | |
37d81828 | 605 | |
7b732a75 | 606 | /* poll related */ |
0793a61d | 607 | wait_queue_head_t waitq; |
3c446b3d | 608 | struct fasync_struct *fasync; |
79f14641 PZ |
609 | |
610 | /* delayed work for NMIs and such */ | |
611 | int pending_wakeup; | |
4c9e2542 | 612 | int pending_kill; |
79f14641 | 613 | int pending_disable; |
671dec5d | 614 | struct perf_pending_entry pending; |
592903cd | 615 | |
79f14641 PZ |
616 | atomic_t event_limit; |
617 | ||
e077df4f | 618 | void (*destroy)(struct perf_counter *); |
592903cd | 619 | struct rcu_head rcu_head; |
709e50cf PZ |
620 | |
621 | struct pid_namespace *ns; | |
8e5799b1 | 622 | u64 id; |
ee06094f | 623 | #endif |
0793a61d TG |
624 | }; |
625 | ||
626 | /** | |
627 | * struct perf_counter_context - counter context structure | |
628 | * | |
629 | * Used as a container for task counters and CPU counters as well: | |
630 | */ | |
631 | struct perf_counter_context { | |
0793a61d | 632 | /* |
d859e29f PM |
633 | * Protect the states of the counters in the list, |
634 | * nr_active, and the list: | |
0793a61d | 635 | */ |
a308444c | 636 | spinlock_t lock; |
d859e29f PM |
637 | /* |
638 | * Protect the list of counters. Locking either mutex or lock | |
639 | * is sufficient to ensure the list doesn't change; to change | |
640 | * the list you need to lock both the mutex and the spinlock. | |
641 | */ | |
a308444c | 642 | struct mutex mutex; |
04289bb9 | 643 | |
a308444c IM |
644 | struct list_head counter_list; |
645 | struct list_head event_list; | |
646 | int nr_counters; | |
647 | int nr_active; | |
648 | int is_active; | |
bfbd3381 | 649 | int nr_stat; |
a308444c IM |
650 | atomic_t refcount; |
651 | struct task_struct *task; | |
53cfbf59 PM |
652 | |
653 | /* | |
4af4998b | 654 | * Context clock, runs when context enabled. |
53cfbf59 | 655 | */ |
a308444c IM |
656 | u64 time; |
657 | u64 timestamp; | |
564c2b21 PM |
658 | |
659 | /* | |
660 | * These fields let us detect when two contexts have both | |
661 | * been cloned (inherited) from a common ancestor. | |
662 | */ | |
a308444c IM |
663 | struct perf_counter_context *parent_ctx; |
664 | u64 parent_gen; | |
665 | u64 generation; | |
666 | int pin_count; | |
667 | struct rcu_head rcu_head; | |
0793a61d TG |
668 | }; |
669 | ||
670 | /** | |
671 | * struct perf_counter_cpu_context - per cpu counter context structure | |
672 | */ | |
673 | struct perf_cpu_context { | |
674 | struct perf_counter_context ctx; | |
675 | struct perf_counter_context *task_ctx; | |
676 | int active_oncpu; | |
677 | int max_pertask; | |
3b6f9e5c | 678 | int exclusive; |
96f6d444 PZ |
679 | |
680 | /* | |
681 | * Recursion avoidance: | |
682 | * | |
683 | * task, softirq, irq, nmi context | |
684 | */ | |
22a4f650 | 685 | int recursion[4]; |
0793a61d TG |
686 | }; |
687 | ||
829b42dd RR |
688 | #ifdef CONFIG_PERF_COUNTERS |
689 | ||
0793a61d TG |
690 | /* |
691 | * Set by architecture code: | |
692 | */ | |
693 | extern int perf_max_counters; | |
694 | ||
4aeb0b42 | 695 | extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter); |
621a01ea | 696 | |
0793a61d | 697 | extern void perf_counter_task_sched_in(struct task_struct *task, int cpu); |
564c2b21 PM |
698 | extern void perf_counter_task_sched_out(struct task_struct *task, |
699 | struct task_struct *next, int cpu); | |
0793a61d | 700 | extern void perf_counter_task_tick(struct task_struct *task, int cpu); |
6ab423e0 | 701 | extern int perf_counter_init_task(struct task_struct *child); |
9b51f66d | 702 | extern void perf_counter_exit_task(struct task_struct *child); |
bbbee908 | 703 | extern void perf_counter_free_task(struct task_struct *task); |
9974458e | 704 | extern void set_perf_counter_pending(void); |
925d519a | 705 | extern void perf_counter_do_pending(void); |
0793a61d | 706 | extern void perf_counter_print_debug(void); |
9e35ad38 PZ |
707 | extern void __perf_disable(void); |
708 | extern bool __perf_enable(void); | |
709 | extern void perf_disable(void); | |
710 | extern void perf_enable(void); | |
1d1c7ddb IM |
711 | extern int perf_counter_task_disable(void); |
712 | extern int perf_counter_task_enable(void); | |
3cbed429 PM |
713 | extern int hw_perf_group_sched_in(struct perf_counter *group_leader, |
714 | struct perf_cpu_context *cpuctx, | |
715 | struct perf_counter_context *ctx, int cpu); | |
37d81828 | 716 | extern void perf_counter_update_userpage(struct perf_counter *counter); |
5c92d124 | 717 | |
df1a132b | 718 | struct perf_sample_data { |
a308444c IM |
719 | struct pt_regs *regs; |
720 | u64 addr; | |
721 | u64 period; | |
3a43ce68 | 722 | struct perf_raw_record *raw; |
df1a132b PZ |
723 | }; |
724 | ||
725 | extern int perf_counter_overflow(struct perf_counter *counter, int nmi, | |
726 | struct perf_sample_data *data); | |
28402971 IM |
727 | extern void perf_counter_output(struct perf_counter *counter, int nmi, |
728 | struct perf_sample_data *data); | |
df1a132b | 729 | |
3b6f9e5c PM |
730 | /* |
731 | * Return 1 for a software counter, 0 for a hardware counter | |
732 | */ | |
733 | static inline int is_software_counter(struct perf_counter *counter) | |
734 | { | |
a21ca2ca | 735 | return (counter->attr.type != PERF_TYPE_RAW) && |
f1a3c979 PZ |
736 | (counter->attr.type != PERF_TYPE_HARDWARE) && |
737 | (counter->attr.type != PERF_TYPE_HW_CACHE); | |
3b6f9e5c PM |
738 | } |
739 | ||
f29ac756 PZ |
740 | extern atomic_t perf_swcounter_enabled[PERF_COUNT_SW_MAX]; |
741 | ||
742 | extern void __perf_swcounter_event(u32, u64, int, struct pt_regs *, u64); | |
743 | ||
744 | static inline void | |
745 | perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr) | |
746 | { | |
747 | if (atomic_read(&perf_swcounter_enabled[event])) | |
748 | __perf_swcounter_event(event, nr, nmi, regs, addr); | |
749 | } | |
15dbf27c | 750 | |
089dd79d PZ |
751 | extern void __perf_counter_mmap(struct vm_area_struct *vma); |
752 | ||
753 | static inline void perf_counter_mmap(struct vm_area_struct *vma) | |
754 | { | |
755 | if (vma->vm_flags & VM_EXEC) | |
756 | __perf_counter_mmap(vma); | |
757 | } | |
0a4a9391 | 758 | |
8d1b2d93 | 759 | extern void perf_counter_comm(struct task_struct *tsk); |
60313ebe | 760 | extern void perf_counter_fork(struct task_struct *tsk); |
8d1b2d93 | 761 | |
394ee076 PZ |
762 | extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs); |
763 | ||
0764771d | 764 | extern int sysctl_perf_counter_paranoid; |
c5078f78 | 765 | extern int sysctl_perf_counter_mlock; |
df58ab24 | 766 | extern int sysctl_perf_counter_sample_rate; |
1ccd1549 | 767 | |
0d905bca | 768 | extern void perf_counter_init(void); |
f4b5ffcc JB |
769 | extern void perf_tpcounter_event(int event_id, u64 addr, u64 count, |
770 | void *record, int entry_size); | |
0d905bca | 771 | |
9d23a90a PM |
772 | #ifndef perf_misc_flags |
773 | #define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \ | |
774 | PERF_EVENT_MISC_KERNEL) | |
775 | #define perf_instruction_pointer(regs) instruction_pointer(regs) | |
776 | #endif | |
777 | ||
0793a61d TG |
778 | #else |
779 | static inline void | |
780 | perf_counter_task_sched_in(struct task_struct *task, int cpu) { } | |
781 | static inline void | |
910431c7 IM |
782 | perf_counter_task_sched_out(struct task_struct *task, |
783 | struct task_struct *next, int cpu) { } | |
0793a61d TG |
784 | static inline void |
785 | perf_counter_task_tick(struct task_struct *task, int cpu) { } | |
d3e78ee3 | 786 | static inline int perf_counter_init_task(struct task_struct *child) { return 0; } |
9b51f66d | 787 | static inline void perf_counter_exit_task(struct task_struct *child) { } |
bbbee908 | 788 | static inline void perf_counter_free_task(struct task_struct *task) { } |
925d519a | 789 | static inline void perf_counter_do_pending(void) { } |
0793a61d | 790 | static inline void perf_counter_print_debug(void) { } |
9e35ad38 PZ |
791 | static inline void perf_disable(void) { } |
792 | static inline void perf_enable(void) { } | |
1d1c7ddb IM |
793 | static inline int perf_counter_task_disable(void) { return -EINVAL; } |
794 | static inline int perf_counter_task_enable(void) { return -EINVAL; } | |
15dbf27c | 795 | |
925d519a | 796 | static inline void |
78f13e95 PZ |
797 | perf_swcounter_event(u32 event, u64 nr, int nmi, |
798 | struct pt_regs *regs, u64 addr) { } | |
0a4a9391 | 799 | |
089dd79d | 800 | static inline void perf_counter_mmap(struct vm_area_struct *vma) { } |
8d1b2d93 | 801 | static inline void perf_counter_comm(struct task_struct *tsk) { } |
60313ebe | 802 | static inline void perf_counter_fork(struct task_struct *tsk) { } |
0d905bca | 803 | static inline void perf_counter_init(void) { } |
0793a61d TG |
804 | #endif |
805 | ||
f3dfd265 | 806 | #endif /* __KERNEL__ */ |
0793a61d | 807 | #endif /* _LINUX_PERF_COUNTER_H */ |