perf_counter: Allow software counters to count while task is not running
[deliverable/linux.git] / include / linux / perf_counter.h
CommitLineData
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1/*
2 * Performance counters:
3 *
4 * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
6 *
7 * Data type definitions, declarations, prototypes.
8 *
9 * Started by: Thomas Gleixner and Ingo Molnar
10 *
11 * For licencing details see kernel-base/COPYING
12 */
13#ifndef _LINUX_PERF_COUNTER_H
14#define _LINUX_PERF_COUNTER_H
15
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16#include <linux/types.h>
17#include <linux/ioctl.h>
9aaa131a 18#include <asm/byteorder.h>
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19
20/*
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21 * User-space ABI bits:
22 */
23
24/*
b8e83514 25 * hw_event.type
0793a61d 26 */
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27enum perf_event_types {
28 PERF_TYPE_HARDWARE = 0,
29 PERF_TYPE_SOFTWARE = 1,
30 PERF_TYPE_TRACEPOINT = 2,
31
0793a61d 32 /*
b8e83514 33 * available TYPE space, raw is the max value.
0793a61d 34 */
9f66a381 35
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36 PERF_TYPE_RAW = 128,
37};
6c594c21 38
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39/*
40 * Generalized performance counter event types, used by the hw_event.event_id
41 * parameter of the sys_perf_counter_open() syscall:
42 */
43enum hw_event_ids {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_CPU_CYCLES = 0,
48 PERF_COUNT_INSTRUCTIONS = 1,
49 PERF_COUNT_CACHE_REFERENCES = 2,
50 PERF_COUNT_CACHE_MISSES = 3,
51 PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_BRANCH_MISSES = 5,
53 PERF_COUNT_BUS_CYCLES = 6,
54
55 PERF_HW_EVENTS_MAX = 7,
56};
e077df4f 57
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58/*
59 * Special "software" counters provided by the kernel, even if the hardware
60 * does not support performance counters. These counters measure various
61 * physical and sw events of the kernel (and allow the profiling of them as
62 * well):
63 */
64enum sw_event_ids {
65 PERF_COUNT_CPU_CLOCK = 0,
66 PERF_COUNT_TASK_CLOCK = 1,
67 PERF_COUNT_PAGE_FAULTS = 2,
68 PERF_COUNT_CONTEXT_SWITCHES = 3,
69 PERF_COUNT_CPU_MIGRATIONS = 4,
70 PERF_COUNT_PAGE_FAULTS_MIN = 5,
71 PERF_COUNT_PAGE_FAULTS_MAJ = 6,
72
73 PERF_SW_EVENTS_MAX = 7,
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74};
75
0127c3ea 76#define __PERF_COUNTER_MASK(name) \
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77 (((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
78 PERF_COUNTER_##name##_SHIFT)
79
80#define PERF_COUNTER_RAW_BITS 1
81#define PERF_COUNTER_RAW_SHIFT 63
82#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
83
84#define PERF_COUNTER_CONFIG_BITS 63
85#define PERF_COUNTER_CONFIG_SHIFT 0
86#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
87
88#define PERF_COUNTER_TYPE_BITS 7
89#define PERF_COUNTER_TYPE_SHIFT 56
90#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
91
92#define PERF_COUNTER_EVENT_BITS 56
93#define PERF_COUNTER_EVENT_SHIFT 0
94#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
95
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96/*
97 * Bits that can be set in hw_event.record_type to request information
98 * in the overflow packets.
99 */
100enum perf_counter_record_format {
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101 PERF_RECORD_IP = 1U << 0,
102 PERF_RECORD_TID = 1U << 1,
103 PERF_RECORD_TIME = 1U << 2,
104 PERF_RECORD_ADDR = 1U << 3,
105 PERF_RECORD_GROUP = 1U << 4,
106 PERF_RECORD_CALLCHAIN = 1U << 5,
107 PERF_RECORD_CONFIG = 1U << 6,
108 PERF_RECORD_CPU = 1U << 7,
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109};
110
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111/*
112 * Bits that can be set in hw_event.read_format to request that
113 * reads on the counter should return the indicated quantities,
114 * in increasing order of bit value, after the counter value.
115 */
116enum perf_counter_read_format {
117 PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
118 PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
119};
120
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121/*
122 * Hardware event to monitor via a performance monitoring counter:
123 */
124struct perf_counter_hw_event {
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125 /*
126 * The MSB of the config word signifies if the rest contains cpu
127 * specific (raw) counter configuration data, if unset, the next
128 * 7 bits are an event type and the rest of the bits are the event
129 * identifier.
130 */
131 __u64 config;
9f66a381 132
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133 union {
134 __u64 irq_period;
135 __u64 irq_freq;
136 };
137
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138 __u32 record_type;
139 __u32 read_format;
9f66a381 140
2743a5b0 141 __u64 disabled : 1, /* off by default */
0475f9ea 142 nmi : 1, /* NMI sampling */
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143 inherit : 1, /* children inherit it */
144 pinned : 1, /* must always be on PMU */
145 exclusive : 1, /* only group on PMU */
146 exclude_user : 1, /* don't count user */
147 exclude_kernel : 1, /* ditto kernel */
148 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 149 exclude_idle : 1, /* don't count when idle */
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150 mmap : 1, /* include mmap data */
151 munmap : 1, /* include munmap data */
8d1b2d93 152 comm : 1, /* include comm data */
60db5e09 153 freq : 1, /* use freq, not period */
0475f9ea 154
60db5e09 155 __reserved_1 : 51;
2743a5b0 156
c457810a 157 __u32 wakeup_events; /* wakeup every n events */
e527ea31 158 __u32 __reserved_2;
9f66a381 159
2743a5b0 160 __u64 __reserved_3;
e527ea31 161 __u64 __reserved_4;
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162};
163
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164/*
165 * Ioctls that can be done on a perf counter fd:
166 */
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167#define PERF_COUNTER_IOC_ENABLE _IOW('$', 0, u32)
168#define PERF_COUNTER_IOC_DISABLE _IOW('$', 1, u32)
79f14641 169#define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32)
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170#define PERF_COUNTER_IOC_RESET _IOW('$', 3, u32)
171
172enum perf_counter_ioc_flags {
173 PERF_IOC_FLAG_GROUP = 1U << 0,
174};
d859e29f 175
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176/*
177 * Structure of the page that can be mapped via mmap
178 */
179struct perf_counter_mmap_page {
180 __u32 version; /* version number of this structure */
181 __u32 compat_version; /* lowest version this is compat with */
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182
183 /*
184 * Bits needed to read the hw counters in user-space.
185 *
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186 * u32 seq;
187 * s64 count;
38ff667b 188 *
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189 * do {
190 * seq = pc->lock;
38ff667b 191 *
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192 * barrier()
193 * if (pc->index) {
194 * count = pmc_read(pc->index - 1);
195 * count += pc->offset;
196 * } else
197 * goto regular_read;
38ff667b 198 *
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199 * barrier();
200 * } while (pc->lock != seq);
38ff667b 201 *
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202 * NOTE: for obvious reason this only works on self-monitoring
203 * processes.
38ff667b 204 */
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205 __u32 lock; /* seqlock for synchronization */
206 __u32 index; /* hardware counter identifier */
207 __s64 offset; /* add to hardware counter value */
7b732a75 208
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209 /*
210 * Control data for the mmap() data buffer.
211 *
212 * User-space reading this value should issue an rmb(), on SMP capable
213 * platforms, after reading this value -- see perf_counter_wakeup().
214 */
7b732a75 215 __u32 data_head; /* head in the data section */
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216};
217
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218#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
219#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
6b6e5486 220#define PERF_EVENT_MISC_KERNEL (1 << 0)
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221#define PERF_EVENT_MISC_USER (2 << 0)
222#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6b6e5486 223#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192 224
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225struct perf_event_header {
226 __u32 type;
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227 __u16 misc;
228 __u16 size;
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229};
230
231enum perf_event_type {
5ed00415 232
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233 /*
234 * The MMAP events record the PROT_EXEC mappings so that we can
235 * correlate userspace IPs to code. They have the following structure:
236 *
237 * struct {
0127c3ea 238 * struct perf_event_header header;
0c593b34 239 *
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240 * u32 pid, tid;
241 * u64 addr;
242 * u64 len;
243 * u64 pgoff;
244 * char filename[];
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245 * };
246 */
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247 PERF_EVENT_MMAP = 1,
248 PERF_EVENT_MUNMAP = 2,
0a4a9391 249
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250 /*
251 * struct {
0127c3ea 252 * struct perf_event_header header;
8d1b2d93 253 *
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254 * u32 pid, tid;
255 * char comm[];
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256 * };
257 */
258 PERF_EVENT_COMM = 3,
259
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260 /*
261 * struct {
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262 * struct perf_event_header header;
263 * u64 time;
264 * u64 irq_period;
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265 * };
266 */
267 PERF_EVENT_PERIOD = 4,
268
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269 /*
270 * struct {
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271 * struct perf_event_header header;
272 * u64 time;
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273 * };
274 */
275 PERF_EVENT_THROTTLE = 5,
276 PERF_EVENT_UNTHROTTLE = 6,
277
8a057d84 278 /*
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279 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
280 * will be PERF_RECORD_*
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281 *
282 * struct {
0127c3ea 283 * struct perf_event_header header;
0c593b34 284 *
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285 * { u64 ip; } && PERF_RECORD_IP
286 * { u32 pid, tid; } && PERF_RECORD_TID
287 * { u64 time; } && PERF_RECORD_TIME
288 * { u64 addr; } && PERF_RECORD_ADDR
289 * { u64 config; } && PERF_RECORD_CONFIG
290 * { u32 cpu, res; } && PERF_RECORD_CPU
0c593b34 291 *
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292 * { u64 nr;
293 * { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 294 *
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295 * { u16 nr,
296 * hv,
297 * kernel,
298 * user;
299 * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34 300 * };
8a057d84 301 */
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302};
303
f3dfd265 304#ifdef __KERNEL__
9f66a381 305/*
f3dfd265 306 * Kernel-internal data types and definitions:
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307 */
308
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309#ifdef CONFIG_PERF_COUNTERS
310# include <asm/perf_counter.h>
311#endif
312
313#include <linux/list.h>
314#include <linux/mutex.h>
315#include <linux/rculist.h>
316#include <linux/rcupdate.h>
317#include <linux/spinlock.h>
d6d020e9 318#include <linux/hrtimer.h>
3c446b3d 319#include <linux/fs.h>
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320#include <asm/atomic.h>
321
322struct task_struct;
323
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324static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
325{
326 return hw_event->config & PERF_COUNTER_RAW_MASK;
327}
328
329static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
330{
331 return hw_event->config & PERF_COUNTER_CONFIG_MASK;
332}
333
334static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
335{
336 return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
337 PERF_COUNTER_TYPE_SHIFT;
338}
339
340static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
341{
342 return hw_event->config & PERF_COUNTER_EVENT_MASK;
343}
344
0793a61d 345/**
9f66a381 346 * struct hw_perf_counter - performance counter hardware details:
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347 */
348struct hw_perf_counter {
ee06094f 349#ifdef CONFIG_PERF_COUNTERS
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350 union {
351 struct { /* hardware */
352 u64 config;
353 unsigned long config_base;
354 unsigned long counter_base;
355 int nmi;
6f00cada 356 int idx;
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357 };
358 union { /* software */
359 atomic64_t count;
360 struct hrtimer hrtimer;
361 };
362 };
ee06094f 363 atomic64_t prev_count;
9f66a381 364 u64 irq_period;
ee06094f 365 atomic64_t period_left;
60db5e09 366 u64 interrupts;
ee06094f 367#endif
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368};
369
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370struct perf_counter;
371
372/**
4aeb0b42 373 * struct pmu - generic performance monitoring unit
621a01ea 374 */
4aeb0b42 375struct pmu {
95cdd2e7 376 int (*enable) (struct perf_counter *counter);
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377 void (*disable) (struct perf_counter *counter);
378 void (*read) (struct perf_counter *counter);
a78ac325 379 void (*unthrottle) (struct perf_counter *counter);
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380};
381
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382/**
383 * enum perf_counter_active_state - the states of a counter
384 */
385enum perf_counter_active_state {
3b6f9e5c 386 PERF_COUNTER_STATE_ERROR = -2,
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387 PERF_COUNTER_STATE_OFF = -1,
388 PERF_COUNTER_STATE_INACTIVE = 0,
389 PERF_COUNTER_STATE_ACTIVE = 1,
390};
391
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392struct file;
393
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394struct perf_mmap_data {
395 struct rcu_head rcu_head;
8740f941 396 int nr_pages; /* nr of data pages */
c5078f78 397 int nr_locked; /* nr pages mlocked */
8740f941 398
c33a0bc4 399 atomic_t poll; /* POLL_ for wakeups */
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400 atomic_t head; /* write position */
401 atomic_t events; /* event limit */
402
c66de4a5 403 atomic_t done_head; /* completed head */
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404 atomic_t lock; /* concurrent writes */
405
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406 atomic_t wakeup; /* needs a wakeup */
407
7b732a75 408 struct perf_counter_mmap_page *user_page;
0127c3ea 409 void *data_pages[0];
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410};
411
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412struct perf_pending_entry {
413 struct perf_pending_entry *next;
414 void (*func)(struct perf_pending_entry *);
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415};
416
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417/**
418 * struct perf_counter - performance counter kernel representation:
419 */
420struct perf_counter {
ee06094f 421#ifdef CONFIG_PERF_COUNTERS
04289bb9 422 struct list_head list_entry;
592903cd 423 struct list_head event_entry;
04289bb9 424 struct list_head sibling_list;
0127c3ea 425 int nr_siblings;
04289bb9 426 struct perf_counter *group_leader;
4aeb0b42 427 const struct pmu *pmu;
04289bb9 428
6a930700 429 enum perf_counter_active_state state;
c07c99b6 430 enum perf_counter_active_state prev_state;
0793a61d 431 atomic64_t count;
ee06094f 432
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433 /*
434 * These are the total time in nanoseconds that the counter
435 * has been enabled (i.e. eligible to run, and the task has
436 * been scheduled in, if this is a per-task counter)
437 * and running (scheduled onto the CPU), respectively.
438 *
439 * They are computed from tstamp_enabled, tstamp_running and
440 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
441 */
442 u64 total_time_enabled;
443 u64 total_time_running;
444
445 /*
446 * These are timestamps used for computing total_time_enabled
447 * and total_time_running when the counter is in INACTIVE or
448 * ACTIVE state, measured in nanoseconds from an arbitrary point
449 * in time.
450 * tstamp_enabled: the notional time when the counter was enabled
451 * tstamp_running: the notional time when the counter was scheduled on
452 * tstamp_stopped: in INACTIVE state, the notional time when the
453 * counter was scheduled off.
454 */
455 u64 tstamp_enabled;
456 u64 tstamp_running;
457 u64 tstamp_stopped;
458
9f66a381 459 struct perf_counter_hw_event hw_event;
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460 struct hw_perf_counter hw;
461
462 struct perf_counter_context *ctx;
9b51f66d 463 struct file *filp;
0793a61d 464
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465 /*
466 * These accumulate total time (in nanoseconds) that children
467 * counters have been enabled and running, respectively.
468 */
469 atomic64_t child_total_time_enabled;
470 atomic64_t child_total_time_running;
471
0793a61d 472 /*
d859e29f 473 * Protect attach/detach and child_list:
0793a61d 474 */
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475 struct mutex child_mutex;
476 struct list_head child_list;
477 struct perf_counter *parent;
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478
479 int oncpu;
480 int cpu;
481
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482 struct list_head owner_entry;
483 struct task_struct *owner;
484
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485 /* mmap bits */
486 struct mutex mmap_mutex;
487 atomic_t mmap_count;
488 struct perf_mmap_data *data;
37d81828 489
7b732a75 490 /* poll related */
0793a61d 491 wait_queue_head_t waitq;
3c446b3d 492 struct fasync_struct *fasync;
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493
494 /* delayed work for NMIs and such */
495 int pending_wakeup;
4c9e2542 496 int pending_kill;
79f14641 497 int pending_disable;
671dec5d 498 struct perf_pending_entry pending;
592903cd 499
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500 atomic_t event_limit;
501
e077df4f 502 void (*destroy)(struct perf_counter *);
592903cd 503 struct rcu_head rcu_head;
ee06094f 504#endif
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505};
506
507/**
508 * struct perf_counter_context - counter context structure
509 *
510 * Used as a container for task counters and CPU counters as well:
511 */
512struct perf_counter_context {
0793a61d 513 /*
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514 * Protect the states of the counters in the list,
515 * nr_active, and the list:
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516 */
517 spinlock_t lock;
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518 /*
519 * Protect the list of counters. Locking either mutex or lock
520 * is sufficient to ensure the list doesn't change; to change
521 * the list you need to lock both the mutex and the spinlock.
522 */
523 struct mutex mutex;
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524
525 struct list_head counter_list;
592903cd 526 struct list_head event_list;
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527 int nr_counters;
528 int nr_active;
d859e29f 529 int is_active;
a63eaf34 530 atomic_t refcount;
0793a61d 531 struct task_struct *task;
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532
533 /*
4af4998b 534 * Context clock, runs when context enabled.
53cfbf59 535 */
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536 u64 time;
537 u64 timestamp;
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538
539 /*
540 * These fields let us detect when two contexts have both
541 * been cloned (inherited) from a common ancestor.
542 */
543 struct perf_counter_context *parent_ctx;
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544 u64 parent_gen;
545 u64 generation;
25346b93 546 int pin_count;
c93f7669 547 struct rcu_head rcu_head;
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548};
549
550/**
551 * struct perf_counter_cpu_context - per cpu counter context structure
552 */
553struct perf_cpu_context {
554 struct perf_counter_context ctx;
555 struct perf_counter_context *task_ctx;
556 int active_oncpu;
557 int max_pertask;
3b6f9e5c 558 int exclusive;
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559
560 /*
561 * Recursion avoidance:
562 *
563 * task, softirq, irq, nmi context
564 */
565 int recursion[4];
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566};
567
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568#ifdef CONFIG_PERF_COUNTERS
569
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570/*
571 * Set by architecture code:
572 */
573extern int perf_max_counters;
574
4aeb0b42 575extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 576
0793a61d 577extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
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578extern void perf_counter_task_sched_out(struct task_struct *task,
579 struct task_struct *next, int cpu);
0793a61d 580extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 581extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 582extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 583extern void perf_counter_free_task(struct task_struct *task);
925d519a 584extern void perf_counter_do_pending(void);
0793a61d 585extern void perf_counter_print_debug(void);
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586extern void __perf_disable(void);
587extern bool __perf_enable(void);
588extern void perf_disable(void);
589extern void perf_enable(void);
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590extern int perf_counter_task_disable(void);
591extern int perf_counter_task_enable(void);
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592extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
593 struct perf_cpu_context *cpuctx,
594 struct perf_counter_context *ctx, int cpu);
37d81828 595extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 596
f6c7d5fe 597extern int perf_counter_overflow(struct perf_counter *counter,
78f13e95 598 int nmi, struct pt_regs *regs, u64 addr);
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599/*
600 * Return 1 for a software counter, 0 for a hardware counter
601 */
602static inline int is_software_counter(struct perf_counter *counter)
603{
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604 return !perf_event_raw(&counter->hw_event) &&
605 perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
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606}
607
78f13e95 608extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c 609
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610extern void perf_counter_mmap(unsigned long addr, unsigned long len,
611 unsigned long pgoff, struct file *file);
612
613extern void perf_counter_munmap(unsigned long addr, unsigned long len,
614 unsigned long pgoff, struct file *file);
615
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616extern void perf_counter_comm(struct task_struct *tsk);
617
9c03d88e 618#define MAX_STACK_DEPTH 255
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619
620struct perf_callchain_entry {
9c03d88e 621 u16 nr, hv, kernel, user;
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622 u64 ip[MAX_STACK_DEPTH];
623};
624
625extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
626
1ccd1549 627extern int sysctl_perf_counter_priv;
c5078f78 628extern int sysctl_perf_counter_mlock;
a78ac325 629extern int sysctl_perf_counter_limit;
1ccd1549 630
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631extern void perf_counter_init(void);
632
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633#ifndef perf_misc_flags
634#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
635 PERF_EVENT_MISC_KERNEL)
636#define perf_instruction_pointer(regs) instruction_pointer(regs)
637#endif
638
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639#else
640static inline void
641perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
642static inline void
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643perf_counter_task_sched_out(struct task_struct *task,
644 struct task_struct *next, int cpu) { }
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645static inline void
646perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 647static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 648static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 649static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 650static inline void perf_counter_do_pending(void) { }
0793a61d 651static inline void perf_counter_print_debug(void) { }
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652static inline void perf_disable(void) { }
653static inline void perf_enable(void) { }
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654static inline int perf_counter_task_disable(void) { return -EINVAL; }
655static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 656
925d519a 657static inline void
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658perf_swcounter_event(u32 event, u64 nr, int nmi,
659 struct pt_regs *regs, u64 addr) { }
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660
661static inline void
662perf_counter_mmap(unsigned long addr, unsigned long len,
663 unsigned long pgoff, struct file *file) { }
664
665static inline void
666perf_counter_munmap(unsigned long addr, unsigned long len,
0d905bca 667 unsigned long pgoff, struct file *file) { }
0a4a9391 668
8d1b2d93 669static inline void perf_counter_comm(struct task_struct *tsk) { }
0d905bca 670static inline void perf_counter_init(void) { }
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671#endif
672
f3dfd265 673#endif /* __KERNEL__ */
0793a61d 674#endif /* _LINUX_PERF_COUNTER_H */
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