[deliverable/linux.git] / include / linux / perf_counter.h

/*
 *  Performance counters:
 *
 *   Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
 *   Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
 *
 *  Data type definitions, declarations, prototypes.
 *
 *  Started by: Thomas Gleixner and Ingo Molnar
 *
 *  For licencing details see kernel-base/COPYING
 */
#ifndef _LINUX_PERF_COUNTER_H
#define _LINUX_PERF_COUNTER_H

#include <linux/types.h>
#include <linux/ioctl.h>
#include <asm/byteorder.h>

/*
 * User-space ABI bits:
 */

/*
 * hw_event.type
 */
enum perf_event_types {
	PERF_TYPE_HARDWARE		= 0,
	PERF_TYPE_SOFTWARE		= 1,
	PERF_TYPE_TRACEPOINT		= 2,

	/*
	 * available TYPE space, raw is the max value.
	 */

	PERF_TYPE_RAW			= 128,
};

/*
 * Generalized performance counter event types, used by the hw_event.event_id
 * parameter of the sys_perf_counter_open() syscall:
 */
enum hw_event_ids {
	/*
	 * Common hardware events, generalized by the kernel:
	 */
	PERF_COUNT_CPU_CYCLES		= 0,
	PERF_COUNT_INSTRUCTIONS		= 1,
	PERF_COUNT_CACHE_REFERENCES	= 2,
	PERF_COUNT_CACHE_MISSES		= 3,
	PERF_COUNT_BRANCH_INSTRUCTIONS	= 4,
	PERF_COUNT_BRANCH_MISSES	= 5,
	PERF_COUNT_BUS_CYCLES		= 6,

	PERF_HW_EVENTS_MAX		= 7,
};

/*
 * Special "software" counters provided by the kernel, even if the hardware
 * does not support performance counters. These counters measure various
 * physical and sw events of the kernel (and allow the profiling of them as
 * well):
 */
enum sw_event_ids {
	PERF_COUNT_CPU_CLOCK		= 0,
	PERF_COUNT_TASK_CLOCK		= 1,
	PERF_COUNT_PAGE_FAULTS		= 2,
	PERF_COUNT_CONTEXT_SWITCHES	= 3,
	PERF_COUNT_CPU_MIGRATIONS	= 4,
	PERF_COUNT_PAGE_FAULTS_MIN	= 5,
	PERF_COUNT_PAGE_FAULTS_MAJ	= 6,

	PERF_SW_EVENTS_MAX		= 7,
};

#define __PERF_COUNTER_MASK(name) 			\
	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) <<	\
	 PERF_COUNTER_##name##_SHIFT)

#define PERF_COUNTER_RAW_BITS		1
#define PERF_COUNTER_RAW_SHIFT		63
#define PERF_COUNTER_RAW_MASK		__PERF_COUNTER_MASK(RAW)

#define PERF_COUNTER_CONFIG_BITS	63
#define PERF_COUNTER_CONFIG_SHIFT	0
#define PERF_COUNTER_CONFIG_MASK	__PERF_COUNTER_MASK(CONFIG)

#define PERF_COUNTER_TYPE_BITS		7
#define PERF_COUNTER_TYPE_SHIFT		56
#define PERF_COUNTER_TYPE_MASK		__PERF_COUNTER_MASK(TYPE)

#define PERF_COUNTER_EVENT_BITS		56
#define PERF_COUNTER_EVENT_SHIFT	0
#define PERF_COUNTER_EVENT_MASK		__PERF_COUNTER_MASK(EVENT)

/*
 * Bits that can be set in hw_event.record_type to request information
 * in the overflow packets.
 */
enum perf_counter_record_format {
	PERF_RECORD_IP		= 1U << 0,
	PERF_RECORD_TID		= 1U << 1,
	PERF_RECORD_GROUP	= 1U << 2,
	PERF_RECORD_CALLCHAIN	= 1U << 3,
	PERF_RECORD_TIME	= 1U << 4,
};

/*
 * Bits that can be set in hw_event.read_format to request that
 * reads on the counter should return the indicated quantities,
 * in increasing order of bit value, after the counter value.
 */
enum perf_counter_read_format {
	PERF_FORMAT_TOTAL_TIME_ENABLED	=  1,
	PERF_FORMAT_TOTAL_TIME_RUNNING	=  2,
};

/*
 * Hardware event to monitor via a performance monitoring counter:
 */
struct perf_counter_hw_event {
	/*
	 * The MSB of the config word signifies if the rest contains cpu
	 * specific (raw) counter configuration data, if unset, the next
	 * 7 bits are an event type and the rest of the bits are the event
	 * identifier.
	 */
	__u64			config;

	__u64			irq_period;
	__u32			record_type;
	__u32			read_format;

	__u64			disabled       :  1, /* off by default        */
				nmi	       :  1, /* NMI sampling          */
				inherit	       :  1, /* children inherit it   */
				pinned	       :  1, /* must always be on PMU */
				exclusive      :  1, /* only group on PMU     */
				exclude_user   :  1, /* don't count user      */
				exclude_kernel :  1, /* ditto kernel          */
				exclude_hv     :  1, /* ditto hypervisor      */
				exclude_idle   :  1, /* don't count when idle */
				mmap           :  1, /* include mmap data     */
				munmap         :  1, /* include munmap data   */
				comm	       :  1, /* include comm data     */

				__reserved_1   : 52;

	__u32			extra_config_len;
	__u32			wakeup_events;	/* wakeup every n events */

	__u64			__reserved_2;
	__u64			__reserved_3;
};

/*
 * Ioctls that can be done on a perf counter fd:
 */
#define PERF_COUNTER_IOC_ENABLE		_IO ('$', 0)
#define PERF_COUNTER_IOC_DISABLE	_IO ('$', 1)
#define PERF_COUNTER_IOC_REFRESH	_IOW('$', 2, u32)

/*
 * Structure of the page that can be mapped via mmap
 */
struct perf_counter_mmap_page {
	__u32	version;		/* version number of this structure */
	__u32	compat_version;		/* lowest version this is compat with */

	/*
	 * Bits needed to read the hw counters in user-space.
	 *
	 *   u32 seq;
	 *   s64 count;
	 *
	 *   do {
	 *     seq = pc->lock;
	 *
	 *     barrier()
	 *     if (pc->index) {
	 *       count = pmc_read(pc->index - 1);
	 *       count += pc->offset;
	 *     } else
	 *       goto regular_read;
	 *
	 *     barrier();
	 *   } while (pc->lock != seq);
	 *
	 * NOTE: for obvious reason this only works on self-monitoring
	 *       processes.
	 */
	__u32	lock;			/* seqlock for synchronization */
	__u32	index;			/* hardware counter identifier */
	__s64	offset;			/* add to hardware counter value */

	/*
	 * Control data for the mmap() data buffer.
	 *
	 * User-space reading this value should issue an rmb(), on SMP capable
	 * platforms, after reading this value -- see perf_counter_wakeup().
	 */
	__u32   data_head;		/* head in the data section */
};

#define PERF_EVENT_MISC_KERNEL		(1 << 0)
#define PERF_EVENT_MISC_USER		(1 << 1)
#define PERF_EVENT_MISC_OVERFLOW	(1 << 2)

struct perf_event_header {
	__u32	type;
	__u16	misc;
	__u16	size;
};

enum perf_event_type {

	/*
	 * The MMAP events record the PROT_EXEC mappings so that we can
	 * correlate userspace IPs to code. They have the following structure:
	 *
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	u32				pid, tid;
	 * 	u64				addr;
	 * 	u64				len;
	 * 	u64				pgoff;
	 * 	char				filename[];
	 * };
	 */
	PERF_EVENT_MMAP			= 1,
	PERF_EVENT_MUNMAP		= 2,

	/*
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	u32				pid, tid;
	 * 	char				comm[];
	 * };
	 */
	PERF_EVENT_COMM			= 3,

	/*
	 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
	 * will be PERF_RECORD_*
	 *
	 * struct {
	 * 	struct perf_event_header	header;
	 *
	 * 	{ u64			ip;	  } && PERF_RECORD_IP
	 * 	{ u32			pid, tid; } && PERF_RECORD_TID
	 *
	 * 	{ u64			nr;
	 * 	  { u64 event, val; } 	cnt[nr];  } && PERF_RECORD_GROUP
	 *
	 * 	{ u16			nr,
	 * 				hv,
	 * 				kernel,
	 * 				user;
	 * 	  u64			ips[nr];  } && PERF_RECORD_CALLCHAIN
	 *
	 * 	{ u64			time;     } && PERF_RECORD_TIME
	 * };
	 */
};

#ifdef __KERNEL__
/*
 * Kernel-internal data types and definitions:
 */

#ifdef CONFIG_PERF_COUNTERS
# include <asm/perf_counter.h>
#endif

#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/rculist.h>
#include <linux/rcupdate.h>
#include <linux/spinlock.h>
#include <linux/hrtimer.h>
#include <linux/fs.h>
#include <asm/atomic.h>

struct task_struct;

static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_RAW_MASK;
}

static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
}

static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
{
	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
		PERF_COUNTER_TYPE_SHIFT;
}

static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
{
	return hw_event->config & PERF_COUNTER_EVENT_MASK;
}

/**
 * struct hw_perf_counter - performance counter hardware details:
 */
struct hw_perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	union {
		struct { /* hardware */
			u64				config;
			unsigned long			config_base;
			unsigned long			counter_base;
			int				nmi;
			unsigned int			idx;
		};
		union { /* software */
			atomic64_t			count;
			struct hrtimer			hrtimer;
		};
	};
	atomic64_t			prev_count;
	u64				irq_period;
	atomic64_t			period_left;
#endif
};

struct perf_counter;

/**
 * struct hw_perf_counter_ops - performance counter hw ops
 */
struct hw_perf_counter_ops {
	int (*enable)			(struct perf_counter *counter);
	void (*disable)			(struct perf_counter *counter);
	void (*read)			(struct perf_counter *counter);
};

/**
 * enum perf_counter_active_state - the states of a counter
 */
enum perf_counter_active_state {
	PERF_COUNTER_STATE_ERROR	= -2,
	PERF_COUNTER_STATE_OFF		= -1,
	PERF_COUNTER_STATE_INACTIVE	=  0,
	PERF_COUNTER_STATE_ACTIVE	=  1,
};

struct file;

struct perf_mmap_data {
	struct rcu_head			rcu_head;
	int				nr_pages;	/* nr of data pages  */

	atomic_t			wakeup;		/* POLL_ for wakeups */
	atomic_t			head;		/* write position    */
	atomic_t			events;		/* event limit       */

	struct perf_counter_mmap_page   *user_page;
	void 				*data_pages[0];
};

struct perf_pending_entry {
	struct perf_pending_entry *next;
	void (*func)(struct perf_pending_entry *);
};

/**
 * struct perf_counter - performance counter kernel representation:
 */
struct perf_counter {
#ifdef CONFIG_PERF_COUNTERS
	struct list_head		list_entry;
	struct list_head		event_entry;
	struct list_head		sibling_list;
	int 				nr_siblings;
	struct perf_counter		*group_leader;
	const struct hw_perf_counter_ops *hw_ops;

	enum perf_counter_active_state	state;
	enum perf_counter_active_state	prev_state;
	atomic64_t			count;

	/*
	 * These are the total time in nanoseconds that the counter
	 * has been enabled (i.e. eligible to run, and the task has
	 * been scheduled in, if this is a per-task counter)
	 * and running (scheduled onto the CPU), respectively.
	 *
	 * They are computed from tstamp_enabled, tstamp_running and
	 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	 */
	u64				total_time_enabled;
	u64				total_time_running;

	/*
	 * These are timestamps used for computing total_time_enabled
	 * and total_time_running when the counter is in INACTIVE or
	 * ACTIVE state, measured in nanoseconds from an arbitrary point
	 * in time.
	 * tstamp_enabled: the notional time when the counter was enabled
	 * tstamp_running: the notional time when the counter was scheduled on
	 * tstamp_stopped: in INACTIVE state, the notional time when the
	 *	counter was scheduled off.
	 */
	u64				tstamp_enabled;
	u64				tstamp_running;
	u64				tstamp_stopped;

	struct perf_counter_hw_event	hw_event;
	struct hw_perf_counter		hw;

	struct perf_counter_context	*ctx;
	struct task_struct		*task;
	struct file			*filp;

	struct perf_counter		*parent;
	struct list_head		child_list;

	/*
	 * These accumulate total time (in nanoseconds) that children
	 * counters have been enabled and running, respectively.
	 */
	atomic64_t			child_total_time_enabled;
	atomic64_t			child_total_time_running;

	/*
	 * Protect attach/detach and child_list:
	 */
	struct mutex			mutex;

	int				oncpu;
	int				cpu;

	/* mmap bits */
	struct mutex			mmap_mutex;
	atomic_t			mmap_count;
	struct perf_mmap_data		*data;

	/* poll related */
	wait_queue_head_t		waitq;
	struct fasync_struct		*fasync;

	/* delayed work for NMIs and such */
	int				pending_wakeup;
	int				pending_kill;
	int				pending_disable;
	struct perf_pending_entry	pending;

	atomic_t			event_limit;

	void (*destroy)(struct perf_counter *);
	struct rcu_head			rcu_head;
#endif
};

/**
 * struct perf_counter_context - counter context structure
 *
 * Used as a container for task counters and CPU counters as well:
 */
struct perf_counter_context {
#ifdef CONFIG_PERF_COUNTERS
	/*
	 * Protect the states of the counters in the list,
	 * nr_active, and the list:
	 */
	spinlock_t		lock;
	/*
	 * Protect the list of counters.  Locking either mutex or lock
	 * is sufficient to ensure the list doesn't change; to change
	 * the list you need to lock both the mutex and the spinlock.
	 */
	struct mutex		mutex;

	struct list_head	counter_list;
	struct list_head	event_list;
	int			nr_counters;
	int			nr_active;
	int			is_active;
	struct task_struct	*task;

	/*
	 * Context clock, runs when context enabled.
	 */
	u64			time;
	u64			timestamp;
#endif
};

/**
 * struct perf_counter_cpu_context - per cpu counter context structure
 */
struct perf_cpu_context {
	struct perf_counter_context	ctx;
	struct perf_counter_context	*task_ctx;
	int				active_oncpu;
	int				max_pertask;
	int				exclusive;

	/*
	 * Recursion avoidance:
	 *
	 * task, softirq, irq, nmi context
	 */
	int			recursion[4];
};

/*
 * Set by architecture code:
 */
extern int perf_max_counters;

#ifdef CONFIG_PERF_COUNTERS
extern const struct hw_perf_counter_ops *
hw_perf_counter_init(struct perf_counter *counter);

extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
extern void perf_counter_task_tick(struct task_struct *task, int cpu);
extern void perf_counter_init_task(struct task_struct *child);
extern void perf_counter_exit_task(struct task_struct *child);
extern void perf_counter_do_pending(void);
extern void perf_counter_print_debug(void);
extern void perf_counter_unthrottle(void);
extern u64 hw_perf_save_disable(void);
extern void hw_perf_restore(u64 ctrl);
extern int perf_counter_task_disable(void);
extern int perf_counter_task_enable(void);
extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	       struct perf_cpu_context *cpuctx,
	       struct perf_counter_context *ctx, int cpu);
extern void perf_counter_update_userpage(struct perf_counter *counter);

extern int perf_counter_overflow(struct perf_counter *counter,
				 int nmi, struct pt_regs *regs);
/*
 * Return 1 for a software counter, 0 for a hardware counter
 */
static inline int is_software_counter(struct perf_counter *counter)
{
	return !perf_event_raw(&counter->hw_event) &&
		perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
}

extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);

extern void perf_counter_mmap(unsigned long addr, unsigned long len,
			      unsigned long pgoff, struct file *file);

extern void perf_counter_munmap(unsigned long addr, unsigned long len,
				unsigned long pgoff, struct file *file);

extern void perf_counter_comm(struct task_struct *tsk);

#define MAX_STACK_DEPTH		255

struct perf_callchain_entry {
	u16	nr, hv, kernel, user;
	u64	ip[MAX_STACK_DEPTH];
};

extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);

#else
static inline void
perf_counter_task_sched_in(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_sched_out(struct task_struct *task, int cpu)		{ }
static inline void
perf_counter_task_tick(struct task_struct *task, int cpu)		{ }
static inline void perf_counter_init_task(struct task_struct *child)	{ }
static inline void perf_counter_exit_task(struct task_struct *child)	{ }
static inline void perf_counter_do_pending(void)			{ }
static inline void perf_counter_print_debug(void)			{ }
static inline void perf_counter_unthrottle(void)			{ }
static inline void hw_perf_restore(u64 ctrl)				{ }
static inline u64 hw_perf_save_disable(void)		      { return 0; }
static inline int perf_counter_task_disable(void)	{ return -EINVAL; }
static inline int perf_counter_task_enable(void)	{ return -EINVAL; }

static inline void
perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs)	{ }


static inline void
perf_counter_mmap(unsigned long addr, unsigned long len,
		  unsigned long pgoff, struct file *file)		{ }

static inline void
perf_counter_munmap(unsigned long addr, unsigned long len,
		    unsigned long pgoff, struct file *file) 		{ }

static inline void perf_counter_comm(struct task_struct *tsk)		{ }
#endif

#endif /* __KERNEL__ */
#endif /* _LINUX_PERF_COUNTER_H */
Commit	Line	Data
0793a61d TG	1	/*
	2	* Performance counters:
	3	*
	4	* Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
	5	* Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
	6	*
	7	* Data type definitions, declarations, prototypes.
	8	*
	9	* Started by: Thomas Gleixner and Ingo Molnar
	10	*
	11	* For licencing details see kernel-base/COPYING
	12	*/
	13	#ifndef _LINUX_PERF_COUNTER_H
	14	#define _LINUX_PERF_COUNTER_H
	15
f3dfd265 PM	16	#include <linux/types.h>
f3dfd265 PM	17	#include <linux/ioctl.h>
9aaa131a	18	#include <asm/byteorder.h>
0793a61d TG	19
0793a61d TG	20	/*
9f66a381 IM	21	* User-space ABI bits:
	22	*/
	23
	24	/*
b8e83514	25	* hw_event.type
0793a61d	26	*/
b8e83514 PZ	27	enum perf_event_types {
	28	PERF_TYPE_HARDWARE = 0,
	29	PERF_TYPE_SOFTWARE = 1,
	30	PERF_TYPE_TRACEPOINT = 2,
	31
0793a61d	32	/*
b8e83514	33	* available TYPE space, raw is the max value.
0793a61d	34	*/
9f66a381	35
b8e83514 PZ	36	PERF_TYPE_RAW = 128,
b8e83514 PZ	37	};
6c594c21	38
b8e83514 PZ	39	/*
	40	* Generalized performance counter event types, used by the hw_event.event_id
	41	* parameter of the sys_perf_counter_open() syscall:
	42	*/
	43	enum hw_event_ids {
9f66a381	44	/*
b8e83514	45	* Common hardware events, generalized by the kernel:
9f66a381	46	*/
b8e83514 PZ	47	PERF_COUNT_CPU_CYCLES = 0,
	48	PERF_COUNT_INSTRUCTIONS = 1,
	49	PERF_COUNT_CACHE_REFERENCES = 2,
	50	PERF_COUNT_CACHE_MISSES = 3,
	51	PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
	52	PERF_COUNT_BRANCH_MISSES = 5,
	53	PERF_COUNT_BUS_CYCLES = 6,
	54
	55	PERF_HW_EVENTS_MAX = 7,
	56	};
e077df4f	57
b8e83514 PZ	58	/*
	59	* Special "software" counters provided by the kernel, even if the hardware
	60	* does not support performance counters. These counters measure various
	61	* physical and sw events of the kernel (and allow the profiling of them as
	62	* well):
	63	*/
	64	enum sw_event_ids {
	65	PERF_COUNT_CPU_CLOCK = 0,
	66	PERF_COUNT_TASK_CLOCK = 1,
	67	PERF_COUNT_PAGE_FAULTS = 2,
	68	PERF_COUNT_CONTEXT_SWITCHES = 3,
	69	PERF_COUNT_CPU_MIGRATIONS = 4,
	70	PERF_COUNT_PAGE_FAULTS_MIN = 5,
	71	PERF_COUNT_PAGE_FAULTS_MAJ = 6,
	72
	73	PERF_SW_EVENTS_MAX = 7,
0793a61d TG	74	};
0793a61d TG	75
f4a2deb4 PZ	76	#define __PERF_COUNTER_MASK(name) \
	77	(((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
	78	PERF_COUNTER_##name##_SHIFT)
	79
	80	#define PERF_COUNTER_RAW_BITS 1
	81	#define PERF_COUNTER_RAW_SHIFT 63
	82	#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
	83
	84	#define PERF_COUNTER_CONFIG_BITS 63
	85	#define PERF_COUNTER_CONFIG_SHIFT 0
	86	#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
	87
	88	#define PERF_COUNTER_TYPE_BITS 7
	89	#define PERF_COUNTER_TYPE_SHIFT 56
	90	#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
	91
	92	#define PERF_COUNTER_EVENT_BITS 56
	93	#define PERF_COUNTER_EVENT_SHIFT 0
	94	#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
	95
8a057d84 PZ	96	/*
	97	* Bits that can be set in hw_event.record_type to request information
	98	* in the overflow packets.
	99	*/
	100	enum perf_counter_record_format {
	101	PERF_RECORD_IP = 1U << 0,
	102	PERF_RECORD_TID = 1U << 1,
	103	PERF_RECORD_GROUP = 1U << 2,
	104	PERF_RECORD_CALLCHAIN = 1U << 3,
339f7c90	105	PERF_RECORD_TIME = 1U << 4,
8a057d84 PZ	106	};
8a057d84 PZ	107
53cfbf59 PM	108	/*
	109	* Bits that can be set in hw_event.read_format to request that
	110	* reads on the counter should return the indicated quantities,
	111	* in increasing order of bit value, after the counter value.
	112	*/
	113	enum perf_counter_read_format {
	114	PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
	115	PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
	116	};
	117
9f66a381 IM	118	/*
	119	* Hardware event to monitor via a performance monitoring counter:
	120	*/
	121	struct perf_counter_hw_event {
f4a2deb4 PZ	122	/*
	123	* The MSB of the config word signifies if the rest contains cpu
	124	* specific (raw) counter configuration data, if unset, the next
	125	* 7 bits are an event type and the rest of the bits are the event
	126	* identifier.
	127	*/
	128	__u64 config;
9f66a381	129
f3dfd265	130	__u64 irq_period;
8a057d84 PZ	131	__u32 record_type;
8a057d84 PZ	132	__u32 read_format;
9f66a381	133
2743a5b0	134	__u64 disabled : 1, /* off by default */
0475f9ea	135	nmi : 1, /* NMI sampling */
0475f9ea PM	136	inherit : 1, /* children inherit it */
	137	pinned : 1, /* must always be on PMU */
	138	exclusive : 1, /* only group on PMU */
	139	exclude_user : 1, /* don't count user */
	140	exclude_kernel : 1, /* ditto kernel */
	141	exclude_hv : 1, /* ditto hypervisor */
2743a5b0	142	exclude_idle : 1, /* don't count when idle */
0a4a9391 PZ	143	mmap : 1, /* include mmap data */
0a4a9391 PZ	144	munmap : 1, /* include munmap data */
8d1b2d93	145	comm : 1, /* include comm data */
0475f9ea	146
8d1b2d93	147	__reserved_1 : 52;
2743a5b0 PM	148
2743a5b0 PM	149	__u32 extra_config_len;
c457810a	150	__u32 wakeup_events; /* wakeup every n events */
9f66a381	151
f3dfd265	152	__u64 __reserved_2;
2743a5b0	153	__u64 __reserved_3;
eab656ae TG	154	};
eab656ae TG	155
d859e29f PM	156	/*
	157	* Ioctls that can be done on a perf counter fd:
	158	*/
79f14641 PZ	159	#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
	160	#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
	161	#define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32)
d859e29f	162
37d81828 PM	163	/*
	164	* Structure of the page that can be mapped via mmap
	165	*/
	166	struct perf_counter_mmap_page {
	167	__u32 version; /* version number of this structure */
	168	__u32 compat_version; /* lowest version this is compat with */
38ff667b PZ	169
	170	/*
	171	* Bits needed to read the hw counters in user-space.
	172	*
92f22a38 PZ	173	* u32 seq;
92f22a38 PZ	174	* s64 count;
38ff667b	175	*
a2e87d06 PZ	176	* do {
a2e87d06 PZ	177	* seq = pc->lock;
38ff667b	178	*
a2e87d06 PZ	179	* barrier()
	180	* if (pc->index) {
	181	* count = pmc_read(pc->index - 1);
	182	* count += pc->offset;
	183	* } else
	184	* goto regular_read;
38ff667b	185	*
a2e87d06 PZ	186	* barrier();
a2e87d06 PZ	187	* } while (pc->lock != seq);
38ff667b	188	*
92f22a38 PZ	189	* NOTE: for obvious reason this only works on self-monitoring
92f22a38 PZ	190	* processes.
38ff667b	191	*/
37d81828 PM	192	__u32 lock; /* seqlock for synchronization */
	193	__u32 index; /* hardware counter identifier */
	194	__s64 offset; /* add to hardware counter value */
7b732a75	195
38ff667b PZ	196	/*
	197	* Control data for the mmap() data buffer.
	198	*
	199	* User-space reading this value should issue an rmb(), on SMP capable
	200	* platforms, after reading this value -- see perf_counter_wakeup().
	201	*/
7b732a75	202	__u32 data_head; /* head in the data section */
37d81828 PM	203	};
37d81828 PM	204
6b6e5486 PZ	205	#define PERF_EVENT_MISC_KERNEL (1 << 0)
	206	#define PERF_EVENT_MISC_USER (1 << 1)
	207	#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192	208
5c148194 PZ	209	struct perf_event_header {
5c148194 PZ	210	__u32 type;
6fab0192 PZ	211	__u16 misc;
6fab0192 PZ	212	__u16 size;
5c148194 PZ	213	};
	214
	215	enum perf_event_type {
5ed00415	216
0c593b34 PZ	217	/*
	218	* The MMAP events record the PROT_EXEC mappings so that we can
	219	* correlate userspace IPs to code. They have the following structure:
	220	*
	221	* struct {
	222	* struct perf_event_header header;
	223	*
	224	* u32 pid, tid;
	225	* u64 addr;
	226	* u64 len;
	227	* u64 pgoff;
	228	* char filename[];
	229	* };
	230	*/
8a057d84 PZ	231	PERF_EVENT_MMAP = 1,
8a057d84 PZ	232	PERF_EVENT_MUNMAP = 2,
0a4a9391	233
8d1b2d93 PZ	234	/*
	235	* struct {
	236	* struct perf_event_header header;
	237	*
	238	* u32 pid, tid;
	239	* char comm[];
	240	* };
	241	*/
	242	PERF_EVENT_COMM = 3,
	243
8a057d84	244	/*
6b6e5486 PZ	245	* When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
6b6e5486 PZ	246	* will be PERF_RECORD_*
0c593b34 PZ	247	*
	248	* struct {
	249	* struct perf_event_header header;
	250	*
6b6e5486 PZ	251	* { u64 ip; } && PERF_RECORD_IP
6b6e5486 PZ	252	* { u32 pid, tid; } && PERF_RECORD_TID
0c593b34 PZ	253	*
0c593b34 PZ	254	* { u64 nr;
6b6e5486	255	* { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP
0c593b34 PZ	256	*
	257	* { u16 nr,
	258	* hv,
	259	* kernel,
	260	* user;
6b6e5486	261	* u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34	262	*
6b6e5486	263	* { u64 time; } && PERF_RECORD_TIME
0c593b34	264	* };
8a057d84	265	*/
5c148194 PZ	266	};
5c148194 PZ	267
f3dfd265	268	#ifdef __KERNEL__
9f66a381	269	/*
f3dfd265	270	* Kernel-internal data types and definitions:
9f66a381 IM	271	*/
9f66a381 IM	272
f3dfd265 PM	273	#ifdef CONFIG_PERF_COUNTERS
	274	# include <asm/perf_counter.h>
	275	#endif
	276
	277	#include <linux/list.h>
	278	#include <linux/mutex.h>
	279	#include <linux/rculist.h>
	280	#include <linux/rcupdate.h>
	281	#include <linux/spinlock.h>
d6d020e9	282	#include <linux/hrtimer.h>
3c446b3d	283	#include <linux/fs.h>
f3dfd265 PM	284	#include <asm/atomic.h>
	285
	286	struct task_struct;
	287
f4a2deb4 PZ	288	static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
	289	{
	290	return hw_event->config & PERF_COUNTER_RAW_MASK;
	291	}
	292
	293	static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
	294	{
	295	return hw_event->config & PERF_COUNTER_CONFIG_MASK;
	296	}
	297
	298	static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
	299	{
	300	return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
	301	PERF_COUNTER_TYPE_SHIFT;
	302	}
	303
	304	static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
	305	{
	306	return hw_event->config & PERF_COUNTER_EVENT_MASK;
	307	}
	308
0793a61d	309	/**
9f66a381	310	* struct hw_perf_counter - performance counter hardware details:
0793a61d TG	311	*/
0793a61d TG	312	struct hw_perf_counter {
ee06094f	313	#ifdef CONFIG_PERF_COUNTERS
d6d020e9 PZ	314	union {
	315	struct { /* hardware */
	316	u64 config;
	317	unsigned long config_base;
	318	unsigned long counter_base;
	319	int nmi;
	320	unsigned int idx;
	321	};
	322	union { /* software */
	323	atomic64_t count;
	324	struct hrtimer hrtimer;
	325	};
	326	};
ee06094f	327	atomic64_t prev_count;
9f66a381	328	u64 irq_period;
ee06094f IM	329	atomic64_t period_left;
ee06094f IM	330	#endif
0793a61d TG	331	};
0793a61d TG	332
621a01ea IM	333	struct perf_counter;
	334
	335	/**
	336	* struct hw_perf_counter_ops - performance counter hw ops
	337	*/
	338	struct hw_perf_counter_ops {
95cdd2e7	339	int (enable) (struct perf_counter counter);
7671581f IM	340	void (disable) (struct perf_counter counter);
7671581f IM	341	void (read) (struct perf_counter counter);
621a01ea IM	342	};
621a01ea IM	343
6a930700 IM	344	/**
	345	* enum perf_counter_active_state - the states of a counter
	346	*/
	347	enum perf_counter_active_state {
3b6f9e5c	348	PERF_COUNTER_STATE_ERROR = -2,
6a930700 IM	349	PERF_COUNTER_STATE_OFF = -1,
	350	PERF_COUNTER_STATE_INACTIVE = 0,
	351	PERF_COUNTER_STATE_ACTIVE = 1,
	352	};
	353
9b51f66d IM	354	struct file;
9b51f66d IM	355
7b732a75 PZ	356	struct perf_mmap_data {
7b732a75 PZ	357	struct rcu_head rcu_head;
8740f941 PZ	358	int nr_pages; /* nr of data pages */
	359
	360	atomic_t wakeup; /* POLL_ for wakeups */
	361	atomic_t head; /* write position */
	362	atomic_t events; /* event limit */
	363
7b732a75 PZ	364	struct perf_counter_mmap_page *user_page;
	365	void *data_pages[0];
	366	};
	367
671dec5d PZ	368	struct perf_pending_entry {
	369	struct perf_pending_entry *next;
	370	void (func)(struct perf_pending_entry );
925d519a PZ	371	};
925d519a PZ	372
0793a61d TG	373	/**
	374	* struct perf_counter - performance counter kernel representation:
	375	*/
	376	struct perf_counter {
ee06094f	377	#ifdef CONFIG_PERF_COUNTERS
04289bb9	378	struct list_head list_entry;
592903cd	379	struct list_head event_entry;
04289bb9	380	struct list_head sibling_list;
5c148194	381	int nr_siblings;
04289bb9	382	struct perf_counter *group_leader;
5c92d124	383	const struct hw_perf_counter_ops *hw_ops;
04289bb9	384
6a930700	385	enum perf_counter_active_state state;
c07c99b6	386	enum perf_counter_active_state prev_state;
0793a61d	387	atomic64_t count;
ee06094f	388
53cfbf59 PM	389	/*
	390	* These are the total time in nanoseconds that the counter
	391	* has been enabled (i.e. eligible to run, and the task has
	392	* been scheduled in, if this is a per-task counter)
	393	* and running (scheduled onto the CPU), respectively.
	394	*
	395	* They are computed from tstamp_enabled, tstamp_running and
	396	* tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
	397	*/
	398	u64 total_time_enabled;
	399	u64 total_time_running;
	400
	401	/*
	402	* These are timestamps used for computing total_time_enabled
	403	* and total_time_running when the counter is in INACTIVE or
	404	* ACTIVE state, measured in nanoseconds from an arbitrary point
	405	* in time.
	406	* tstamp_enabled: the notional time when the counter was enabled
	407	* tstamp_running: the notional time when the counter was scheduled on
	408	* tstamp_stopped: in INACTIVE state, the notional time when the
	409	* counter was scheduled off.
	410	*/
	411	u64 tstamp_enabled;
	412	u64 tstamp_running;
	413	u64 tstamp_stopped;
	414
9f66a381	415	struct perf_counter_hw_event hw_event;
0793a61d TG	416	struct hw_perf_counter hw;
	417
	418	struct perf_counter_context *ctx;
	419	struct task_struct *task;
9b51f66d	420	struct file *filp;
0793a61d	421
9b51f66d	422	struct perf_counter *parent;
d859e29f PM	423	struct list_head child_list;
d859e29f PM	424
53cfbf59 PM	425	/*
	426	* These accumulate total time (in nanoseconds) that children
	427	* counters have been enabled and running, respectively.
	428	*/
	429	atomic64_t child_total_time_enabled;
	430	atomic64_t child_total_time_running;
	431
0793a61d	432	/*
d859e29f	433	* Protect attach/detach and child_list:
0793a61d TG	434	*/
	435	struct mutex mutex;
	436
	437	int oncpu;
	438	int cpu;
	439
7b732a75 PZ	440	/* mmap bits */
	441	struct mutex mmap_mutex;
	442	atomic_t mmap_count;
	443	struct perf_mmap_data *data;
37d81828	444
7b732a75	445	/* poll related */
0793a61d	446	wait_queue_head_t waitq;
3c446b3d	447	struct fasync_struct *fasync;
79f14641 PZ	448
	449	/* delayed work for NMIs and such */
	450	int pending_wakeup;
4c9e2542	451	int pending_kill;
79f14641	452	int pending_disable;
671dec5d	453	struct perf_pending_entry pending;
592903cd	454
79f14641 PZ	455	atomic_t event_limit;
79f14641 PZ	456
e077df4f	457	void (destroy)(struct perf_counter );
592903cd	458	struct rcu_head rcu_head;
ee06094f	459	#endif
0793a61d TG	460	};
	461
	462	/**
	463	* struct perf_counter_context - counter context structure
	464	*
	465	* Used as a container for task counters and CPU counters as well:
	466	*/
	467	struct perf_counter_context {
	468	#ifdef CONFIG_PERF_COUNTERS
	469	/*
d859e29f PM	470	* Protect the states of the counters in the list,
d859e29f PM	471	* nr_active, and the list:
0793a61d TG	472	*/
0793a61d TG	473	spinlock_t lock;
d859e29f PM	474	/*
	475	* Protect the list of counters. Locking either mutex or lock
	476	* is sufficient to ensure the list doesn't change; to change
	477	* the list you need to lock both the mutex and the spinlock.
	478	*/
	479	struct mutex mutex;
04289bb9 IM	480
04289bb9 IM	481	struct list_head counter_list;
592903cd	482	struct list_head event_list;
0793a61d TG	483	int nr_counters;
0793a61d TG	484	int nr_active;
d859e29f	485	int is_active;
0793a61d	486	struct task_struct *task;
53cfbf59 PM	487
53cfbf59 PM	488	/*
4af4998b	489	* Context clock, runs when context enabled.
53cfbf59	490	*/
4af4998b PZ	491	u64 time;
4af4998b PZ	492	u64 timestamp;
0793a61d TG	493	#endif
	494	};
	495
	496	/**
	497	* struct perf_counter_cpu_context - per cpu counter context structure
	498	*/
	499	struct perf_cpu_context {
	500	struct perf_counter_context ctx;
	501	struct perf_counter_context *task_ctx;
	502	int active_oncpu;
	503	int max_pertask;
3b6f9e5c	504	int exclusive;
96f6d444 PZ	505
	506	/*
	507	* Recursion avoidance:
	508	*
	509	* task, softirq, irq, nmi context
	510	*/
	511	int recursion[4];
0793a61d TG	512	};
	513
	514	/*
	515	* Set by architecture code:
	516	*/
	517	extern int perf_max_counters;
	518
	519	#ifdef CONFIG_PERF_COUNTERS
5c92d124	520	extern const struct hw_perf_counter_ops *
621a01ea IM	521	hw_perf_counter_init(struct perf_counter *counter);
621a01ea IM	522
0793a61d TG	523	extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
	524	extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
	525	extern void perf_counter_task_tick(struct task_struct *task, int cpu);
9b51f66d IM	526	extern void perf_counter_init_task(struct task_struct *child);
9b51f66d IM	527	extern void perf_counter_exit_task(struct task_struct *child);
925d519a	528	extern void perf_counter_do_pending(void);
0793a61d	529	extern void perf_counter_print_debug(void);
1b023a96	530	extern void perf_counter_unthrottle(void);
01b2838c IM	531	extern u64 hw_perf_save_disable(void);
01b2838c IM	532	extern void hw_perf_restore(u64 ctrl);
1d1c7ddb IM	533	extern int perf_counter_task_disable(void);
1d1c7ddb IM	534	extern int perf_counter_task_enable(void);
3cbed429 PM	535	extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
	536	struct perf_cpu_context *cpuctx,
	537	struct perf_counter_context *ctx, int cpu);
37d81828	538	extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124	539
f6c7d5fe PZ	540	extern int perf_counter_overflow(struct perf_counter *counter,
f6c7d5fe PZ	541	int nmi, struct pt_regs *regs);
3b6f9e5c PM	542	/*
	543	* Return 1 for a software counter, 0 for a hardware counter
	544	*/
	545	static inline int is_software_counter(struct perf_counter *counter)
	546	{
f4a2deb4 PZ	547	return !perf_event_raw(&counter->hw_event) &&
f4a2deb4 PZ	548	perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
3b6f9e5c PM	549	}
3b6f9e5c PM	550
b8e83514	551	extern void perf_swcounter_event(u32, u64, int, struct pt_regs *);
15dbf27c	552
0a4a9391 PZ	553	extern void perf_counter_mmap(unsigned long addr, unsigned long len,
	554	unsigned long pgoff, struct file *file);
	555
	556	extern void perf_counter_munmap(unsigned long addr, unsigned long len,
	557	unsigned long pgoff, struct file *file);
	558
8d1b2d93 PZ	559	extern void perf_counter_comm(struct task_struct *tsk);
8d1b2d93 PZ	560
9c03d88e	561	#define MAX_STACK_DEPTH 255
394ee076 PZ	562
394ee076 PZ	563	struct perf_callchain_entry {
9c03d88e	564	u16 nr, hv, kernel, user;
394ee076 PZ	565	u64 ip[MAX_STACK_DEPTH];
	566	};
	567
	568	extern struct perf_callchain_entry perf_callchain(struct pt_regs regs);
	569
0793a61d TG	570	#else
	571	static inline void
	572	perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
	573	static inline void
	574	perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
	575	static inline void
	576	perf_counter_task_tick(struct task_struct *task, int cpu) { }
9b51f66d IM	577	static inline void perf_counter_init_task(struct task_struct *child) { }
9b51f66d IM	578	static inline void perf_counter_exit_task(struct task_struct *child) { }
925d519a	579	static inline void perf_counter_do_pending(void) { }
0793a61d	580	static inline void perf_counter_print_debug(void) { }
1b023a96	581	static inline void perf_counter_unthrottle(void) { }
15dbf27c	582	static inline void hw_perf_restore(u64 ctrl) { }
01b2838c	583	static inline u64 hw_perf_save_disable(void) { return 0; }
1d1c7ddb IM	584	static inline int perf_counter_task_disable(void) { return -EINVAL; }
1d1c7ddb IM	585	static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c	586
925d519a PZ	587	static inline void
	588	perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs) { }
	589
0a4a9391 PZ	590
	591	static inline void
	592	perf_counter_mmap(unsigned long addr, unsigned long len,
	593	unsigned long pgoff, struct file *file) { }
	594
	595	static inline void
	596	perf_counter_munmap(unsigned long addr, unsigned long len,
	597	unsigned long pgoff, struct file *file) { }
	598
8d1b2d93	599	static inline void perf_counter_comm(struct task_struct *tsk) { }
0793a61d TG	600	#endif
0793a61d TG	601
f3dfd265	602	#endif /* __KERNEL__ */
0793a61d	603	#endif /* _LINUX_PERF_COUNTER_H */